Svilen Kanev

19 papers A* 7A 2B 1Journal 7Unranked 2
YearRankTypeTitle / Venue / Authors
2025 J jnl
Correct Wrong Path.
IEEE Comput. Archit. Lett.
Bhargav Reddy Godala, Sankara Prasad Ramesh, Krishnam Tibrewala, Chrysanthos Pepi, Gino Chacon, Svilen Kanev, Gilles A. Pokam, Alberto Ros, Daniel A. Jiménez, Paul V. Gratz, David I. August
2024 — conf
Characterizing a Memory Allocator at Warehouse Scale.
ASPLOS (3)
Zhuangzhuang Zhou, Vaibhav Gogte, Nilay Vaish, Chris Kennelly, Patrick Xia, Svilen Kanev, Tipp Moseley, Christina Delimitrou, Parthasarathy Ranganathan
2024 J jnl
Correct Wrong Path.
CoRR
Bhargav Reddy Godala, Sankara Prasad Ramesh, Krishnam Tibrewala, Chrysanthos Pepi, Gino Chacon, Svilen Kanev, Gilles A. Pokam, Daniel A. Jiménez, Paul V. Gratz, David I. August
2023 A* conf
CDPU: Co-designing Compression and Decompression Processing Units for Hyperscale Systems.
ISCA
Sagar Karandikar, Aniruddha N. Udipi, Junsun Choi, Joonho Whangbo, Jerry Zhao, Svilen Kanev, Edwin Lim, Jyrki Alakuijala, Vrishab Madduri, Yakun Sophia Shao, Borivoje Nikolic, Krste Asanovic, Parthasarathy Ranganathan
2023 A* conf
EMISSARY: Enhanced Miss Awareness Replacement Policy for L2 Instruction Caching.
ISCA
Nayana Prasad Nagendra, Bhargav Reddy Godala, Ishita Chaturvedi, Atmn Patel, Svilen Kanev, Tipp Moseley, Jared Stark, Gilles A. Pokam, Simone Campanoni, David I. August
2020 J jnl
AsmDB: Understanding and Mitigating Front-End Stalls in Warehouse-Scale Computers.
IEEE Micro
Nayana Prasad Nagendra, Grant Ayers, David I. August, Hyoun Kyu Cho, Svilen Kanev, Christos Kozyrakis, Trivikram Krishnamurthy, Heiner Litz, Tipp Moseley, Parthasarathy Ranganathan
2019 A* conf
AsmDB: understanding and mitigating front-end stalls in warehouse-scale computers.
ISCA
Grant Ayers, Nayana Prasad Nagendra, David I. August, Hyoun Kyu Cho, Svilen Kanev, Christos Kozyrakis, Trivikram Krishnamurthy, Heiner Litz, Tipp Moseley, Parthasarathy Ranganathan
2017 J jnl
Automatically accelerating non-numerical programs by architecture-compiler co-design.
Commun. ACM
Simone Campanoni, Kevin Brownell, Svilen Kanev, Timothy M. Jones, Gu-Yeon Wei, David M. Brooks
2017 J jnl
CARB: A C-State Power Management Arbiter for Latency-Critical Workloads.
IEEE Comput. Archit. Lett.
Xin Zhan, Reza Azimi, Svilen Kanev, David M. Brooks, Sherief Reda
2017 A* conf
Mallacc: Accelerating Memory Allocation.
ASPLOS
Svilen Kanev, Sam Likun Xi, Gu-Yeon Wei, David M. Brooks
2016 J jnl
Profiling a Warehouse-Scale Computer.
IEEE Micro
Svilen Kanev, Juan Pablo Darago, Kim M. Hazelwood, Parthasarathy Ranganathan, Tipp Moseley, Gu-Yeon Wei, David M. Brooks
2015 A* conf
Profiling a warehouse-scale computer.
ISCA
Svilen Kanev, Juan Pablo Darago, Kim M. Hazelwood, Parthasarathy Ranganathan, Tipp Moseley, Gu-Yeon Wei, David M. Brooks
2014 A* conf
HELIX-RC: An architecture-compiler co-design for automatic parallelization of irregular programs.
ISCA
Simone Campanoni, Kevin Brownell, Svilen Kanev, Timothy M. Jones, Gu-Yeon Wei, David M. Brooks
2014 — conf
Tradeoffs between power management and tail latency in warehouse-scale applications.
IISWC
Svilen Kanev, Kim M. Hazelwood, Gu-Yeon Wei, David M. Brooks
2013 A conf
Characterizing and evaluating voltage noise in multi-core near-threshold processors.
ISLPED
Xuan Zhang, Tao Tong, Svilen Kanev, Sae Kyu Lee, Gu-Yeon Wei, David M. Brooks
2012 A conf
XIOSim: power-performance modeling of mobile x86 cores.
ISLPED
Svilen Kanev, Gu-Yeon Wei, David M. Brooks
2011 B conf
Portable trace compression through instruction interpretation.
ISPASS
Svilen Kanev, Robert Cohn
2011 J jnl
Voltage Noise in Production Processors.
IEEE Micro
Vijay Janapa Reddi, Svilen Kanev, Wonyoung Kim, Simone Campanoni, Michael D. Smith, Gu-Yeon Wei, David M. Brooks
2010 A* conf
Voltage Smoothing: Characterizing and Mitigating Voltage Noise in Production Processors via Software-Guided Thread Scheduling.
MICRO
Vijay Janapa Reddi, Svilen Kanev, Wonyoung Kim, Simone Campanoni, Michael D. Smith, Gu-Yeon Wei, David M. Brooks