Susana Ortega-Cisneros

51 papers A 1C 4Journal 25Unranked 18

Year	Rank	Type	Title / Venue / Authors
2025	J	`jnl`	Cachedia: An Environment for Efficient Cache Verification With Graphic Visualization for Debugging. IEEE Access Francisco J. Rodriguez-Navarrete, German Alonso Pinedo Diaz, L. A. Luna-Rodriguez, Susana Ortega-Cisneros, Luis Pizano-Escalante, Juan José Raygoza-Panduro
2025	J	`jnl`	Digital Circuit Design for the Square Root Computation by Means of Unfolding Techniques. IEEE Embed. Syst. Lett. Ricardo Paez Villa, Jorge Rivera, Juan José Raygoza-Panduro, Edwin C. Becerra-Alvarez, Susana Ortega-Cisneros
2025	C	`conf`	Implementation of a 16:1 Multiplexer and 1:16 Demultiplexer on a Single Chip Using Sky130 PDK and Open-Source EDA Tools for Silicluster. VLSI-SoC Uriel Jaramillo-Toral, Susana Ortega-Cisneros, Emilio Isaac Baungarten-Leon, Erick Jaramillo-Toral, Héctor Emmanuel Muñoz Zapata
2025	—	`book`	Integrated Circuit Design - Tape-out Process with Open-Source Tools Susana Ortega-Cisneros, Emilio Isaac Baungarten-Leon, Pedro Mejia Alvarez
2025	J	`jnl`	On the Retiming for Register Minimization by Means of Breadth Coefficients Matrix. IEEE Embed. Syst. Lett. Héctor Emmanuel Muñoz Zapata, Jorge Rivera, Susana Ortega-Cisneros, Diego Hernán Gaytán Rivas
2025	—	`conf`	Reconfigurable hardware architecture for arbitrary-size banded sparse matrix-by-vector multiplication. LATINCOM Emanuel Murillo-García, Manuel Hernández-Aramburo, Ramón Parra-Michel, Fernando Peña-Campos, Susana Ortega-Cisneros
2025	J	`jnl`	Seeding Algorithm for Bipolar Stochastic Computing for Polynomial Approximations. IEEE Embed. Syst. Lett. Abraham Josue Delgado-Nava, Jorge Rivera, Susana Ortega-Cisneros
2025	—	`conf`	When AI Turns Malicious: Unethical Use of LLMs for Hardware Design. NewCAS Emilio Isaac Baungarten-Leon, Susana Ortega-Cisneros, Emma Mascorro-Guardado, Juan Carlos Garcia Lopez, Jorge Rivera Dominguez, Juan José Raygoza-Panduro
2024	—	`conf`	Automated IC Design Flow Using Open-Source Tools and 180 nm PDK. MWSCAS Uriel Jaramillo-Toral, Juan Carlos Garcia Lopez, Susana Ortega-Cisneros, Emilio Isaac Baungarten-Leon, Cristian Torres González, Federico Sandoval-Ibarra
2024	J	`jnl`	Design and Implementation of an NoC-Based Convolution Architecture With GEMM and Systolic Arrays. IEEE Embed. Syst. Lett. Susana Ortega-Cisneros
2024	—	`book`	Exception Handling - Fundamentals and Programming Pedro Mejía-Alvarez, Raul Ernesto Gonzalez-Torres, Susana Ortega-Cisneros
2024	J	`jnl`	Macro Memory Cell Generator for SKY130 PDK. IEEE Access Emilio Isaac Baungarten-Leon, Susana Ortega-Cisneros, German Alonso Pinedo Diaz, Miguel Rivera-Acosta, Francisco J. Rodriguez-Navarrete, Uriel Jaramillo-Toral, Cristian Torres González, Juan Carlos Garcia Lopez
2024	—	`conf`	On the Novel Design and FPGA Implementation of a Fuzzy PD Control for a DC Motor. CCE Diego Hernán Gaytán Rivas, Jorge Rivera Dominguez, Susana Ortega-Cisneros, Héctor Emmanuel Muñoz Zapata, Emilio Isaac Baungarten-Leon
2024	—	`conf`	RISC- Vcito: A Multicycle Tiny Processor Implemented with SKY130 PDK. MWSCAS Martin Gonzalez-Perez, Susana Ortega-Cisneros, Francisco J. Rodriguez-Navarrete, German Alonso Pinedo Diaz, Emilio Isaac Baungarten-Leon, Miguel Rivera-Acosta
2024	—	`book`	Real-Time Database Systems - Fundamentals, Architectures and Applications Pedro Mejía-Alvarez, Ricardo J. Zavaleta Vazquez, Susana Ortega-Cisneros, Raul Ernesto Gonzalez-Torres
2024	—	`conf`	Transition from Synchronous to Asynchronous Systems with Minimal Logic Changes. LASCAS Juan Carlos Garcia Lopez, Susana Ortega-Cisneros, Emilio Isaac Baungarten-Leon, M. Vázquez-Robles, Jorge Rivera Dominguez
2024	J	`jnl`	Vector Accelerator Unit for Caravel. IEEE Embed. Syst. Lett. Emilio Isaac Baungarten-Leon, Susana Ortega-Cisneros, Uriel Jaramillo-Toral, Francisco J. Rodriguez-Navarrete, Luis Pizano-Escalante, Juan José Raygoza-Panduro
2022	J	`jnl`	A Novel Framework for Fast Feature Selection Based on Multi-Stage Correlation Measures. Mach. Learn. Knowl. Extr. Ivan-Alejandro Garcia-Ramirez, Arturo Calderon-Mora, Andres Mendez-Vazquez, Susana Ortega-Cisneros, Iván Reyes-Amezcua
2022	—	`conf`	Implementation of 8-Channel Pulse Width Modulation with AXI4-Lite Interface. CCE L. A. Luna-Rodriguez, Francisco J. Rodriguez-Navarrete, Susana Ortega-Cisneros, Miguel Rivera-Acosta, Jorge Rivera Dominguez, Juan José Raygoza-Panduro
2021	J	`jnl`	3D Simulation-Based Acoustic Wave Resonator Analysis and Validation Using Novel Finite Element Method Software. Sensors Ruth Yadira Vidana Morales, Susana Ortega-Cisneros, José Rodrigo Camacho Pérez, Federico Sandoval-Ibarra, Ricardo Casas Carrillo
2021	J	`jnl`	Parameter Selection Criteria for Tomo-SAR Focusing. IEEE J. Sel. Top. Appl. Earth Obs. Remote. Sens. Gustavo D. Martín del Campo-Becerra, Sergio Alejandro Serafín-García, Andreas Reigber, Susana Ortega-Cisneros
2021	J	`jnl`	Resolution Enhancement of Spatial Parametric Methods via Regularization. IEEE J. Sel. Top. Appl. Earth Obs. Remote. Sens. Gustavo Daniel Martín del Campo, Sergio Alejandro Serafín-García, Andreas Reigber, Susana Ortega-Cisneros, Matteo Nannini
2021	C	`conf`	Statistical Regularization as an Alternative to Model Order Selection. IGARSS Gustavo D. Martín del Campo-Becerra, Sergio Alejandro Serafín-García, Andreas Reigber, Susana Ortega-Cisneros
2020	J	`jnl`	Artificial Intelligence-Based Referral System for Patients With Diabetic Retinopathy. Computer Gaspar González-Briceño, Abraham Sánchez, Susana Ortega-Cisneros, Mario Salvador Garcia Contreras, German Alonso Pinedo Diaz, Eduardo Ulises Moya-Sánchez
2020	J	`jnl`	Automatic Cropping of Retinal Fundus Photographs using Convolutional Neural Networks. Res. Comput. Sci. Gaspar González-Briceño, Abraham Sánchez, Eduardo Ulises Moya-Sánchez, Susana Ortega-Cisneros, German Alonso Pinedo Diaz, Mario Salvador Garcia Contreras, Beatriz Alvarado Castillo
2019	J	`jnl`	Design and Evaluation of a USB Isolator for Medical Instrumentation. IEEE Trans. Instrum. Meas. Gaspar González-Briceño, Joshua E. Medow, Susana Ortega-Cisneros, Daniel Lorias-Espinoza, Arturo Minor-Martínez, John G. Webster
2019	J	`jnl`	Digital Implementation via FPGA of Controllers for Active Control of Ground Vehicles. IEEE Trans. Ind. Informatics Cuauhtemoc Acosta Lua, Stefano Di Gennaro, Antonio Navarrete-Guzman, Susana Ortega-Cisneros, Jorge Rivera Dominguez
2018	J	`jnl`	Pedestrian Detection and Tracking Using a Dynamic Vision Sensor. Computación y Sistemas Israel Ruelas, Gustavo Torres-Blanco, Susana Ortega-Cisneros, Eduardo Ulises Moya-Sánchez
2017	J	`jnl`	American Sign Language Alphabet Recognition Using a Neuromorphic Sensor and an Artificial Neural Network. Sensors Miguel Rivera-Acosta, Susana Ortega-Cisneros, Jorge Rivera, Federico Sandoval-Ibarra
2017	J	`jnl`	Conformal Geometric Algebra Voting Scheme Implemented in Reconfigurable Devices for Geometric Entities Extraction. IEEE Trans. Ind. Electron. Gerardo Soria García, Gerardo E. Altamirano-Gómez, Susana Ortega-Cisneros, Eduardo Bayro-Corrochano
2015	A	`conf`	A Hardware Implementation of a Unit for Geometric Algebra Operations With Parallel Memory Arrays (Abstract Only). FPGA Gerardo Soria García, Adrian Pedroza de-la-Crúz, Susana Ortega-Cisneros, Juan José Raygoza-Panduro, Eduardo Bayro-Corrochano
2015	—	`conf`	An image processor for convolution and correlation of binary images implemented in FPGA. CCE Susana Ortega-Cisneros, Jorge Rivera Dominguez, Pablo Moreno Villalobos, Carlos Agustin Torres C., H. Hernandez-Hector, Juan José Raygoza-Panduro
2015	—	`conf`	Design and implementation of a DC motor control using Field Programmable Analog Arrays. CCE Susana Ortega-Cisneros, Juan Luis del Valle-Padilla, Ivan Emmanuel Duenas Garcia, Jorge Rivera Dominguez, Juan José Raygoza-Panduro
2015	J	`jnl`	Editorial. Computación y Sistemas Susana Ortega-Cisneros, Adrian Pedroza de-la-Crúz, Oscar Eleno Carbajal-Espinosa, Bernardino Castillo-Toledo
2015	J	`jnl`	FPGA-based startup for AC electric drives: Application to a greenhouse ventilation system. Comput. Ind. Jorge Rivera, Juan José Raygoza-Panduro, Susana Ortega-Cisneros, Andrés Figueroa, Ofelia Begovich
2015	J	`jnl`	HW/SW Co-Design of a Specific Accelerator for Robotic Computer Vision. Computación y Sistemas Susana Ortega-Cisneros, Miguel A. Carrazco-Díaz, Adrian Pedroza de-la-Crúz, Juan José Raygoza-Panduro, Jorge Rivera Dominguez, Federico Sandoval-Ibarra
2014	—	`conf`	A digital predistortion technique based on a NARX network to linearize GaN class F power amplifiers. MWSCAS Lina Maria Aguilar-Lobo, Alberto Garcia-Osorio, José Raúl Loo-Yau, Susana Ortega-Cisneros, Pablo Moreno, José Ernesto Rayas-Sánchez, J. Apolinar Reynoso-Hernández
2014	—	`conf`	Characterization technique to implement self-timed cells for VLSI design blocks. CCE Susana Ortega-Cisneros, Juan José Raygoza-Panduro, José Roberto Reyes Barón, Daniel Tonali Aranda Bretón, Antonio Casillas Zamora
2014	J	`jnl`	Discrete-time modeling and control of a boost converter by means of a variational integrator and sliding modes. J. Frankl. Inst. Jorge Rivera, Florentino Chavira, Alexander G. Loukianov, Susana Ortega-Cisneros, Juan José Raygoza-Panduro
2014	C	`conf`	FPGA Implementation of a NARX Network for Modeling Nonlinear Systems. CIARP J. A. Rentería-Cedano, L. M. Aguilar-Lobo, Susana Ortega-Cisneros, José Raúl Loo-Yau, Juan José Raygoza-Panduro
2014	—	`conf`	Implementation of a NARX neural network in a FPGA for modeling the inverse characteristics of power amplifiers. MWSCAS J. A. Rentería-Cedano, L. M. Aguilar-Lobo, José Raúl Loo-Yau, Susana Ortega-Cisneros
2014	C	`conf`	Real Time Hardware Accelerator for Image Filtering. CIARP Susana Ortega-Cisneros, Miguel A. Carrazco-Díaz, Adrian Pedroza de-la-Crúz, Juan José Raygoza-Panduro, Federico Sandoval-Ibarra, Jorge Rivera Dominguez
2014	—	`conf`	Space-time AER protocol receiver asynchronously controlled on FPGA. CCE Susana Ortega-Cisneros, Juan José Raygoza-Panduro, Daniel Tonali Aranda Bretón, José Roberto Reyes Barón
2012	J	`jnl`	Copper and Core Loss Minimization for Induction Motors Using High-Order Sliding-Mode Control. IEEE Trans. Ind. Electron. Jorge Rivera, Christian Mora-Soto, Susana Ortega-Cisneros, Juan José Raygoza-Panduro, Alexander G. Loukianov
2012	—	`conf`	Discontinuous output regulation for a DC-to-AC boost converter. CCE Alexander G. Loukianov, Jorge Rivera, Florentino Chavira, Susana Ortega-Cisneros
2011	—	`conf`	Discrete-time sensorless control of permanent magnet synchronous motors. CCE Alexander G. Loukianov, Antonio Navarrete, Jorge Rivera, Susana Ortega-Cisneros
2008	J	`jnl`	Design of a Mathematical Unit in FPGA for the Implementation of the Control of a Magnetic Levitation System. Int. J. Reconfigurable Comput. Juan José Raygoza-Panduro, Susana Ortega-Cisneros, Jorge Rivera, Alberto de la Mora Gálvez
2007	J	`jnl`	Design and Implementation of the AMCC Self-Timed Microprocessor in FPGAs. J. Univers. Comput. Sci. Susana Ortega-Cisneros, Juan José Raygoza-Panduro, Alberto de la Mora Gálvez
2005	—	`conf`	FPGA implementation of a synchronous and self-timed neuroprocessor. ReConFig Juan José Raygoza-Panduro, Susana Ortega-Cisneros, Eduardo I. Boemo
2005	—	`conf`	Rapid prototyping of a self-timed ALU with FPGAs. ReConFig Susana Ortega-Cisneros, Juan José Raygoza-Panduro, Juan Suardíaz Muro, Eduardo I. Boemo
1996	—	`conf`	Electronic implementation for competitive neural network: a prototype. ICNN Luis M. Flores-Nava, Susana Ortega-Cisneros, Felipe Gomez-Castañeda, Jose A. Moreno-Cadenas