Surya Narayanan

11 papers A* 3B 1C 1Unranked 6
YearRankTypeTitle / Venue / Authors
2022 A* conf
CANDLES: Channel-Aware Novel Dataflow-Microarchitecture Co-Design for Low Energy Sparse Neural Network Acceleration.
HPCA
Sumanth Gudaparthi, Sarabjeet Singh, Surya Narayanan, Rajeev Balasubramonian, Visvesh Sathe
2020 A* conf
SpinalFlow: An Architecture and Dataflow Tailored for Spiking Neural Networks.
ISCA
Surya Narayanan, Karl Taht, Rajeev Balasubramonian, Edouard Giacomin, Pierre-Emmanuel Gaillardon
2019 A* conf
Wire-Aware Architecture and Dataflow for CNN Accelerators.
MICRO
Sumanth Gudaparthi, Surya Narayanan, Rajeev Balasubramonian, Edouard Giacomin, Hari Kambalasubramanyam, Pierre-Emmanuel Gaillardon
2018 — conf
A Case for Dynamic Activation Quantization in CNNs.
EMC2@ASPLOS
Karl Taht, Surya Narayanan, Rajeev Balasubramonian
2018 — conf
Moving CNN Accelerator Computations Closer to Data.
EMC2@ASPLOS
Sumanth Gudaparthi, Surya Narayanan, Rajeev Balasubramonian
2017 B conf
INXS: Bridging the throughput and energy gap for spiking neural networks.
IJCNN
Surya Narayanan, Ali Shafiee, Rajeev Balasubramonian
2015 — conf
An empirical high level performance model for future many-cores.
Conf. Computing Frontiers
Surya Narayanan, Bharath Narasimha Swamy, André Seznec
2015 — conf
Sequential and Parallel Code Sections are Different: they may require different Processors.
PARMA-DITAM@HiPEAC
Surya Narayanan, André Seznec
2014 — conf
Impact of Serial Scaling of Multi-threaded Programs in Many-Core Era.
SBAC-PAD (Workshops)
Surya Narayanan, Bharath Narasimha Swamy, André Seznec
2011 C conf
Communication service for hardware tasks executed on dynamic and partial reconfigurable resources.
VLSI-SoC
Surya Narayanan, Ludovic Devaux, Daniel Chillet, Sébastien Pillement, Ioannis Sourdis
2011 — conf
Hardware OS Communication Service and Dynamic Memory Management for RSoCs.
ReConFig
Surya Narayanan, Daniel Chillet, Sébastien Pillement, Ioannis Sourdis