Surajeet Ghosh

15 papers C 1Journal 9Unranked 5
YearRankTypeTitle / Venue / Authors
2026 J jnl
Hardware Accelerator for Short-Read DNA Sequence Alignment Using Burrows-Wheeler Transformation.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Sriparna Mandal, Surajeet Ghosh
2025 J jnl
CB-ED-RPL: Coordinator-Based Energy-Efficient Dynamic RPL for IoT Networks.
Wirel. Pers. Commun.
Surajeet Ghosh
2025 — conf
Scalable and Power-Efficient Merging Network Design: Automatic RTL Generation for FPGA.
ISVLSI
Ardhendu Sarkar, Sriparna Mandal, Surajeet Ghosh
2024 J jnl
Power-Efficient Pipelined Multiprocessor Architecture With Parallel Trace-Back Mechanism for Multiple Pairwise Sequence Alignment.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Ardhendu Sarkar, Surajeet Ghosh
2023 J jnl
${O(N)}$O(N) Memory-Free Hardware Architecture for Burrows-Wheeler Transform.
IEEE Trans. Computers
Surajeet Ghosh, Sanchita Saha Ray
2023 J jnl
k-Degree Parallel Comparison-Free Hardware Sorter for Complete Sorting.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Sanchita Saha Ray, Surajeet Ghosh
2022 — conf
CB-RPL: Coordinator-Based RPL for Energy Efficient Routing Mechanism.
ANTS
Surajeet Ghosh, Anirban Chand
2022 J jnl
Memory Efficient Hash-Based Longest Prefix Matching Architecture With Zero False +ve and Nearly Zero False -ve Rate for IP Processing.
IEEE Trans. Computers
Sanchita Saha Ray, Surajeet Ghosh, Bhaskar Sardar
2022 J jnl
Worst Case O(N) Comparison-Free Hardware Sorting Engine.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Sanchita Saha Ray, Dulal Adak, Surajeet Ghosh
2020 J jnl
An Energy-Efficient Pipelined-Multiprocessor Architecture for Biological Sequence Alignment.
IEEE Trans. Very Large Scale Integr. Syst.
Ardhendu Sarkar, Som Banerjee, Surajeet Ghosh
2019 — conf
A Comparison-free Hardware Sorting Engine.
ISVLSI
Surajeet Ghosh, Shaon Dasgupta, Sanchita Saha Ray
2019 C conf
Time and Space Efficient Optimal Pairwise Sequence Alignment using GPU.
TENCON
Ardhendu Sarkar, Kinjal Ray, Debaroti Chowdhury, Kishan Sahu, Solanki Kundu, Surajeet Ghosh
2018 — conf
A Fine-grained Integrated IP Lookup Engine for Multigigabit IP Processing.
ANTS
Sanchita Saha Ray, Sonal Singh, Chandrayan Sengupta, Surajeet Ghosh, Bhaskar Sardar
2016 J jnl
An SRAM-based novel hardware architecture for longest prefix matching for IP route lookup.
Photonic Netw. Commun.
Sanchita Saha Ray, Surajeet Ghosh, Bhaskar Sardar
2015 — conf
SRAM based longest prefix matching approach for multigigabit IP processing.
IEEE ANTS
Sanchita Saha Ray, Surajeet Ghosh, Bhaskar Sardar