Sunrui Zhang

11 papers B 1C 2Journal 7Unranked 1
YearRankTypeTitle / Venue / Authors
2026 J jnl
A Reconfigurable Built-In Self-Test Scheme for the Evaluation Circuits of Digital SRAM-IMC Architectures.
IEEE Trans. Very Large Scale Integr. Syst.
Sunrui Zhang, Xiaole Cui, Feng Wei, Xing Zhang
2026 J jnl
MarchGen: A March Sequence Generation Method for Faults With an Arbitrary Number of Operations in RAMs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Sunrui Zhang, Xiaole Cui, Huixian Huang, Feng Wei, Yongliang Chen, Xing Zhang
2025 J jnl
A VC Dimension-Oriented Improvement Method of PUFs for the Anti-Modeling-Attack Capability.
ACM Trans. Embed. Comput. Syst.
Yongliang Chen, Xiaole Cui, Sunrui Zhang, Xiaoxin Cui
2025 C conf
In-Memory Logic Synthesis Methods based on Read Decoupled 8T and Transpose 11T SRAMs.
ISCAS
Feng Wei, Xiaole Cui, Sunrui Zhang
2024 — conf
A Convolutional Spiking Neural Network Accelerator with the Sparsity-Aware Memory and Compressed Weights.
ASAP
Hanqing Liu, Xiaole Cui, Sunrui Zhang, Mingqi Yin, Yuanyuan Jiang, Xiaoxin Cui
2024 J jnl
An 11T SRAM Cell for the Dual-Direction In-Array Logic/CAM Operations.
IEEE Trans. Circuits Syst. II Express Briefs
Feng Wei, Xiaole Cui, Sunrui Zhang, Xing Zhang
2024 J jnl
An in-Array Build-In Self-Test Scheme for Embedded SRAM Array.
IEEE Trans. Circuits Syst. II Express Briefs
Feng Wei, Xiaole Cui, Sunrui Zhang
2024 J jnl
Design of a UE5-based digital twin platform.
CoRR
Shaoqiu Lyu, Muzhi Wang, Sunrui Zhang, Shengzhi Wang
2023 J jnl
An Area-Efficient In-Memory Implementation Method of Arbitrary Boolean Function Based on SRAM Array.
IEEE Trans. Computers
Sunrui Zhang, Xiaole Cui, Feng Wei, Xiaoxin Cui
2022 C conf
An Area-Efficient and Robust Memristive LUT Based on the Enhanced Scouting Logic Cells.
ISCAS
Xiaole Cui, Fan Liu, Sunrui Zhang, Xiaoxin Cui
2022 B conf
The Design Method of Logic Circuits based on the Voltage-Input Enhanced Scouting Logic Gates.
FPL
Fan Liu, Sunrui Zhang, Xiaole Cui