Sunil Dutt

14 papers C 1Misc 4Journal 6Unranked 3
YearRankTypeTitle / Venue / Authors
2020 — conf
Comparative Review of Approximate Multipliers.
RADIOELEKTRONIKA
Sushree Sila P. Goswami, Bikram Paul, Sunil Dutt, Gaurav Trivedi
2020 J jnl
LoBA: A Leading One Bit Based Imprecise Multiplier for Efficient Image Processing.
J. Electron. Test.
Bharat Garg, Sujit Kumar Patel, Sunil Dutt
2019 J jnl
Analysis, Modeling and Optimization of Equal Segment Based Approximate Adders.
IEEE Trans. Computers
Sunil Dutt, Satyabrata Dash, Sukumar Nandi, Gaurav Trivedi
2019 Misc conf
Design and Implementation of Low-Power High-throughput PRNGs for Security Applications.
VLSID
Bikram Paul, Apratim Khobragade, Soumith Javvaji Sai, Sushree Sila P. Goswami, Sunil Dutt, Gaurav Trivedi
2018 J jnl
Accuracy enhancement of equal segment based approximate adders.
IET Comput. Digit. Tech.
Sunil Dutt, Sukumar Nandi, Gaurav Trivedi
2018 J jnl
Analysis and Design of Adders for Approximate Computing.
ACM Trans. Embed. Comput. Syst.
Sunil Dutt, Sukumar Nandi, Gaurav Trivedi
2017 C conf
Approxhash: delay, power and area optimized approximate hash functions for cryptography applications.
SIN
Sunil Dutt, Bikram Paul, Anshu Chauhan, Sukumar Nandi, Gaurav Trivedi
2016 J jnl
Bit-width-aware constant-delay run-time Accuracy Programmable Adder for error-resilient applications.
Microelectron. J.
Bharat Garg, Sunil Dutt, G. K. Sharma
2016 Misc conf
Exploring Approximate Computing for Yield Improvement via Re-design of Adders for Error-Resilient Applications.
VLSID
Sunil Dutt, Harsh Patel, Sukumar Nandi, Gaurav Trivedi
2015 Misc conf
A High-Performance Energy-Efficient Hybrid Redundant MAC for Error-Resilient Applications.
VLSID
Sunil Dutt, Anshu Chauhan, Rahul Bhadoriya, Sukumar Nandi, Gaurav Trivedi
2015 — conf
Variability-aware parametric yield enhancement via post-silicon tuning of hybrid redundant MAC units.
VLSI-DAT
Sunil Dutt, Anshu Chauhan, Sukumar Nandi, Gaurav Trivedi
2014 Misc conf
A New Sensitivity-Driven Process Variation Aware Self-Repairing Low-Power SRAM Design.
VLSID
Nandakishor Yadav, Sunil Dutt, G. K. Sharma
2013 — conf
Double-gate FinFET process variation aware 10T SRAM cell topology design and analysis.
ECCTD
Nandakishor Yadav, Sunil Dutt, Manisha Pattanaik, G. K. Sharma
2008 J jnl
Design and Evaluation of a PBL-Based Course in Analog Electronics.
IEEE Trans. Educ.
Archana Mantri, Sunil Dutt, J. P. Gupta, Madhu Chitkara