Sungpill Choi

28 papers C 5Journal 8Unranked 15
YearRankTypeTitle / Venue / Authors
2026 — conf
A Quad-Chiplet AI SoC with Full-Chip Scalable Mesh Over 16Gb/s UCIe-Advanced Die-to-Die Interface for Large-Scale AI Inferencing.
ISSCC
Chang-Hyo Yu, Jaewan Bae, Jinseok Kim, Hongyun Kim, Wongyu Shin, Jae-Sung Yoon, Young-Jae Jin, Jungju Oh, Jaebong Lee, Eunseo Kim, Miock Chi, Sungpill Choi, Donghan Kim, Hyunje Jo, Hyunho Kim, Hyun-Seok Heo, Hyunsung Kim, Seung-Goo Kim, Myung-Hoon Choi, Sangeun Je, Junhee Ham, Juyeong Yoon, Yashael Faith Arthanto, Sung-il Bae, Sanggyu Park, JoungWoo Lee, Heeyoung Chae, Kiljun Ryu, Yongjik Kim, Jin-O. Seo, Nara Cho, Taeyoung Jeon, Gukchae Ahn, Myoungoh Ki, Junkyeong Choi, Seungcheol Baek, Daehoon Kim, Juhwan Kim, Sungmoon Kang, Sieon Son, Minseo Kim, Yeounghwan Choe, Younggeun Lee, Sunghyun Park, Jinwook Oh
2024 — conf
2.4 ATOMUS: A 5nm 32TFLOPS/128TOPS ML System-on-Chip for Latency Critical Applications.
ISSCC
Chang-Hyo Yu, Hyo-Eun Kim, Sungho Shin, Kyeongryeol Bong, Hyunsuk Kim, Yoonho Boo, Jaewan Bae, Minjae Kwon, Karim Charfi, Jinseok Kim, Hongyun Kim, Myeongbo Shim, Changsoo Ha, Wongyu Shin, Jae-Sung Yoon, Miock Chi, Byungjae Lee, Sungpill Choi, Donghan Kim, Jeongseok Woo, Seokju Yoon, Hyunje Jo, Hyunho Kim, Hyun-Seok Heo, Young-Jae Jin, Jiun Yu, Jaehwan Lee, Hyunsung Kim, Minhoo Kang, Seokhyeon Choi, Seung-Goo Kim, Myung-Hoon Choi, Jungju Oh, Yunseong Kim, Haejoon Kim, Sangeun Je, Junhee Ham, Juyeong Yoon, Jaedon Lee, Seonhyeok Park, Youngseob Park, Jaebong Lee, Boeui Hong, Jaehun Ryu, Hyunseok Ko, Kwanghyun Chung, Jongho Choi, Sunwook Jung, Yashael Faith Arthanto, Jonghyeon Kim, Heejin Cho, Hyebin Jeong, Sungmin Choi, Sujin Han, Junkyu Park, Kwangbae Lee, Sung-il Bae, Jaeho Bang, Kyeong-Jae Lee, Yeongsang Jang, Jungchul Park, Sanggyu Park, Jueon Park, Hyein Shin, Sunghyun Park, Jinwook Oh
2024 J jnl
A 0.5V, 6.2μW, 0.059mm
CoRR
Kwantae Kim, Changhyeon Kim, Sungpill Choi, Hoi-Jun Yoo
2020 — conf
A 0.5V, 6.2μW, 0.059mm
VLSI Circuits
Kwantae Kim, Changhyeon Kim, Sungpill Choi, Hoi-Jun Yoo
2020 — conf
A 4.45 ms Low-Latency 3D Point-Cloud-Based Neural Network Processor for Hand Pose Estimation in Immersive Wearable Devices.
VLSI Circuits
Dongseok Im, Sanghoon Kang, Donghyeon Han, Sungpill Choi, Hoi-Jun Yoo
2020 J jnl
DT-CNN: An Energy-Efficient Dilated and Transposed Convolutional Neural Network Processor for Region of Interest Based Image Segmentation.
IEEE Trans. Circuits Syst.
Dongseok Im, Donghyeon Han, Sungpill Choi, Sanghoon Kang, Hoi-Jun Yoo
2020 J jnl
The Development of Silicon for AI: Different Design Approaches.
IEEE Trans. Circuits Syst.
Kyuho Jason Lee, Jinmook Lee, Sungpill Choi, Hoi-Jun Yoo
2019 — conf
A 2.1TFLOPS/W Mobile Deep RL Accelerator with Transposable PE Array and Experience Compression.
ISSCC
Changhyeon Kim, Sanghoon Kang, Dongjoo Shin, Sungpill Choi, Youngwoo Kim, Hoi-Jun Yoo
2019 J jnl
CNNP-v2: A Memory-Centric Architecture for Low-Power CNN Processor on Domain-Specific Mobile Devices.
IEEE J. Emerg. Sel. Topics Circuits Syst.
Sungpill Choi, Kyeongryeol Bong, Donghyeon Han, Hoi-Jun Yoo
2019 — conf
CNNP-v2: An Energy Efficient Memory-Centric Convolutional Neural Network Processor Architecture.
AICAS
Sungpill Choi, Kyeongryeol Bong, Donghyeon Han, Hoi-Jun Yoo
2019 C conf
DT-CNN: Dilated and Transposed Convolution Neural Network Accelerator for Real-Time Image Segmentation on Mobile Devices.
ISCAS
Dongseok Im, Donghyeon Han, Sungpill Choi, Sanghoon Kang, Hoi-Jun Yoo
2018 C conf
A 141.4 mW Low-Power Online Deep Neural Network Training Processor for Real-time Object Tracking in Mobile Devices.
ISCAS
Donghyeon Han, Jinsu Lee, Jinmook Lee, Sungpill Choi, Hoi-Jun Yoo
2018 C conf
A 46.1 fps Global Matching Optical Flow Estimation Processor for Action Recognition in Mobile Devices.
ISCAS
Juhyoung Lee, Changhyeon Kim, Sungpill Choi, Dongjoo Shin, Sanghoon Kang, Hoi-Jun Yoo
2018 — conf
A 9.02mW CNN-stereo-based real-time 3D hand-gesture recognition processor for smart mobile devices.
ISSCC
Sungpill Choi, Jinsu Lee, Kyuho Lee, Hoi-Jun Yoo
2018 J jnl
A Low-Power Convolutional Neural Network Face Recognition Processor and a CIS Integrated With Always-on Face Detector.
IEEE J. Solid State Circuits
Kyeongryeol Bong, Sungpill Choi, Changhyeon Kim, Donghyeon Han, Hoi-Jun Yoo
2017 — conf
14.6 A 0.62mW ultra-low-power convolutional-neural-network face-recognition processor and a CIS integrated with always-on haar-like face detector.
ISSCC
Kyeongryeol Bong, Sungpill Choi, Changhyeon Kim, Sanghoon Kang, Youchang Kim, Hoi-Jun Yoo
2017 — conf
An ultra-low-power and mixed-mode event-driven face detection SoC for always-on mobile applications.
ESSCIRC
Changhyeon Kim, Kyeongryeol Bong, Injoon Hong, Kyuho Lee, Sungpill Choi, Hoi-Jun Yoo
2017 J jnl
Low-Power Convolutional Neural Network Processor for a Face-Recognition System.
IEEE Micro
Kyeongryeol Bong, Sungpill Choi, Changhyeon Kim, Hoi-Jun Yoo
2016 — conf
14.1 A 126.1mW real-time natural UI/UX processor with embedded deep-learning core for low-power smart glasses.
ISSCC
Seongwook Park, Sungpill Choi, Jinmook Lee, Minseo Kim, Junyoung Park, Hoi-Jun Yoo
2016 — conf
A 34pJ/level pixel depth-estimation processor with shifter-based pipelined architecture for mobile user interface.
A-SSCC
Sungpill Choi, Seongwook Park, Hoi-Jun Yoo
2016 C conf
A 43.7 mW 94 fps CMOS image sensor-based stereo matching accelerator with focal-plane rectification and analog census transformation.
ISCAS
Changhyeon Kim, Kyeongryeol Bong, Sungpill Choi, Hoi-Jun Yoo
2016 J jnl
A CMOS Image Sensor-Based Stereo Matching Accelerator With Focal-Plane Sparse Rectification and Analog Census Transform.
IEEE Trans. Circuits Syst. I Regul. Pap.
Changhyeon Kim, Kyeongryeol Bong, Sungpill Choi, Kyuho Jason Lee, Hoi-Jun Yoo
2015 — conf
4.6 A1.93TOPS/W scalable deep learning/inference processor with tetra-parallel MIMD architecture for big-data applications.
ISSCC
Seongwook Park, Kyeongryeol Bong, Dongjoo Shin, Jinmook Lee, Sungpill Choi, Hoi-Jun Yoo
2015 C conf
A 124.9fps memory-efficient hand segmentation processor for hand gesture in mobile devices.
ISCAS
Sungpill Choi, Seongwook Park, Gyeonghoon Kim, Hoi-Jun Yoo
2015 J jnl
An Energy-Efficient and Scalable Deep Learning/Inference Processor With Tetra-Parallel MIMD Architecture for Big Data Applications.
IEEE Trans. Biomed. Circuits Syst.
Seongwook Park, Junyoung Park, Kyeongryeol Bong, Dongjoo Shin, Jinmook Lee, Sungpill Choi, Hoi-Jun Yoo
2015 — conf
K-glass: Real-time markerless augmented reality smart glasses platform.
ICIT
Gyeonghoon Kim, Sungpill Choi, Hoi-Jun Yoo
2014 — conf
10.4 A 1.22TOPS and 1.52mW/MHz augmented reality multi-core processor with neural network NoC for HMD applications.
ISSCC
Gyeonghoon Kim, Youchang Kim, Kyuho Lee, Seongwook Park, Injoon Hong, Kyeongryeol Bong, Dongjoo Shin, Sungpill Choi, Jinwook Oh, Hoi-Jun Yoo
2014 — conf
A task-level pipelined many-SIMD augmented reality processor with congestion-aware network-on-chip scheduler.
COOL Chips
Gyeonghoon Kim, Seongwook Park, Kyuho Lee, Youchang Kim, Injoon Hong, Kyeongryeol Bong, Dongjoo Shin, Sungpill Choi, Junyoung Park, Hoi-Jun Yoo