Sungho Kang

27 papers A* 2A 2B 1C 3Misc 1Journal 11Unranked 7
YearRankTypeTitle / Venue / Authors
2020 J jnl
Analysis of Electroencephalography Signals on the Contents of Cognitive Function Game: Attention and Memory.
J. Medical Imaging Health Informatics
Sung-Wook Shin, Jung-Hyun Park, Woo-Jin Lee, Sungho Kang, Hyunggun Kim, Sung-Taek Chung
2017 — conf
Test item priority estimation for high parallel test efficiency under ATE debug time constraints.
ITC-Asia
Young-Woo Lee, Inhyuk Choi, Kang-Hoon Oh, James Jinsoo Ko, Sungho Kang
2016 — conf
A TSV test structure for simultaneously detecting resistive open and bridge defects in 3D-ICs.
ISOCC
Young-Woo Lee, Junghwan Kim, Inhyuk Choi, Sungho Kang
2014 J jnl
Interleaving Test Algorithm for Subthreshold Leakage-Current Defects in DRAM Considering the Equal Bit Line Stress.
IEEE Trans. Very Large Scale Integr. Syst.
Hyoyoung Shin, Youngkyu Park, Gihwa Lee, Jungsik Park, Sungho Kang
2011 — conf
New Fault Detection Algorithm for Multi-level Cell Flash Memroies.
Asian Test Symposium
Jaewon Cha, Ilwoong Kim, Sungho Kang
2010 J jnl
Pattern Mapping Method for Low Power BIST Based on Transition Freezing Method.
IEICE Trans. Inf. Syst.
Youbean Kim, Jaewon Jang, Hyunwook Son, Sungho Kang
2009 J jnl
A Fast Built-in Redundancy Analysis for Memories With Optimal Repair Rate Using a Line-Based Search Tree.
IEEE Trans. Very Large Scale Integr. Syst.
Woosik Jeong, Ilkwon Kang, Kyowon Jin, Sungho Kang
2009 J jnl
ATPG-XP: Test Generation for Maximal Crosstalk-Induced Faults.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Sunghoon Chun, Taejin Kim, Sungho Kang
2008 J jnl
A New Built-in Self Test Scheme for Phase-Locked Loops Using Internal Digital Signals.
IEICE Trans. Electron.
Youbean Kim, Kicheol Kim, Incheol Kim, Sungho Kang
2008 J jnl
A New Scan Power Reduction Scheme Using Transition Freezing for Pseudo-Random Logic BIST.
IEICE Trans. Inf. Syst.
Youbean Kim, Kicheol Kim, Incheol Kim, Hyunwook Son, Sungho Kang
2008 A conf
A New Wafer Level Latent Defect Screening Methodology for Highly Reliable DRAM Using a Response Surface Method.
ITC
Junghyun Nam, Sunghoon Chun, Gibum Koo, Yanggi Kim, Byungsoo Moon, Jonghyoung Lim, Jaehoon Joo, Sangseok Kang, Hoonjung Kim, Kyeongseon Shin, Kisang Kang, Sungho Kang
2008 — conf
A Prevenient Voltage Stress Test Method for High Density Memory.
DELTA
Jongsoo Yim, Gunbae Kim, Incheol Nam, Sangki Son, Jonghyoung Lim, Hwacheol Lee, Sangseok Kang, Byungheon Kwak, Jinseok Lee, Sungho Kang
2008 — conf
A new low energy BIST using a statistical code.
ASP-DAC
Sunghoon Chun, Taejin Kim, Sungho Kang
2006 — conf
TOSCA: Total Scan Power Reduction Architecture based on Pseudo-Random Built-in Self Test Structure.
ATS
Youbean Kim, DongSup Song, Kicheol Kim, Incheol Kim, Sungho Kang
2005 J jnl
A New Low Power Test Pattern Generator for BIST Architecture.
IEICE Trans. Electron.
Kicheol Kim, DongSub Song, Incheol Kim, Sungho Kang
2004 J jnl
Code-width testing-based compact ADC BIST circuit.
IEEE Trans. Circuits Syst. II Express Briefs
Dongmyung Lee, Kwisung Yoo, Kicheol Kim, Gunhee Han, Sungho Kang
2004 J jnl
New distributed arithmetic algorithm for low-power FIR filter implementation.
IEEE Signal Process. Lett.
Sangyun Hwang, Gunhee Han, Sungho Kang, Jaeseok Kim
2002 — conf
A New Survival Architecture for Network Processors.
AISA
Sung-il Bae, Daesik Seo, Gilyoung Kang, Sungho Kang
2001 J jnl
A simple, scalable, and stable explicit rate allocation algorithm for MAX-MIN flow control with minimum rate guarantee.
IEEE/ACM Trans. Netw.
Song Chong, Sangho Lee, Sungho Kang
2001 B conf
Control-theoretic max-min flow control with minimum rate guarantee.
GLOBECOM
Song Chong, Sangho Lee, Sungho Kang
1999 C conf
A New Weight Set Generation Algorithm for Weighted Random Pattern Generation.
ICCD
Hangkyu Lee, Sungho Kang
1997 C conf
Built-in Self Test for Contect Addressable Memories.
ICCD
Yong Seok Kang, Jong Cheol Lee, Sungho Kang
1996 Misc conf
Efficient Simulation Model Generation Using Automatic Programming Techniques.
WSC
Jae-Wook Lee, Sungho Kang
1994 A conf
Fastpath: A Path-Delay Test Generator for Standard Scan Designs.
ITC
Bill Underwood, Wai-On Law, Sungho Kang, Haluk Konuk
1994 C conf
Path-Delay Fault Simulation for a Standard Scan Design Methodology.
ICCD
Sungho Kang, Wai-On Law, Bill Underwood
1983 A* conf
Linear ordering and application to placement.
DAC
Sungho Kang
1981 A* conf
Automatic PLA synthesis from a DDL-P description.
DAC
Sungho Kang, William M. van Cleemput