Sung Kyu Lim

347 papers A* 37A 90B 3C 9Misc 3Journal 121Unranked 84
YearRankTypeTitle / Venue / Authors
2026 J jnl
A Hybrid Reinforcement Learning Framework for Efficient Physical Design Parameter Tuning.
ACM Trans. Design Autom. Electr. Syst.
Hao-Hsiang Hsiao, Yi-Chen Lu, Pruek Vanna-Iampikul, Sung Kyu Lim
2026 — conf
Boosting Scalability and Performance: Macro Placement for Flexible 3D-Stacked ML Accelerators.
ASP-DAC
Jiawei Hu, Canlin Zhang, Pruek Vanna-Iampikul, Tushar Krishna, Sung Kyu Lim
2026 — conf
DPO-3D: Differentiable Power Delivery Network Optimization via Flexible Modeling for Routability and IR-Drop Tradeoff in Face-to-Face 3D ICs.
ASP-DAC
Zhen Zhuang, Zheng Yang, Yuxuan Zhao, Jiawei Hu, Bei Yu, Sung Kyu Lim, Tsung-Yi Ho
2026 — conf
Differentiable Tier Assignment for Timing and Congestion-Aware Routing in 3D ICs.
ASP-DAC
Yuan-Hsiang Lu, Hao-Hsiang Hsiao, Yi-Chen Lu, Haoxing Ren, Sung Kyu Lim
2026 J jnl
Dynamic Interposer Obfuscation Through Distributed Scramblers in Heterogeneously Integrated 2.5D ICs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Jonti Talukdar, Seungmin Woo, Sung Kyu Lim, Krishnendu Chakrabarty
2026 — conf
Graph Attention-Based Current Crowding Analysis at TSV Interfaces in 3D Power Delivery Networks.
ASP-DAC
Zheng Yang, Zhen Zhuang, Tsung-Yi Ho, Sung Kyu Lim
2025 J jnl
3-nm CFET Process Design Kit for Advancing MOL-Aware Modeling for Precise Circuit Performance Analysis.
IEEE Access
Seong-Ji Min, Sangpill Kim, Jun-Hyeok Lee, Seung-Geun Jung, Sung Kyu Lim, Hyunyong Yu
2025 A conf
3D Acceleration for Mixture-of-Experts and Multi-Head Attention Spiking Transformers with Dynamic Head Pruning.
ICCAD
Boxun Xu, Junyoung Hwang, Pruek Vanna-Iampikul, Yuxuan Yin, Sung Kyu Lim, Peng Li
2025 J jnl
3DNN-Xplorer: A Machine Learning Framework for Design Space Exploration of Heterogeneous 3-D DNN Accelerators.
IEEE Trans. Very Large Scale Integr. Syst.
Gauthaman Murali, Min Gyu Park, Sung Kyu Lim
2025 A* conf
A Systematic Approach for Multi-objective Double-side Clock Tree Synthesis.
DAC
Xun Jiang, Haoran Lu, Yuxuan Zhao, Jiarui Wang, Zizheng Guo, Heng Wu, Bei Yu, Sung Kyu Lim, Runsheng Wang, Ru Huang, Yibo Lin
2025 J jnl
A Systematic Approach for Multi-objective Double-side Clock Tree Synthesis.
CoRR
Xun Jiang, Haoran Lu, Yuxuan Zhao, Jiarui Wang, Zizheng Guo, Heng Wu, Bei Yu, Sung Kyu Lim, Runsheng Wang, Ru Huang, Yibo Lin
2025 A* conf
BS-PDN-Last: Towards Optimal Power Delivery Network Design With Multifunctional Backside Metal Layers.
DAC
Min Gyu Park, Amaan Rahman, Sung Kyu Lim
2025 A conf
BUFFALO: PPA-Configurable, LLM-based Buffer Tree Generation via Group Relative Policy Optimization.
ICCAD
Hao-Hsiang Hsiao, Yi-Chen Lu, Sung Kyu Lim, Haoxing Ren
2025 A conf
Closing the Gap: Advantages of Block-Level over Gate-Level in 3D IC Design for Advanced Nodes.
ICCAD
Min Gyu Park, Pruek Vanna-Iampikul, Sung Kyu Lim
2025 A* conf
DCO-3D: Differentiable Congestion Optimization in 3D ICs.
DAC
Hao-Hsiang Hsiao, Yi-Chen Lu, Pruek Vanna-Iampikul, Anthony Agnesina, Rongjian Liang, Yuan-Hsiang Lu, Haoxing Ren, Sung Kyu Lim
2025 A* conf
GNN-MLS: Signal Routing in Mixed-Node 3D ICs through GNN-Assisted Metal Layer Sharing.
DAC
Jiawei Hu, Pruek Vanna-Iampikul, Zhen Zhuang, Tsung-Yi Ho, Sung Kyu Lim
2025 J jnl
Glass Interposer Integration of Logic and Memory Chiplets: PPA and Power/Signal Integrity Benefits.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Pruek Vanna-Iampikul, Seungmin Woo, Serhat Erdogan, Lingjun Zhu, Mohanalingam Kathaperumal, Ravi Agarwal, Ram Gupta, Kevin Rinebold, Madhavan Swaminathan, Sung Kyu Lim
2025 A* conf
InsightAlign: A Transferable Physical Design Recipe Recommender Based on Design Insights.
DAC
Hao-Hsiang Hsiao, Sudipto Kundu, Wei Zeng, Wei-Ting Chan, Deyuan Guo, Sung Kyu Lim
2025 — conf
Invited: Modeling and Design Methodology for Backside Integration of Voltage Converters.
ISPD
Amaan Rahman, Hang Yang, Cong Hao, Sung Kyu Lim
2025 A conf
MIX-3D: AI-based Architecture-Circuit Co-design Methodology for Mixed-Node, Mixed-Area 3D ICs.
ISLPED
Min Gyu Park, Doyun Kim, Sung Kyu Lim
2025 — conf
ML-Based Fine-Grained Modeling of DC Current Crowding in Power Delivery TSVs for Face-to-Face 3D ICs.
ISPD
Zheng Yang, Zhen Zhuang, Bei Yu, Tsung-Yi Ho, Martin D. F. Wong, Sung Kyu Lim
2025 A conf
On-chip Integrated Voltage Regulators: Frontside, Backside, or Off-Chipƒ.
ISLPED
Amaan Rahman, Seungmin Woo, Zheng Yang, Sung Kyu Lim
2025 — conf
Placement-Aware 3D Net-to-Pad Assignment for Array-Style Hybrid Bonding 3D ICs.
ISPD
Pruek Vanna-Iampikul, Jun-Sik Yoon, Chaeryung Park, Gary Yeap, Sung Kyu Lim
2025 A conf
Snake-3D: Differentiable Learning for Cross-Tier Logic Path Snaking Optimization in 3D ICs.
ICCAD
Yen-Hsiang Huang, Sung Kyu Lim
2024 J jnl
A PPA Study for Heterogeneous 3-D IC Options: Monolithic, Hybrid Bonding, and Microbumping.
IEEE Trans. Very Large Scale Integr. Syst.
Jinwoo Kim, Lingjun Zhu, Hakki Mert Torun, Madhavan Swaminathan, Sung Kyu Lim
2024 A conf
AI-Driven Evaluation and Optimization of Bump Pitch Effects on Chiplet and Interposer Design Quality.
ICCAD
Seungmin Woo, Pruek Vanna-Iampikul, Sung Kyu Lim
2024 — conf
Back-side Design Methodology for Power Delivery Network and Clock Routing.
VLSI Technology and Circuits
Pruek Vanna-Iampikul, Hang Yang, Jungyoun Kwak, Joyce X. Hu, Amaan Rahman, Nesara Eranna Bethur, Callie Hao, Shimeng Yu, Sung Kyu Lim
2024 — conf
FastTuner: Transferable Physical Design Parameter Optimization using Fast Reinforcement Learning.
ISPD
Hao-Hsiang Hsiao, Yi-Chen Lu, Pruek Vanna-Iampikul, Sung Kyu Lim
2024 J jnl
GAN-Place: Advancing Open Source Placers to Commercial-quality Using Generative Adversarial Networks and Transfer Learning.
ACM Trans. Design Autom. Electr. Syst.
Yi-Chen Lu, Haoxing Ren, Hao-Hsiang Hsiao, Sung Kyu Lim
2024 A* conf
GNN-assisted Back-side Clock Routing Methodology for Advance Technologies.
DAC
Nesara Eranna Bethur, Pruek Vanna-Iampikul, Odysseas Zografos, Lingjun Zhu, Giuliano Sisto, Dragomir Milojevic, Alberto García Ortiz, Geert Hellings, Julien Ryckaert, Francky Catthoor, Sung Kyu Lim
2024 A conf
Hetero-3D: Maximizing Performance and Power Delivery Benefits of Heterogeneous 3D ICs.
ISLPED
Lingjun Zhu, Jiawei Hu, Gauthaman Murali, Sung Kyu Lim
2024 J jnl
Heterogeneous Monolithic 3-D IC Designs: Challenges, EDA Solutions, and Power, Performance, Cost Tradeoffs.
IEEE Trans. Very Large Scale Integr. Syst.
Sai Pentapati, Sung Kyu Lim
2024 J jnl
Hier-3D: A Methodology for Physical Hierarchy Exploration of 3-D ICs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Nesara Eranna Bethur, Anthony Agnesina, Moritz Brunion, Alberto García Ortiz, Francky Catthoor, Dragomir Milojevic, Manu Komalan, Matheus A. Cavalcante, Samuel Riedel, Luca Benini, Sung Kyu Lim
2024 A* conf
ML-based Physical Design Parameter Optimization for 3D ICs: From Parameter Selection to Optimization.
DAC
Hao-Hsiang Hsiao, Pruek Vanna-Iampikul, Yi-Chen Lu, Sung Kyu Lim
2024 A conf
Multi-Tier 3D SRAM Module Design: Targeting Bit-Line and Word-Line Folding.
ICCAD
Aditya Sridharan Iyer, Daehyun Kim, Saibal Mukhopadhyay, Sung Kyu Lim
2024 J jnl
On Legalization of Die Bonding Bumps and Pads for 3-D ICs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Yen-Hsiang Huang, Sai Pentapati, Anthony Agnesina, Moritz Brunion, Sung Kyu Lim
2024 J jnl
Pin-3D: Effective Physical Design Methodology for Multidie Co-Optimization in Monolithic 3-D ICs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Sai Pentapati, Kyungwook Chang, Sung Kyu Lim
2024 A conf
Spiking Transformer Hardware Accelerators in 3D Integration.
ICCAD
Boxun Xu, Junyoung Hwang, Pruek Vanna-Iampikul, Sung Kyu Lim, Peng Li
2024 J jnl
Spiking Transformer Hardware Accelerators in 3D Integration.
CoRR
Boxun Xu, Junyoung Hwang, Pruek Vanna-Iampikul, Sung Kyu Lim, Peng Li
2024 J jnl
Towards 3D Acceleration for low-power Mixture-of-Experts and Multi-Head Attention Spiking Transformers.
CoRR
Boxun Xu, Junyoung Hwang, Pruek Vanna-Iampikul, Yuxuan Yin, Sung Kyu Lim, Peng Li
2023 A conf
3DNN-Xplorer: A Machine Learning Framework for Design Space Exploration of Heterogeneous 3D DNN Accelerators.
ICCAD
Gauthaman Murali, Aditya Iyer, Navneeth Ravichandran, Sung Kyu Lim
2023 C conf
A 3D Implementation of Convolutional Neural Network for Fast Inference.
ISCAS
Narasinga Rao Miniskar, Pruek Vanna-Iampikul, Aaron R. Young, Sung Kyu Lim, Frank Liu, Jieun Yoo, Corrinne Mills, Nhan Tran, Farah Fahim, Jeffrey S. Vetter
2023 A conf
A Comparative Study on Front-Side, Buried and Back-Side Power Rail Topologies in 3nm Technology Node.
ISLPED
Sandra Maria Shaji, Lingjun Zhu, Jun-Sik Yoon, Sung Kyu Lim
2023 J jnl
A PPA Study of Reinforced Placement Parameter Autotuning: Pseudo-3D vs. True-3D Placers.
ACM Trans. Design Autom. Electr. Syst.
Gauthaman Murali, Anthony Agnesina, Sung Kyu Lim
2023 J jnl
Abisko: Deep codesign of an architecture for spiking neural networks using novel neuromorphic materials.
Int. J. High Perform. Comput. Appl.
Jeffrey S. Vetter, Prasanna Date, Farah Fahim, Shruti R. Kulkarni, Petro Maksymovych, A. Alec Talin, Marc González Tallada, Pruek Vanna-Iampikul, Aaron R. Young, David Brooks, Yu Cao, Gu-Yeon Wei, Sung Kyu Lim, Frank Liu, Matthew J. Marinella, Bobby G. Sumpter, Narasinga Rao Miniskar
2023 J jnl
Built-In Self-Test of High-Density and Realistic ILV Layouts in Monolithic 3-D ICs.
IEEE Trans. Very Large Scale Integr. Syst.
Arjun Chaudhuri, Sanmitra Banerjee, Jinwoo Kim, Sung Kyu Lim, Krishnendu Chakrabarty
2023 — conf
DREAM-GAN: Advancing DREAMPlace towards Commercial-Quality using Generative Adversarial Learning.
ISPD
Yi-Chen Lu, Haoxing Ren, Hao-Hsiang Hsiao, Sung Kyu Lim
2023 J jnl
ECO-GNN: Signoff Power Prediction Using Graph Neural Networks with Subgraph Approximation.
ACM Trans. Design Autom. Electr. Syst.
Yi-Chen Lu, Siddhartha Nath, Sai Pentapati, Sung Kyu Lim
2023 J jnl
GNN-based Multi-bit Flip-flop Clustering and Post-clustering Design Optimization for Energy-efficient 3D ICs.
ACM Trans. Design Autom. Electr. Syst.
Pruek Vanna-Iampikul, Yi-Chen Lu, Da Eun Shim, Sung Kyu Lim
2023 A* conf
Glass Interposer Integration of Logic and Memory Chiplets: PPA and Power/Signal Integrity Benefits.
DAC
Pruek Vanna-Iampikul, Lingjun Zhu, Serhat Erdogan, Mohanalingam Kathaperumal, Ravi Agarwal, Ram Gupta, Kevin Rinebold, Sung Kyu Lim
2023 A* conf
INVITED: Design Automation Needs for Monolithic 3D ICs: Accomplishments and Gaps.
DAC
Lingjun Zhu, Sung Kyu Lim
2023 J jnl
On Continuing DNN Accelerator Architecture Scaling Using Tightly Coupled Compute-on-Memory 3-D ICs.
IEEE Trans. Very Large Scale Integr. Syst.
Gauthaman Murali, Aditya Iyer, Lingjun Zhu, Jianming Tong, Francisco Muñoz-Martínez, Srivatsa Rangachar Srinivasa, Tanay Karnik, Tushar Krishna, Sung Kyu Lim
2023 — conf
On Legalization of Die Bonding Bumps and Pads for 3D ICs.
ISPD
Sai Pentapati, Anthony Agnesina, Moritz Brunion, Yen-Hsiang Huang, Sung Kyu Lim
2023 J jnl
Parameter Optimization of VLSI Placement Through Deep Reinforcement Learning.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Anthony Agnesina, Kyungwook Chang, Sung Kyu Lim
2023 A* conf
RL-CCD: Concurrent Clock and Data Optimization using Attention-Based Self-Supervised Reinforcement Learning.
DAC
Yi-Chen Lu, Wei-Ting Chan, Deyuan Guo, Sudipto Kundu, Vishal Khandelwal, Sung Kyu Lim
2023 A conf
Securing Heterogeneous 2.5D ICs Against IP Theft through Dynamic Interposer Obfuscation.
DATE
Jonti Talukdar, Arjun Chaudhuri, Jinwoo Kim, Sung Kyu Lim, Krishnendu Chakrabarty
2023 J jnl
Snap-3D: A Constrained Placement-Driven Physical Design Methodology for High Performance 3-D ICs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Pruek Vanna-Iampikul, Chengjia Shao, Yi-Chen Lu, Sai Pentapati, Yun Heo, Jae-Seung Choi, Sung Kyu Lim
2023 J jnl
Transferable Graph Neural Network-Based Delay-Fault Localization for Monolithic 3-D ICs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Shao-Chun Hung, Sanmitra Banerjee, Arjun Chaudhuri, Jinwoo Kim, Sung Kyu Lim, Krishnendu Chakrabarty
2023 A conf
Ultra-Dense 3D Physical Design Unlocks New Architectural Design Points with Large Benefits.
DATE
Tathagata Srimani, Robert M. Radway, Jinwoo Kim, Kartik Prabhu, Dennis Rich, Carlo Gilardi, Priyanka Raina, Max M. Shulaker, Sung Kyu Lim, Subhasish Mitra
2022 A conf
3D IC Tier Partitioning of Memory Macros: PPA vs. Thermal Tradeoffs.
ISLPED
Lingjun Zhu, Nesara Eranna Bethur, Yi-Chen Lu, Youngsang Cho, Yunhyeok Im, Sung Kyu Lim
2022 J jnl
A Clock Tree Prediction and Optimization Framework Using Generative Adversarial Learning.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Yi-Chen Lu, Jeehyun Lee, Anthony Agnesina, Kambiz Samadi, Sung Kyu Lim
2022 J jnl
A Compute-in-Memory Hardware Accelerator Design With Back-End-of-Line (BEOL) Transistor Based Reconfigurable Interconnect.
IEEE J. Emerg. Sel. Topics Circuits Syst.
Yandong Luo, Sourav Dutta, Ankit Kaul, Sung Kyu Lim, Muhannad S. Bakir, Suman Datta, Shimeng Yu
2022 J jnl
A Machine Learning-Powered Tier Partitioning Methodology for Monolithic 3-D ICs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Yi-Chen Lu, Sai Pentapati, Lingjun Zhu, Gauthaman Murali, Kambiz Samadi, Sung Kyu Lim
2022 J jnl
A ReRAM Memory Compiler for Monolithic 3D Integrated Circuits in a Carbon Nanotube Process.
ACM J. Emerg. Technol. Comput. Syst.
Edward Lee, Daehyun Kim, Jinwoo Kim, Sung Kyu Lim, Saibal Mukhopadhyay
2022 — conf
ART-3D: Analytical 3D Placement with Reinforced Parameter Tuning for Monolithic 3D ICs.
ISPD
Gauthaman Murali, Sandra Maria Shaji, Anthony Agnesina, Guojie Luo, Sung Kyu Lim
2022 J jnl
Built-in Self-Test and Fault Localization for Inter-Layer Vias in Monolithic 3D ICs.
ACM J. Emerg. Technol. Comput. Syst.
Arjun Chaudhuri, Sanmitra Banerjee, Jinwoo Kim, Heechun Park, Bon Woong Ku, Sukeshwar Kannan, Krishnendu Chakrabarty, Sung Kyu Lim
2022 J jnl
Design Automation and Test Solutions for Monolithic 3D ICs.
ACM J. Emerg. Technol. Comput. Syst.
Lingjun Zhu, Arjun Chaudhuri, Sanmitra Banerjee, Gauthaman Murali, Pruek Vanna-Iampikul, Krishnendu Chakrabarty, Sung Kyu Lim
2022 J jnl
Design-Aware Partitioning-Based 3-D IC Design Flow With 2-D Commercial Tools.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Kyungwook Chang, Saurabh Sinha, Brian Cline, Greg Yeric, Sung Kyu Lim
2022 — conf
Driving Early Physical Synthesis Exploration through End-of-Flow Total Power Prediction.
MLCAD
Yi-Chen Lu, Wei-Ting Chan, Vishal Khandelwal, Sung Kyu Lim
2022 A conf
Hier-3D: A Hierarchical Physical Design Methodology for Face-to-Face-Bonded 3D ICs.
ISLPED
Anthony Agnesina, Moritz Brunion, Alberto García Ortiz, Francky Catthoor, Dragomir Milojevic, Manu Komalan, Matheus A. Cavalcante, Samuel Riedel, Luca Benini, Sung Kyu Lim
2022 A conf
MemPool-3D: Boosting Performance and Efficiency of Shared-L1 Memory Many-Core Clusters with 3D Integration.
DATE
Matheus A. Cavalcante, Anthony Agnesina, Samuel Riedel, Moritz Brunion, Alberto García-Ortiz, Dragomir Milojevic, Francky Catthoor, Sung Kyu Lim, Luca Benini
2022 J jnl
Metal Layer Sharing: A Routing Optimization Technique for Monolithic 3D ICs.
IEEE Trans. Very Large Scale Integr. Syst.
Sai Pentapati, Sung Kyu Lim
2022 A conf
On Advancing Physical Design Using Graph Neural Networks.
ICCAD
Yi-Chen Lu, Sung Kyu Lim
2022 — conf
Placement Optimization via PPA-Directed Graph Clustering.
MLCAD
Yi-Chen Lu, Tian Yang, Sung Kyu Lim, Haoxing Ren
2022 — conf
Routing Layer Sharing: A New Opportunity for Routing Optimization in Monolithic 3D ICs.
ISPD
Sai Pentapati, Sung Kyu Lim
2022 J jnl
Unsupervised Digit Recognition Using Cosine Similarity In A Neuromemristive Competitive Learning System.
ACM J. Emerg. Technol. Comput. Syst.
Bon Woong Ku, Catherine D. Schuman, Md Musabbir Adnan, Tiffany M. Mintz, Raphael C. Pooser, Kathleen E. Hamilton, Garrett S. Rose, Sung Kyu Lim
2021 — conf
Architecture, Dataflow and Physical Design Implications of 3D-ICs for DNN-Accelerators.
ISQED
Jan Moritz Joseph, Ananda Samajdar, Lingjun Zhu, Rainer Leupers, Sung Kyu Lim, Thilo Pionteck, Tushar Krishna
2021 — conf
Automatic Generation of Translators for Packet-Based and Emerging Protocols.
ISQED
Brian Crafton, Arijit Raychowdhury, Sung Kyu Lim
2021 J jnl
Clock Delivery Network Design and Analysis for Interposer-Based 2.5-D Heterogeneous Systems.
IEEE Trans. Very Large Scale Integr. Syst.
Gauthaman Murali, Heechun Park, Eric Qin, Hakki Mert Torun, Majid Ahadi Dolatsara, Madhavan Swaminathan, Tushar Krishna, Sung Kyu Lim
2021 A conf
Doomed Run Prediction in Physical Design by Exploiting Sequential Flow and Graph Learning.
ICCAD
Yi-Chen Lu, Siddhartha Nath, Vishal Khandelwal, Sung Kyu Lim
2021 A* conf
FAFNIR: Accelerating Sparse Gathering by Using Efficient Near-Memory Intelligent Reduction.
HPCA
Bahar Asgari, Ramyad Hadidi, Jiashen Cao, Da Eun Shim, Sung Kyu Lim, Hyesoon Kim
2021 A conf
Heterogeneous 3D ICs: Current Status and Future Directions for Physical Design Technologies.
DATE
Gauthaman Murali, Sung Kyu Lim
2021 J jnl
Heterogeneous Mixed-Signal Monolithic 3-D In-Memory Computing Using Resistive RAM.
IEEE Trans. Very Large Scale Integr. Syst.
Gauthaman Murali, Xiaoyu Sun, Shimeng Yu, Sung Kyu Lim
2021 A* conf
Heterogeneous Monolithic 3D ICs: EDA Solutions, and Power, Performance, Cost Tradeoffs.
DAC
Sai Surya Kiran Pentapati, Sung Kyu Lim
2021 J jnl
High-Performance Logic-on-Memory Monolithic 3-D IC Designs for Arm Cortex-A Processors.
IEEE Trans. Very Large Scale Integr. Syst.
Lingjun Zhu, Lennart Bamberg, Sai Surya Kiran Pentapati, Kyungwook Chang, Francky Catthoor, Dragomir Milojevic, Manu Komalan, Brian Cline, Saurabh Sinha, Xiaoqing Xu, Alberto García-Ortiz, Sung Kyu Lim
2021 — conf
ML-Based Wire RC Prediction in Monolithic 3D ICs with an Application to Full-Chip Optimization.
ISPD
Sai Surya Kiran Pentapati, Bon Woong Ku, Sung Kyu Lim
2021 J jnl
MemPool-3D: Boosting Performance and Efficiency of Shared-L1 Memory Many-Core Clusters with 3D Integration.
CoRR
Matheus A. Cavalcante, Anthony Agnesina, Samuel Riedel, Moritz Brunion, Alberto García-Ortiz, Dragomir Milojevic, Francky Catthoor, Sung Kyu Lim, Luca Benini
2021 A* conf
Micro-bumping, Hybrid Bonding, or Monolithic? A PPA Study for Heterogeneous 3D IC Options.
DAC
Jinwoo Kim, Lingjun Zhu, Hakki Mert Torun, Madhavan Swaminathan, Sung Kyu Lim
2021 A conf
ParaMitE: Mitigating Parasitic CNFETs in the Presence of Unetched CNTs.
ICCAD
Sanmitra Banerjee, Arjun Chaudhuri, Jinwoo Kim, Gauthaman Murali, Mark Nelson, Sung Kyu Lim, Krishnendu Chakrabarty
2021 — conf
Physical Design Challenges and Solutions for Emerging Heterogeneous 3D Integration Technologies.
ISPD
Lingjun Zhu, Sung Kyu Lim
2021 A conf
Power Delivery and Thermal-Aware Arm-Based Multi-Tier 3D Architecture.
ISLPED
Lingjun Zhu, Tuan Ta, Rossana Liu, Rahul Mathur, Xiaoqing Xu, Shidhartha Das, Ankit Kaul, Alejandro Rico, Doug Joseph, Brian Cline, Sung Kyu Lim
2021 J jnl
Power Supply Noise-Aware At-Speed Delay Fault Testing of Monolithic 3-D ICs.
IEEE Trans. Very Large Scale Integr. Syst.
Shao-Chun Hung, Yi-Chen Lu, Sung Kyu Lim, Krishnendu Chakrabarty
2021 A conf
Power, Performance, Area and Cost Analysis of Memory-on-Logic Face-to-Face Bonded 3D Processor Designs.
ISLPED
Anthony Agnesina, Moritz Brunion, Jinwoo Kim, Alberto García Ortiz, Dragomir Milojevic, Francky Catthoor, Manu Perumkunnil, Sung Kyu Lim
2021 J jnl
Pseudo-3D Physical Design Flow for Monolithic 3D ICs: Comparisons and Enhancements.
ACM Trans. Design Autom. Electr. Syst.
Heechun Park, Bon Woong Ku, Kyungwook Chang, Da Eun Shim, Sung Kyu Lim
2021 A* conf
RL-Sizer: VLSI Gate Sizing for Timing Optimization using Deep Reinforcement Learning.
DAC
Yi-Chen Lu, Siddhartha Nath, Vishal Khandelwal, Sung Kyu Lim
2021 A conf
Security Closure of Physical Layouts ICCAD Special Session Paper.
ICCAD
Johann Knechtel, Jayanth Gopinath, Jitendra Bhandari, Mohammed Ashraf, Hussam Amrouch, Shekhar Borkar, Sung Kyu Lim, Ozgur Sinanoglu, Ramesh Karri
2021 — conf
Snap-3D: A Constrained Placement-Driven Physical Design Methodology for Face-to-Face-Bonded 3D ICs.
ISPD
Pruek Vanna-Iampikul, Chengjia Shao, Yi-Chen Lu, Sai Pentapati, Sung Kyu Lim
2021 — conf
The Law of Attraction: Affinity-Aware Placement Optimization using Graph Neural Networks.
ISPD
Yi-Chen Lu, Sai Pentapati, Sung Kyu Lim
2020 J jnl
A COTS-Based Novel 3-D DRAM Memory Cube Architecture for Space Applications.
IEEE Trans. Very Large Scale Integr. Syst.
Anthony Agnesina, James Yamaguchi, Christian Krutzik, John Carson, Jean Yang-Scharlotta, Sung Kyu Lim
2020 A conf
A Fast Learning-Driven Signoff Power Optimization Framework.
ICCAD
Yi-Chen Lu, Siddhartha Nath, Sai Surya Kiran Pentapati, Sung Kyu Lim
2020 C conf
A Fault-Tolerant and High-Speed Memory Controller Targeting 3D Flash Memory Cubes for Space Applications.
ICCD
Anthony Agnesina, Da Eun Shim, James Yamaguchi, Christian Krutzik, John Carson, Dan Nakamura, Sung Kyu Lim
2020 J jnl
Advances in Design and Test of Monolithic 3-D ICs.
IEEE Des. Test
Arjun Chaudhuri, Sanmitra Banerjee, Heechun Park, Jinwoo Kim, Gauthaman Murali, Edward Lee, Daehyun Kim, Sung Kyu Lim, Saibal Mukhopadhyay, Krishnendu Chakrabarty
2020 J jnl
Architecture, Chip, and Package Codesign Flow for Interposer-Based 2.5-D Chiplet Integration Enabling Heterogeneous IP Reuse.
IEEE Trans. Very Large Scale Integr. Syst.
Jinwoo Kim, Gauthaman Murali, Heechun Park, Eric Qin, Hyoukjun Kwon, Venkata Chaitanya Krishna Chekuri, Nael Mizanur Rahman, Nihar Dasari, Arvind Singh, Minah Lee, Hakki Mert Torun, Kallol Roy, Madhavan Swaminathan, Saibal Mukhopadhyay, Tushar Krishna, Sung Kyu Lim
2020 J jnl
Architecture, Dataflow and Physical Design Implications of 3D-ICs for DNN-Accelerators.
CoRR
Jan Moritz Joseph, Ananda Samajdar, Lingjun Zhu, Rainer Leupers, Sung Kyu Lim, Thilo Pionteck, Tushar Krishna
2020 J jnl
Breaking Barriers: Maximizing Array Utilization for Compute In-Memory Fabrics.
CoRR
Brian Crafton, Samuel Spetalnick, Gauthaman Murali, Tushar Krishna, Sung Kyu Lim, Arijit Raychowdhury
2020 C conf
Breaking Barriers: Maximizing Array Utilization for Compute in-Memory Fabrics.
VLSI-SOC
Brian Crafton, Samuel Spetalnick, Gauthaman Murali, Tushar Krishna, Sung Kyu Lim, Arijit Raychowdhury
2020 J jnl
Compact-2D: A Physical Design Methodology to Build Two-Tier Gate-Level 3-D ICs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Bon Woong Ku, Kyungwook Chang, Sung Kyu Lim
2020 — conf
Full-Chip Electro-Thermal Coupling Extraction and Analysis for Face-to-Face Bonded 3D ICs.
ISPD
Lingjun Zhu, Kyungwook Chang, Dusan Petranovic, Saurabh Sinha, Yun Seop Yu, Sung Kyu Lim
2020 J jnl
Heterogeneous 3D Integration for a RISC-V System With STT-MRAM.
IEEE Comput. Archit. Lett.
Lingjun Zhu, Lennart Bamberg, Anthony Agnesina, Francky Catthoor, Dragomir Milojevic, Manu Komalan, Julien Ryckaert, Alberto García-Ortiz, Sung Kyu Lim
2020 J jnl
Improving FPGA-Based Logic Emulation Systems through Machine Learning.
ACM Trans. Design Autom. Electr. Syst.
Anthony Agnesina, Sung Kyu Lim, Etienne Lepercq, Jose Escobedo Del Cid
2020 A conf
Macro-3D: A Physical Design Methodology for Face-to-Face-Stacked Heterogeneous 3D ICs.
DATE
Lennart Bamberg, Alberto García Ortiz, Lingjun Zhu, Sai Pentapati, Da Eun Shim, Sung Kyu Lim
2020 A conf
Pin-3D: A Physical Synthesis and Post-Layout Optimization Flow for Heterogeneous Monolithic 3D ICs.
ICCAD
Sai Surya Kiran Pentapati, Kyungwook Chang, Vassilios Gerousis, Rwik Sengupta, Sung Kyu Lim
2020 A conf
Pin-in-the-middle: an efficient block pin assignment methodology for block-level monolithic 3D ICs.
ISLPED
Bon Woong Ku, Sung Kyu Lim
2020 — conf
Power Supply Noise-Aware Scan Test Pattern Reshaping for At-Speed Delay Fault Testing of Monolithic 3D ICs
ATS
Shao-Chun Hung, Yi-Chen Lu, Sung Kyu Lim, Krishnendu Chakrabarty
2020 — conf
Pseudo-3D Approaches for Commercial-Grade RTL-to-GDS Tool Flow Targeting Monolithic 3D ICs.
ISPD
Heechun Park, Bon Woong Ku, Kyungwook Chang, Da Eun Shim, Sung Kyu Lim
2020 A conf
RTL-to-GDS Design Tools for Monolithic 3D ICs.
ICCAD
Jinwoo Kim, Gauthaman Murali, Pruek Vanna-Iampikul, Edward Lee, Daehyun Kim, Arjun Chaudhuri, Sanmitra Banerjee, Krishnendu Chakrabarty, Saibal Mukhopadhyay, Sung Kyu Lim
2020 C conf
Silicon vs. Organic Interposer: PPA and Reliability Tradeoffs in Heterogeneous 2.5D Chiplet Integration.
ICCD
Jinwoo Kim, Venkata Chaitanya Krishna Chekuri, Nael Mizanur Rahman, Majid Ahadi Dolatsara, Hakki Mert Torun, Madhavan Swaminathan, Saibal Mukhopadhyay, Sung Kyu Lim
2020 — conf
Statistical Array Allocation and Partitioning for Compute In-Memory Fabrics.
VLSI-SoC (Selected Papers)
Brian Crafton, Samuel Spetalnick, Gauthaman Murali, Tushar Krishna, Sung Kyu Lim, Arijit Raychowdhury
2020 A* conf
TP-GNN: A Graph Neural Network Framework for Tier Partitioning in Monolithic 3D ICs.
DAC
Yi-Chen Lu, Sai Surya Kiran Pentapati, Lingjun Zhu, Kambiz Samadi, Sung Kyu Lim
2020 A conf
VLSI Placement Parameter Optimization using Deep Reinforcement Learning.
ICCAD
Anthony Agnesina, Kyungwook Chang, Sung Kyu Lim
2020 J jnl
Vortex: OpenCL Compatible RISC-V GPGPU.
CoRR
Fares Elsabbagh, Blaise Tine, Priyadarshini Roshan, Ethan Lyons, Euna Kim, Da Eun Shim, Lingjun Zhu, Sung Kyu Lim, Hyesoon Kim
2019 J jnl
A Logic-on-Memory Processor-System Design With Monolithic 3-D Technology.
IEEE Micro
Sai Pentapati, Lingjun Zhu, Lennart Bamberg, Da Eun Shim, Alberto García Ortiz, Sung Kyu Lim
2019 A conf
A Spectral Convolutional Net for Co-Optimization of Integrated Voltage Regulators and Embedded Inductors.
ICCAD
Hakki Mert Torun, Huan Yu, Nihar Dasari, Venkata Chaitanya Krishna Chekuri, Arvind Singh, Jinwoo Kim, Sung Kyu Lim, Saibal Mukhopadhyay, Madhavan Swaminathan
2019 A* conf
Architecture, Chip, and Package Co-design Flow for 2.5D IC Design Enabling Heterogeneous IP Reuse.
DAC
Jinwoo Kim, Gauthaman Murali, Heechun Park, Eric Qin, Hyoukjun Kwon, Venkata Chaitanya Krishna Chekuri, Nihar Dasari, Arvind Singh, Minah Lee, Hakki Mert Torun, Kallol Roy, Madhavan Swaminathan, Saibal Mukhopadhyay, Tushar Krishna, Sung Kyu Lim
2019 B conf
Built-in Self-Test for Inter-Layer Vias in Monolithic 3D ICs.
ETS
Arjun Chaudhuri, Sanmitra Banerjee, Heechun Park, Bon Woong Ku, Krishnendu Chakrabarty, Sung Kyu Lim
2019 J jnl
Entropy Production-Based Full-Chip Fatigue Analysis: From Theory to Mobile Applications.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Tianchen Wang, Sandeep Kumar Samal, Sung Kyu Lim, Yiyu Shi
2019 A conf
GAN-CTS: A Generative Adversarial Framework for Clock Tree Prediction and Optimization.
ICCAD
Yi-Chen Lu, Jeehyun Lee, Anthony Agnesina, Kambiz Samadi, Sung Kyu Lim
2019 — conf
Logic Monolithic 3D ICs: PPA Benefits and EDA Tools Necessary.
ACM Great Lakes Symposium on VLSI
Sai Surya Kiran Pentapati, Da Eun Shim, Sung Kyu Lim
2019 A* conf
RTL-to-GDS Tool Flow and Design-for-Test Solutions for Monolithic 3D ICs.
DAC
Heechun Park, Kyungwook Chang, Bon Woong Ku, Jinwoo Kim, Edward Lee, Daehyun Kim, Arjun Chaudhuri, Sanmitra Banerjee, Saibal Mukhopadhyay, Krishnendu Chakrabarty, Sung Kyu Lim
2019 A conf
Reducing Compilation Effort in Commercial FPGA Emulation Systems Using Machine Learning.
ICCAD
Anthony Agnesina, Etienne Lepercq, Jose Escobedo, Sung Kyu Lim
2019 J jnl
System-Level Power Delivery Network Analysis and Optimization for Monolithic 3-D ICs.
IEEE Trans. Very Large Scale Integr. Syst.
Kyungwook Chang, Shidhartha Das, Saurabh Sinha, Brian Cline, Greg Yeric, Sung Kyu Lim
2019 A conf
Tier Partitioning and Flip-flop Relocation Methods for Clock Trees in Monolithic 3D ICs.
ISLPED
Da Eun Shim, Sai Pentapati, Jeehyun Lee, Yun Seop Yu, Sung Kyu Lim
2018 — conf
A Twin Memristor Synapse for Spike Timing Dependent Learning in Neuromorphic Systems.
SoCC
Md Musabbir Adnan, Sagarvarma Sayyaparaju, Garrett S. Rose, Catherine D. Schuman, Bon Woong Ku, Sung Kyu Lim
2018 A* conf
A novel 3D DRAM memory cube architecture for space applications.
DAC
Anthony Agnesina, Amanvir Sidana, James Yamaguchi, Christian Krutzik, John Carson, Jean Yang-Scharlotta, Sung Kyu Lim
2018 A conf
Area-efficient and low-power face-to-face-bonded 3D liquid state machine design.
ICCAD
Bon Woong Ku, Yu Liu, Yingyezhe Jin, Peng Li, Sung Kyu Lim
2018 — conf
Compact-2D: A Physical Design Methodology to Build Commercial-Quality Face-to-Face-Bonded 3D ICs.
ISPD
Bon Woong Ku, Kyungwook Chang, Sung Kyu Lim
2018 A* conf
Design and architectural co-optimization of monolithic 3D liquid state machine-based neuromorphic processor.
DAC
Bon Woong Ku, Yu Liu, Yingyezhe Jin, Sandeep Kumar Samal, Peng Li, Sung Kyu Lim
2018 A conf
In-growth test for monolithic 3D integrated SRAM.
DATE
Pu Pang, Yixun Zhang, Tianjian Li, Sung Kyu Lim, Quan Chen, Xiaoyao Liang, Li Jiang
2018 J jnl
Power, Performance, and Area Benefit of Monolithic 3D ICs for On-Chip Deep Neural Networks Targeting Speech Recognition.
ACM J. Emerg. Technol. Comput. Syst.
Kyungwook Chang, Deepak Kadetotad, Yu Cao, Jae-sun Seo, Sung Kyu Lim
2018 A conf
Road to High-Performance 3D ICs: Performance Optimization Methodologies for Monolithic 3D ICs.
ISLPED
Kyungwook Chang, Sai Pentapati, Da Eun Shim, Sung Kyu Lim
2017 J jnl
Bringing 3D ICs to Aerospace: Needs for Design Tools and Methodologies.
J. Inform. and Commun. Convergence Engineering
Sung Kyu Lim
2017 J jnl
Chain-Based Approach for Fast Through-Silicon-Via Coupling Delay Estimation.
IEEE Trans. Very Large Scale Integr. Syst.
Jaewon Jang, Minho Cheong, Jin-Ho Ahn, Sung Kyu Lim, Sungho Kang
2017 J jnl
Design Methodologies for Low-Power 3-D ICs With Advanced Tier Partitioning.
IEEE Trans. Very Large Scale Integr. Syst.
Moongon Jung, Taigon Song, Yarui Peng, Sung Kyu Lim
2017 A conf
Design automation and testing of monolithic 3D ICs: Opportunities, challenges, and solutions: (Invited paper).
ICCAD
Kyungwook Chang, Abhishek Koneru, Krishnendu Chakrabarty, Sung Kyu Lim
2017 — conf
Evaluating online-learning in memristive neuromorphic circuits.
NCS
Austin Wyer, Md Musabbir Adnan, Bon Woong Ku, Sung Kyu Lim, Catherine D. Schuman, Raphael C. Pooser, Garrett S. Rose
2017 A conf
Frequency and time domain analysis of power delivery network for monolithic 3D ICs.
ISLPED
Kyungwook Chang, Shidhartha Das, Saurabh Sinha, Brian Cline, Greg Yeric, Sung Kyu Lim
2017 J jnl
Full Chip Impact Study of Power Delivery Network Designs in Gate-Level Monolithic 3-D ICs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Sandeep Kumar Samal, Kambiz Samadi, Pratyush Kamal, Yang Du, Sung Kyu Lim
2017 A conf
Full chip power benefits with negative capacitance FETs.
ISLPED
Sandeep Kumar Samal, Sourabh Khandelwal, Asif Islam Khan, Sayeef S. Salahuddin, Chenming Hu, Sung Kyu Lim
2017 A conf
Full-chip monolithic 3D IC design and power performance analysis with ASAP7 library: (Invited Paper).
ICCAD
Kyungwook Chang, Bon Woong Ku, Saurabh Sinha, Sung Kyu Lim
2017 J jnl
Impact and Design Guideline of Monolithic 3-D IC at the 7-nm Technology Node.
IEEE Trans. Very Large Scale Integr. Syst.
Kyungwook Chang, Kartik Acharya, Saurabh Sinha, Brian Cline, Greg Yeric, Sung Kyu Lim
2017 J jnl
Improving Performance under Process and Voltage Variations in Near-Threshold Computing Using 3D ICs.
ACM J. Emerg. Technol. Comput. Syst.
Sandeep Kumar Samal, Guoqing Chen, Sung Kyu Lim
2017 A conf
Monolithic 3D IC designs for low-power deep neural networks targeting speech recognition.
ISLPED
Kyungwook Chang, Deepak Kadetotad, Yu Cao, Jae-sun Seo, Sung Kyu Lim
2017 J jnl
Shrunk-2-D: A Physical Design Methodology to Build Commercial-Quality Monolithic 3-D ICs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Shreepad Panth, Kambiz Samadi, Yang Du, Sung Kyu Lim
2017 J jnl
TSV-Based 3-D ICs: Design Methods and Tools.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Tiantao Lu, Caleb Serafy, Zhiyuan Yang, Sandeep Kumar Samal, Sung Kyu Lim, Ankur Srivastava
2017 J jnl
The Impact of 3D Stacking and Technology Scaling on the Power and Area of Stereo Matching Processors.
Sensors
Seung-Ho Ok, Yong-Hwan Lee, Jae Hoon Shim, Sung Kyu Lim, Byungin Moon
2017 J jnl
Tier Degradation of Monolithic 3-D ICs: A Power Performance Study at Different Technology Nodes.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Shreepad Panth, Sandeep Kumar Samal, Kambiz Samadi, Yang Du, Sung Kyu Lim
2017 A conf
Transistor-level monolithic 3D standard cell layout optimization for full-chip static power integrity.
ISLPED
Bon Woong Ku, Taigon Song, Arthur Nieuwoudt, Sung Kyu Lim
2016 J jnl
Adaptive Regression-Based Thermal Modeling and Optimization for Monolithic 3-D ICs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Sandeep Kumar Samal, Shreepad Panth, Kambiz Samadi, Mehdi Saedi, Yang Du, Sung Kyu Lim
2016 A conf
Cascade2D: A design-aware partitioning approach to monolithic 3D IC with 2D commercial tools.
ICCAD
Kyungwook Chang, Saurabh Sinha, Brian Cline, Raney Southerland, Michael Doherty, Greg Yeric, Sung Kyu Lim
2016 J jnl
Design and Analysis of a Stochastic Flash Analog-to-Digital Converter in 3D IC technology for integration with ultrasound transducer array.
Microelectron. J.
Hourieh Attarzadeh, Sung Kyu Lim, Trond Ytterdal
2016 J jnl
Device Coupling Effects of Monolithic 3D Inverters.
J. Inform. and Commun. Convergence Engineering
Yun Seop Yu, Sung Kyu Lim
2016 J jnl
Exploration of temperature-aware refresh schemes for 3D stacked eDRAM caches.
Microprocess. Microsystems
Young-Ho Gong, Jae Min Kim, Sung Kyu Lim, Sung Woo Chung
2016 J jnl
Fast bidirectional shortest path on GPU.
IEICE Electron. Express
Lalinthip Tangjittaweechai, Mongkol Ekpanyapong, Thaisiri Watewai, Krit Athikulwongse, Sung Kyu Lim, Adriano Tavares
2016 A conf
Four-tier Monolithic 3D ICs: Tier Partitioning Methodology and Power Benefit Study.
ISLPED
Kwang Min Kim, Saurabh Sinha, Brian Cline, Greg Yeric, Sung Kyu Lim
2016 J jnl
Full-Chip Signal Integrity Analysis and Optimization of 3-D ICs.
IEEE Trans. Very Large Scale Integr. Syst.
Taigon Song, Chang Liu, Yarui Peng, Sung Kyu Lim
2016 J jnl
Guest Editors' Introduction: Advances in 3-D Integrated Circuits, Systems, and CAD Tools - Part 2.
IEEE Des. Test
Daehyun Kim, Sung Kyu Lim
2016 A conf
How much cost reduction justifies the adoption of monolithic 3D ICs at 7nm node?
ICCAD
Bon Woong Ku, Peter Debacker, Dragomir Milojevic, Praveen Raghavan, Sung Kyu Lim
2016 A conf
How to Cope with Slow Transistors in the Top-tier of Monolithic 3D ICs: Design Studies and CAD Solutions.
ISLPED
Sandeep Kumar Samal, Deepak Nayak, Motoi Ichihashi, Srinivasa Banna, Sung Kyu Lim
2016 J jnl
Machine Learning Based Variation Modeling and Optimization for 3D ICs.
J. Inform. and Commun. Convergence Engineering
Sandeep Kumar Samal, Guoqing Chen, Sung Kyu Lim
2016 A* conf
Match-making for monolithic 3D IC: finding the right technology node.
DAC
Kyungwook Chang, Saurabh Sinha, Brian Cline, Greg Yeric, Sung Kyu Lim
2016 — conf
Monolithic 3D IC design: Power, performance, and area impact at 7nm.
ISQED
Kartik Acharya, Kyungwook Chang, Bon Woong Ku, Shreepad Panth, Saurabh Sinha, Brian Cline, Greg Yeric, Sung Kyu Lim
2016 J jnl
More Power Reduction With 3-Tier Logic-on-Logic 3-D ICs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Taigon Song, Shreepad Panth, Yoo-Jin Chae, Sung Kyu Lim
2016 A conf
Physical Design Solutions to Tackle FEOL/BEOL Degradation in Gate-level Monolithic 3D ICs.
ISLPED
Bon Woong Ku, Peter Debacker, Dragomir Milojevic, Praveen Raghavan, Diederik Verkest, Aaron Thean, Sung Kyu Lim
2016 A conf
Tier partitioning strategy to mitigate BEOL degradation and cost issues in monolithic 3D ICs.
ICCAD
Sandeep Kumar Samal, Deepak Nayak, Motoi Ichihashi, Srinivasa Banna, Sung Kyu Lim
2015 A conf
A Novel Entropy Production Based Full-Chip TSV Fatigue Analysis.
ICCAD
Tianchen Wang, Sandeep Kumar Samal, Sung Kyu Lim, Yiyu Shi
2015 J jnl
Design and Analysis of 3D-MAPS (3D Massively Parallel Processor with Stacked Memory).
IEEE Trans. Computers
Daehyun Kim, Krit Athikulwongse, Michael B. Healy, Mohammad M. Hossain, Moongon Jung, Ilya Khorosh, Gokul Kumar, Young-Joon Lee, Dean L. Lewis, Tzu-Wei Lin, Chang Liu, Shreepad Panth, Mohit Pathak, Minzhen Ren, Guanhao Shen, Taigon Song, Dong Hyuk Woo, Xin Zhao, Joungho Kim, Ho Choi, Gabriel H. Loh, Hsien-Hsin S. Lee, Sung Kyu Lim
2015 A* conf
Design, packaging, and architectural policy co-optimization for DC power integrity in 3D DRAM.
DAC
Yarui Peng, Bon Woong Ku, Youn-Sik Park, Kwang-Il Park, Seong-Jin Jang, Joo-Sun Choi, Sung Kyu Lim
2015 J jnl
Die-to-Die Parasitic Extraction Targeting Face-to-Face Bonded 3D ICs.
J. Inform. and Commun. Convergence Engineering
Taigon Song, Sung Kyu Lim
2015 J jnl
Full-Chip Power/Performance Benefits of Carbon Nanotube-Based Circuits.
J. Inform. and Commun. Convergence Engineering
Taigon Song, Sung Kyu Lim
2015 A conf
Full-chip Inter-die Parasitic Extraction in Face-to-Face-Bonded 3D ICs.
ICCAD
Yarui Peng, Taigon Song, Dusan Petranovic, Sung Kyu Lim
2015 J jnl
Guest Editors' Introduction: Advances in 3-D Integrated Circuits, Systems, and CAD Tools.
IEEE Des. Test
Dae Hyun Kim, Sung Kyu Lim
2015 — conf
Low Power Monolithic 3D IC Design of Asynchronous AES Core.
ASYNC
Neela Lohith Penmetsa, Christos P. Sotiriou, Sung Kyu Lim
2015 J jnl
Multi-TSV and E-Field Sharing Aware Full-chip Extraction and Mitigation of TSV-to-Wire Coupling.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Yarui Peng, Dusan Petranovic, Sung Kyu Lim
2015 A conf
On diagnosable and tunable 3D clock network design for lifetime reliability enhancement.
ITC
Li Jiang, Pu Pang, Naifeng Jing, Sung Kyu Lim, Xiaoyao Liang, Qiang Xu
2015 J jnl
Physical Design and CAD Tools for 3-D Integrated Circuits: Challenges and Opportunities.
IEEE Des. Test
Dae Hyun Kim, Sung Kyu Lim
2015 J jnl
Placement-Driven Partitioning for Congestion Mitigation in Monolithic 3D IC Designs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Shreepad Panth, Kambiz Samadi, Yang Du, Sung Kyu Lim
2015 A conf
Power benefit study of monolithic 3D IC at the 7nm technology node.
ISLPED
Kyungwook Chang, Kartik Acharya, Saurabh Sinha, Brian Cline, Greg Yeric, Sung Kyu Lim
2015 J jnl
Scan Test of Die Logic in 3-D ICs Using TSV Probing.
IEEE Trans. Very Large Scale Integr. Syst.
Brandon Noia, Shreepad Panth, Krishnendu Chakrabarty, Sung Kyu Lim
2015 C conf
Stacking integration methodologies in 3D IC for 3D ultrasound image processing application: A stochastic flash ADC design case study.
ISCAS
Hourieh Attarzadeh, Sung Kyu Lim, Trond Ytterdal
2015 A conf
Three-Tier 3D ICs for More Power Reduction: Strategies in CAD, Design, and Bonding Selection.
ICCAD
Taigon Song, Shreepad Panth, Yoo-Jin Chae, Sung Kyu Lim
2015 A* conf
Tier-partitioning for power delivery vs cooling tradeoff in 3D VLSI for mobile applications.
DAC
Shreepad Panth, Kambiz Samadi, Yang Du, Sung Kyu Lim
2014 J jnl
Backend Dielectric Reliability Full Chip Simulator.
IEEE Trans. Very Large Scale Integr. Syst.
Muhammad Muqarrab Bashir, Chang-Chih Chen, Linda Milor, Dae Hyun Kim, Sung Kyu Lim
2014 J jnl
Design Challenges and Solutions for Ultra-High-Density Monolithic 3D ICs.
J. Inform. and Commun. Convergence Engineering
Shreepad Panth, Sandeep Kumar Samal, Yun Seop Yu, Sung Kyu Lim
2014 A conf
Design and CAD methodologies for low power gate-level monolithic 3D ICs.
ISLPED
Shreepad A. Panth, Kambiz Samadi, Yang Du, Sung Kyu Lim
2014 J jnl
Electromigration Study for Multiscale Power/Ground Vias in TSV-Based 3-D ICs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Jiwoo Pak, Sung Kyu Lim, David Z. Pan
2014 J jnl
Exploiting Die-to-Die Thermal Coupling in 3-D IC Placement.
IEEE Trans. Very Large Scale Integr. Syst.
Krit Athikulwongse, Mongkol Ekpanyapong, Sung Kyu Lim
2014 A* conf
Fast and Accurate Full-chip Extraction and Optimization of TSV-to-Wire Coupling.
DAC
Yarui Peng, Dusan Petranovic, Sung Kyu Lim
2014 A* conf
Fast and Accurate Thermal Modeling and Optimization for Monolithic 3D ICs.
DAC
Sandeep Kumar Samal, Shreepad Panth, Kambiz Samadi, Mehdi Saedi, Yang Du, Sung Kyu Lim
2014 A conf
Full chip impact study of power delivery network designs in monolithic 3D ICs.
ICCAD
Sandeep Kumar Samal, Kambiz Samadi, Pratyush Kamal, Yang Du, Sung Kyu Lim
2014 A* conf
On Enhancing Power Benefits in 3D ICs: Block Folding and Bonding Styles Perspective.
DAC
Moongon Jung, Taigon Song, Yang Wan, Yarui Peng, Sung Kyu Lim
2014 A conf
On GPU bus power reduction with 3D IC technologies.
DATE
Young-Joon Lee, Sung Kyu Lim
2014 — conf
Placement-driven partitioning for congestion mitigation in monolithic 3D IC designs.
ISPD
Shreepad Panth, Kambiz Samadi, Yang Du, Sung Kyu Lim
2014 A* conf
Power-Performance Study of Block-Level Monolithic 3D-ICs Considering Inter-Tier Performance Variations.
DAC
Shreepad Panth, Kambiz Samadi, Yang Du, Sung Kyu Lim
2014 J jnl
Research Needs for TSV-Based 3D IC Architectural Floorplanning.
J. Inform. and Commun. Convergence Engineering
Sung Kyu Lim
2014 J jnl
Silicon Effect-Aware Full-Chip Extraction and Mitigation of TSV-to-TSV Coupling.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Yarui Peng, Taigon Song, Dusan Petranovic, Sung Kyu Lim
2014 J jnl
Simulation of system backend dielectric reliability.
Microelectron. J.
Chang-Chih Chen, Muhammad Bashir, Linda S. Milor, Daehyun Kim, Sung Kyu Lim
2014 J jnl
TSV stress-aware full-chip mechanical reliability analysis and optimization for 3D IC.
Commun. ACM
Moongon Jung, Joydeep Mitra, David Z. Pan, Sung Kyu Lim
2014 J jnl
TSV-Aware Interconnect Distribution Models for Prediction of Delay and Power Consumption of 3-D Stacked ICs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Daehyun Kim, Saibal Mukhopadhyay, Sung Kyu Lim
2013 — conf
Block-level designs of die-to-wafer bonded 3D ICs and their design quality tradeoffs.
ASP-DAC
Krit Athikulwongse, Dae Hyun Kim, Moongon Jung, Sung Kyu Lim
2013 J jnl
Chip/Package Mechanical Stress Impact on 3-D IC Reliability and Mobility Variations.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Moongon Jung, David Z. Pan, Sung Kyu Lim
2013 A conf
Design and analysis of 3D IC-based low power stereo matching processors.
ISLPED
Seung-Ho Ok, Kyeong-Ryeol Bae, Sung Kyu Lim, Byungin Moon
2013 A conf
Design and analysis of ultra low power processors using sub/near-threshold 3D stacked ICs.
ISLPED
Sandeep Kumar Samal, Yarui Peng, Yang Zhang, Sung Kyu Lim
2013 A conf
Electromigration study for multi-scale power/ground vias in TSV-based 3D ICs.
ICCAD
Jiwoo Pak, Sung Kyu Lim, David Z. Pan
2013 A* conf
Full-chip multiple TSV-to-TSV coupling extraction and optimization in 3D ICs.
DAC
Taigon Song, Chang Liu, Yarui Peng, Sung Kyu Lim
2013 — conf
High-density integration of functional modules using monolithic 3D-IC technology.
ASP-DAC
Shreepad Panth, Kambiz Samadi, Yang Du, Sung Kyu Lim
2013 — conf
How to reduce power in 3D IC designs: A case study with OpenSPARC T2 core.
CICC
Moongon Jung, Taigon Song, Yang Wan, Young-Joon Lee, Debabrata Mohapatra, Hong Wang, Greg Taylor, Devang Jariwala, Vijay Pitchumani, Patrick Morrow, Clair Webb, Paul Fischer, Sung Kyu Lim
2013 J jnl
Impact of Mechanical Stress on the Full Chip Timing for Through-Silicon-Via-based 3-D ICs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Krit Athikulwongse, Jae-Seok Yang, David Z. Pan, Sung Kyu Lim
2013 J jnl
IsoNet: Hardware-Based Job Queue Management for Many-Core Architectures.
IEEE Trans. Very Large Scale Integr. Syst.
Junghee Lee, Chrysostomos Nicopoulos, Hyung Gyu Lee, Shreepad Panth, Sung Kyu Lim, Jongman Kim
2013 A conf
Novel crack sensor for TSV-based 3D integrated circuits: design and deployment perspectives.
ICCAD
Chun Zhang, Moongon Jung, Sung Kyu Lim, Yiyu Shi
2013 A conf
On accurate full-chip extraction and optimization of TSV-to-TSV coupling elements in 3D ICs.
ICCAD
Yarui Peng, Taigon Song, Dusan Petranovic, Sung Kyu Lim
2013 A* conf
Power benefit study for ultra-high density transistor-level monolithic 3D ICs.
DAC
Young-Joon Lee, Daniel B. Limbrick, Sung Kyu Lim
2013 J jnl
Reliable 3-D Clock-Tree Synthesis Considering Nonlinear Capacitive TSV Model With Electrical-Thermal-Mechanical Coupling.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Sai Manoj Pudukotai Dinakarrao, Hao Yu, Yang Shang, Chuan Seng Tan, Sung Kyu Lim
2013 J jnl
Study of Through-Silicon-Via Impact on the 3-D Stacked IC Layout.
IEEE Trans. Very Large Scale Integr. Syst.
Dae Hyun Kim, Krit Athikulwongse, Sung Kyu Lim
2013 — conf
Test-TSV estimation during 3D-IC partitioning.
3DIC
Shreepad Panth, Kambiz Samadi, Sung Kyu Lim
2013 — conf
Thermal-reliable 3D clock-tree synthesis considering nonlinear electrical-thermal-coupled TSV model.
ASP-DAC
Yang Shang, Chun Zhang, Hao Yu, Chuan Seng Tan, Xin Zhao, Sung Kyu Lim
2013 A conf
Transient modeling of TSV-wire electromigration and lifetime analysis of power distribution network for 3D ICs.
ICCAD
Xin Zhao, Yang Wan, Michael Scheuermann, Sung Kyu Lim
2013 J jnl
Ultrahigh Density Logic Designs Using Monolithic 3-D Integration.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Young-Joon Lee, Sung Kyu Lim
2012 — conf
3D-MAPS: 3D Massively parallel processor with stacked memory.
ISSCC
Dae Hyun Kim, Krit Athikulwongse, Michael B. Healy, Mohammad M. Hossain, Moongon Jung, Ilya Khorosh, Gokul Kumar, Young-Joon Lee, Dean L. Lewis, Tzu-Wei Lin, Chang Liu, Shreepad Panth, Mohit Pathak, Minzhen Ren, Guanhao Shen, Taigon Song, Dong Hyuk Woo, Xin Zhao, Joungho Kim, Ho Choi, Gabriel H. Loh, Hsien-Hsin S. Lee, Sung Kyu Lim
2012 — conf
A design tradeoff study with monolithic 3D integration.
ISQED
Chang Liu, Sung Kyu Lim
2012 A* conf
Analysis of DC current crowding in through-silicon-vias and its impact on power integrity in 3D ICs.
DAC
Xin Zhao, Michael Scheuermann, Sung Kyu Lim
2012 J jnl
Backend dielectric reliability simulator for microprocessor system.
Microelectron. Reliab.
Chang-Chih Chen, Fahad Ahmed, Dae Hyun Kim, Sung Kyu Lim, Linda Milor
2012 — conf
Block-level 3D IC design with through-silicon-via planning.
ASP-DAC
Dae Hyun Kim, Rasit Onur Topaloglu, Sung Kyu Lim
2012 A* conf
Chip/package co-analysis of thermo-mechanical stress and reliability in TSV-based 3D ICs.
DAC
Moongon Jung, David Z. Pan, Sung Kyu Lim
2012 J jnl
Design Quality Trade-Off Studies for 3-D ICs Built With Sub-Micron TSVs and Future Devices.
IEEE J. Emerg. Sel. Topics Circuits Syst.
Dae Hyun Kim, Sung Kyu Lim
2012 — conf
Design for manufacturability and reliability for TSV-based 3D ICs.
ASP-DAC
David Z. Pan, Sung Kyu Lim, Krit Athikulwongse, Moongon Jung, Joydeep Mitra, Jiwoo Pak, Mohit Pathak, Jae-Seok Yang
2012 — conf
Design quality tradeoff studies for 3D ICs built with nano-scale TSVs and devices.
ISQED
Kaiyuan Yang, Dae Hyun Kim, Sung Kyu Lim
2012 J jnl
Distributed TSV Topology for 3-D Power-Supply Networks.
IEEE Trans. Very Large Scale Integr. Syst.
Michael B. Healy, Sung Kyu Lim
2012 A conf
Electromigration-aware routing for 3D ICs with stress-aware EM modeling.
ICCAD
Jiwoo Pak, Sung Kyu Lim, David Z. Pan
2012 A* conf
Exploiting die-to-die thermal coupling in 3D IC placement.
DAC
Krit Athikulwongse, Mohit Pathak, Sung Kyu Lim
2012 — conf
Fast delay estimation with buffer insertion for through-silicon-via-based 3D interconnects.
ISQED
Young-Joon Lee, Sung Kyu Lim
2012 A conf
Scan test of die logic in 3D ICs using TSV probing.
ITC
Brandon Noia, Shreepad Panth, Krishnendu Chakrabarty, Sung Kyu Lim
2012 — conf
Slew-aware buffer insertion for through-silicon-via-based 3D ICs.
CICC
Young-Joon Lee, Inki Hong, Sung Kyu Lim
2012 — conf
TSV Stress-Aware ATPG for 3D Stacked ICs.
Asian Test Symposium
Sergej Deutsch, Krishnendu Chakrabarty, Shreepad Panth, Sung Kyu Lim
2012 J jnl
TSV Stress-Aware Full-Chip Mechanical Reliability Analysis and Optimization for 3-D IC.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Moongon Jung, Joydeep Mitra, David Z. Pan, Sung Kyu Lim
2012 A conf
TSV array utilization in low-power 3D clock network design.
ISLPED
Xin Zhao, Sung Kyu Lim
2012 — conf
Through-silicon-via-induced obstacle-aware clock tree synthesis for 3D ICs.
ASP-DAC
Xin Zhao, Sung Kyu Lim
2012 Misc conf
Transition delay fault testing of 3D ICs with IR-drop study.
VTS
Shreepad Panth, Sung Kyu Lim
2012 A conf
Ultra high density logic designs using transistor-level monolithic 3D integration.
ICCAD
Young-Joon Lee, Patrick Morrow, Sung Kyu Lim
2012 J jnl
Variation-Aware Clock Network Design Methodology for Ultralow Voltage (ULV) Circuits.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Xin Zhao, Jeremy R. Tolbert, Saibal Mukhopadhyay, Sung Kyu Lim
2011 A conf
A novel TSV topology for many-tier 3D power-delivery networks.
DATE
Michael B. Healy, Sung Kyu Lim
2011 J jnl
Analysis and Design of Energy and Slew Aware Subthreshold Clock Systems.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Jeremy R. Tolbert, Xin Zhao, Sung Kyu Lim, Saibal Mukhopadhyay
2011 — conf
Analysis of TSV-to-TSV coupling with high-impedance termination in 3D ICs.
ISQED
Taigon Song, Chang Liu, Dae Hyun Kim, Sung Kyu Lim, Jonghyun Cho, Joohee Kim, Junso Pak, Seungyoung Ahn, Joungho Kim, Kihyun Yoon
2011 J jnl
Co-Optimization and Analysis of Signal, Power, and Thermal Interconnects in 3-D ICs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Young-Joon Lee, Sung Kyu Lim
2011 C conf
Designing 3D test wrappers for pre-bond and post-bond test of 3D embedded cores.
ICCD
Dean L. Lewis, Shreepad Panth, Xin Zhao, Sung Kyu Lim, Hsien-Hsin S. Lee
2011 A conf
Electromigration modeling and full-chip reliability analysis for BEOL interconnect in TSV-based 3D ICs.
ICCAD
Mohit Pathak, Jiwoo Pak, David Z. Pan, Sung Kyu Lim
2011 A* conf
Full-chip TSV-to-TSV coupling analysis and optimization in 3D IC.
DAC
Chang Liu, Taigon Song, Jonghyun Cho, Joohee Kim, Joungho Kim, Sung Kyu Lim
2011 A conf
Full-chip through-silicon-via interfacial crack analysis and optimization for 3D IC.
ICCAD
Moongon Jung, Xi Liu, Suresh K. Sitaraman, David Z. Pan, Sung Kyu Lim
2011 J jnl
Impact of irregular geometries on low-k dielectric breakdown.
Microelectron. Reliab.
Muhammad Bashir, Linda Milor, Dae Hyun Kim, Sung Kyu Lim
2011 — conf
Impact of nano-scale through-silicon vias on the quality of today and future 3D IC designs.
SLIP
Daehyun Kim, Suyoun Kim, Sung Kyu Lim
2011 J jnl
Integrated microarchitectural floorplanning and run-time controller for inductive noise mitigation.
ACM Trans. Design Autom. Electr. Syst.
Michael B. Healy, Fayez Mohamood, Hsien-Hsin S. Lee, Sung Kyu Lim
2011 J jnl
Low-Power Clock Tree Design for Pre-Bond Testing of 3-D Stacked ICs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Xin Zhao, Dean L. Lewis, Hsien-Hsin S. Lee, Sung Kyu Lim
2011 — conf
Power-supply-network design in 3D integrated systems.
ISQED
Michael B. Healy, Sung Kyu Lim
2011 — conf
Robust Clock Tree Synthesis with timing yield optimization for 3D-ICs.
ASP-DAC
Jae-Seok Yang, Jiwoo Pak, Xin Zhao, Sung Kyu Lim, David Z. Pan
2011 Misc conf
Scan chain and power delivery network synthesis for pre-bond test of 3D ICs.
VTS
Shreepad Panth, Sung Kyu Lim
2011 — conf
Signal integrity analysis and optimization for 3D ICs.
ISQED
Chang Liu, Taigon Song, Sung Kyu Lim
2011 — conf
TSV density-driven global placement for 3D stacked ICs.
ISOCC
Dae Hyun Kim, Rasit Onur Topaloglu, Sung Kyu Lim
2011 A* conf
TSV stress-aware full-chip mechanical reliability analysis and optimization for 3D IC.
DAC
Moongon Jung, Joydeep Mitra, David Z. Pan, Sung Kyu Lim
2011 A conf
Variation-aware clock network design methodology for ultra-low voltage (ULV) circuits.
ISLPED
Xin Zhao, Jeremy R. Tolbert, Chang Liu, Saibal Mukhopadhyay, Sung Kyu Lim
2010 — conf
A study of IR-drop noise issues in 3D ICs with through-silicon-vias.
3DIC
Moongon Jung, Sung Kyu Lim
2010 — conf
Buffered clock tree sizing for skew minimization under power and thermal budgets.
ASP-DAC
Krit Athikulwongse, Xin Zhao, Sung Kyu Lim
2010 — conf
Design and analysis of 3D-MAPS: A many-core 3D processor with stacked memory.
CICC
Michael B. Healy, Krit Athikulwongse, Rohan Goel, Mohammad M. Hossain, Dae Hyun Kim, Young-Joon Lee, Dean L. Lewis, Tzu-Wei Lin, Chang Liu, Moongon Jung, Brian Ouellette, Mohit Pathak, Hemant Sane, Guanhao Shen, Dong Hyuk Woo, Xin Zhao, Gabriel H. Loh, Hsien-Hsin S. Lee, Sung Kyu Lim
2010 A conf
Design method and test structure to characterize and repair TSV defect induced signal degradation in 3D system.
ICCAD
Minki Cho, Chang Liu, Dae Hyun Kim, Sung Kyu Lim, Saibal Mukhopadhyay
2010 J jnl
Methodology to determine the impact of linewidth variation on chip scale copper/low-k backend dielectric breakdown.
Microelectron. Reliab.
Muhammad Bashir, Linda S. Milor, Dae Hyun Kim, Sung Kyu Lim
2010 — conf
Power and slew-aware clock network design for through-silicon-via (TSV) based 3D ICs.
ASP-DAC
Xin Zhao, Sung Kyu Lim
2010 J jnl
SONOS-Type Flash Memory with HfO
IEICE Trans. Electron.
Jae Sub Oh, Kwang Il Choi, Young Su Kim, Min Ho Kang, Myeong Ho Song, Sung Kyu Lim, Dong Eun Yoo, Jeong Gyu Park, Hi Deok Lee, Ga Won Lee
2010 A conf
Stress-driven 3D-IC placement with TSV keep-out zone and regularity study.
ICCAD
Krit Athikulwongse, Ashutosh Chakraborty, Jae-Seok Yang, David Z. Pan, Sung Kyu Lim
2010 A* conf
TSV stress aware timing analysis with applications to 3D-IC layout optimization.
DAC
Jae-Seok Yang, Krit Athikulwongse, Young-Joon Lee, Sung Kyu Lim, David Z. Pan
2010 A conf
Through-silicon-via management during 3D physical design: When to add and how many?
ICCAD
Mohit Pathak, Young-Joon Lee, Thomas Moon, Sung Kyu Lim
2010 — conf
Through-silicon-via-aware delay and power prediction model for buffered interconnects in 3D ICs.
SLIP
Daehyun Kim, Sung Kyu Lim
2010 — conf
Timing analysis and optimization for 3D stacked multi-core microprocessors.
3DIC
Young-Joon Lee, Sung Kyu Lim
2009 — conf
A generic reconfigurable array specification and programming environment (GRASPER).
ECCTD
Faik Baskaya, David V. Anderson, Paul E. Hasler, Sung Kyu Lim
2009 A conf
A study of Through-Silicon-Via impact on the 3D stacked IC layout.
ICCAD
Dae Hyun Kim, Krit Athikulwongse, Sung Kyu Lim
2009 A conf
Co-design of signal, power, and thermal distribution networks for 3D ICs.
DATE
Young-Joon Lee, Yoon Jo Kim, Gang Huang, Muhannad S. Bakir, Yogendra K. Joshi, Andrei G. Fedorov, Sung Kyu Lim
2009 A conf
Decoupling capacitor planning with analytical delay model on RLC power grid.
DATE
Ye Tao, Sung Kyu Lim
2009 A conf
Multi-functional interconnect co-optimization for fast and reliable 3D stacked ICs.
ICCAD
Young-Joon Lee, Rohan Goel, Sung Kyu Lim
2009 J jnl
Net-Sensitivity-Based Optimization of Large-Scale Field-Programmable Analog Array (FPAA) Placement and Routing.
IEEE Trans. Circuits Syst. II Express Briefs
I. Faik Baskaya, David V. Anderson, Sung Kyu Lim
2009 J jnl
Performance and Thermal-Aware Steiner Routing for 3-D Stacked ICs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Mohit Pathak, Sung Kyu Lim
2009 A conf
Pre-bond testable low-power clock tree design for 3D stacked ICs.
ICCAD
Xin Zhao, Dean L. Lewis, Hsien-Hsin S. Lee, Sung Kyu Lim
2009 A conf
Slew-aware clock tree design for reliable subthreshold circuits.
ISLPED
Jeremy R. Tolbert, Xin Zhao, Sung Kyu Lim, Saibal Mukhopadhyay
2009 — conf
Thermal optimization in multi-granularity multi-core floorplanning.
ASP-DAC
Michael B. Healy, Hsien-Hsin S. Lee, Gabriel H. Loh, Sung Kyu Lim
2009 — conf
Through-silicon-via aware interconnect prediction and optimization for 3D stacked ICs.
SLIP
Dae Hyun Kim, Saibal Mukhopadhyay, Sung Kyu Lim
2008 — conf
A unified methodology for power supply noise reduction in modern microarchitecture design.
ASP-DAC
Michael B. Healy, Fayez Mohamood, Hsien-Hsin S. Lee, Sung Kyu Lim
2008 — conf
Buffered clock tree synthesis for 3D ICs under thermal variations.
ASP-DAC
Jacob R. Minz, Xin Zhao, Sung Kyu Lim
2008 — conf
Bus-aware microarchitectural floorplanning.
ASP-DAC
Dae Hyun Kim, Sung Kyu Lim
2008 C conf
Global bus route optimization with application to microarchitectural design exploration.
ICCD
Dae Hyun Kim, Sung Kyu Lim
2007 — conf
An Efficient Computation of Statistically Critical Sequential Paths Under Retiming.
ASP-DAC
Mongkol Ekpanyapong, Xin Zhao, Sung Kyu Lim
2007 J jnl
Decoupling-Capacitor Planning and Sizing for Noise and Leakage Reduction.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Eric Wong, Jacob R. Minz, Sung Kyu Lim
2007 J jnl
Introduction to special issue on demonstrable software systems and hardware platforms.
ACM Trans. Design Autom. Electr. Syst.
Sung Kyu Lim, Massoud Pedram
2007 J jnl
Multiobjective Microarchitectural Floorplanning for 2-D and 3-D ICs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Michael B. Healy, Mario Vittes, Mongkol Ekpanyapong, Chinnakrishnan S. Ballapuram, Sung Kyu Lim, Hsien-Hsin S. Lee, Gabriel H. Loh
2007 — conf
Noise-Direct: A Technique for Power Supply Noise Aware Floorplanning Using Microarchitecture Profiling.
ASP-DAC
Fayez Mohamood, Michael B. Healy, Sung Kyu Lim, Hsien-Hsin S. Lee
2007 C conf
Placement and routing of RF embedded passive designs in LCP substrate.
ICCD
Mohit Pathak, Souvik Mukherjee, Madhavan Swaminathan, Ege Engin, Sung Kyu Lim
2007 Misc conf
Rapid Prototyping of Large-scale Analog Circuits With Field Programmable Analog Array.
FCCM
I. Faik Baskaya, Brian Gestner, Christopher M. Twigg, Sung Kyu Lim, David V. Anderson, Paul E. Hasler
2007 A conf
Thermal-aware Steiner routing for 3D stacked ICs.
ICCAD
Mohit Pathak, Sung Kyu Lim
2007 C conf
Whitespace redistribution for thermal via insertion in 3D stacked ICs.
ICCD
Eric Wong, Sung Kyu Lim
2006 A conf
3D floorplanning with thermal vias.
DATE
Eric Wong, Sung Kyu Lim
2006 A* conf
A Floorplan-Aware Dynamic Inductive Noise Controller for Reliable Processor Design.
MICRO
Fayez Mohamood, Michael B. Healy, Sung Kyu Lim, Hsien-Hsin S. Lee
2006 J jnl
Block-level 3-D Global Routing With an Application to 3-D Packaging.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Jacob R. Minz, Sung Kyu Lim
2006 A conf
Decoupling capacitor planning and sizing for noise and leakage reduction.
ICCAD
Eric Wong, Jacob R. Minz, Sung Kyu Lim
2006 — conf
Integrated retiming and simultaneous Vdd/Vth scaling for total power minimization.
ISPD
Mongkol Ekpanyapong, Sung Kyu Lim
2006 A conf
Microarchitectural floorplanning under performance and thermal tradeoff.
DATE
Michael B. Healy, Mario Vittes, Mongkol Ekpanyapong, Chinnakrishnan S. Ballapuram, Sung Kyu Lim, Hsien-Hsin S. Lee, Gabriel H. Loh
2006 J jnl
Multi-Objective Module Placement For 3-D System-On-Package.
IEEE Trans. Very Large Scale Integr. Syst.
Eric Wong, Jacob R. Minz, Sung Kyu Lim
2006 A conf
Optical routing for 3D system-on-package.
DATE
Jacob R. Minz, Somaskanda Thyagaraja, Sung Kyu Lim
2006 J jnl
Placement for large-scale floating-gate field-programable analog arrays.
IEEE Trans. Very Large Scale Integr. Syst.
I. Faik Baskaya, Sasank Reddy, Sung Kyu Lim, David V. Anderson
2006 J jnl
Profile-Driven Instruction Mapping for Dataflow Architectures.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Mongkol Ekpanyapong, Michael B. Healy, Sung Kyu Lim
2006 J jnl
Profile-guided microarchitectural floor planning for deep submicron processor design.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Mongkol Ekpanyapong, Jacob R. Minz, Thaisiri Watewai, Hsien-Hsin S. Lee, Sung Kyu Lim
2006 — conf
Statistical Bellman-Ford algorithm with an application to retiming.
ASP-DAC
Mongkol Ekpanyapong, Thaisiri Watewai, Sung Kyu Lim
2006 J jnl
Traffic: a novel geometric algorithm for fast wire-optimized floorplanning.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Peter G. Sassone, Sung Kyu Lim
2005 — conf
3D module placement for congestion and power noise reduction.
ACM Great Lakes Symposium on VLSI
Jacob R. Minz, Sung Kyu Lim, Cheng-Kok Koh
2005 J jnl
Automatic cell placement for quantum-dot cellular automata.
Integr.
Ramprasad Ravichandran, Sung Kyu Lim, Michael T. Niemier
2005 B conf
Hierarchical Placement for Large-scale FPAA.
FPL
I. Faik Baskaya, Sasank Reddy, Sung Kyu Lim, David V. Anderson
2005 B conf
MILP-based Placement and Routing for Dataflow Architecture.
FPL
Michael B. Healy, Mongkol Ekpanyapong, Sung Kyu Lim
2005 — conf
Mapping algorithm for large-scale field programmable analog array.
ISPD
I. Faik Baskaya, Sasank Reddy, Sung Kyu Lim, Tyson S. Hall, David V. Anderson
2005 — conf
Partitioning and placement for buildable QCA circuits.
ASP-DAC
Ramprasad Ravichandran, Michael T. Niemier, Sung Kyu Lim
2005 J jnl
Partitioning and placement for buildable QCA circuits.
ACM J. Emerg. Technol. Comput. Syst.
Sung Kyu Lim, Ramprasad Ravichandran, Michael T. Niemier
2005 J jnl
Physical Design for 3D System on Package.
IEEE Des. Test Comput.
Sung Kyu Lim
2005 — conf
Placement for configurable dataflow architecture.
ASP-DAC
Mongkol Ekpanyapong, Michael B. Healy, Sung Kyu Lim
2005 — conf
QCA channel routing with wire crossing minimization.
ACM Great Lakes Symposium on VLSI
Brian Stephen Smith, Sung Kyu Lim
2005 — conf
Reliability-aware floorplanning for 3D circuits.
SoCC
Jacob R. Minz, Eric Wong, Sung Kyu Lim
2005 — conf
Wire congestion and thermal aware 3D global placement.
ASP-DAC
Karthik Balakrishnan, Vidit Nanda, Siddharth Easwar, Sung Kyu Lim
2005 — conf
Wire-driven microarchitectural design space exploration.
ISCAS (2)
Mongkol Ekpanyapong, Chinnakrishnan S. Ballapuram, Sung Kyu Lim, Hsien-Hsin S. Lee
2004 — conf
Automatic cell placement for quantum-dot cellular automata.
ACM Great Lakes Symposium on VLSI
Ramprasad Ravichandran, Nihal Ladiwala, Jean Nguyen, Michael T. Niemier, Sung Kyu Lim
2004 J jnl
Edge separability-based circuit clustering with application to multilevel circuit partitioning.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Jason Cong, Sung Kyu Lim
2004 — conf
Layer assignment for reliable system-on-package.
ASP-DAC
Jacob R. Minz, Sung Kyu Lim
2004 — conf
Multi-layer floorplanning for reliable system-on-package.
ISCAS (5)
Pun Hang Shiu, Ramprasad Ravichandran, Siddharth Easwar, Sung Kyu Lim
2004 A conf
Net and Pin Distribution for 3D Package Global Routing.
DATE
Jacob R. Minz, Mohit Pathak, Sung Kyu Lim
2004 — conf
Performance-driven global placement via adaptive network characterization.
ASP-DAC
Mongkol Ekpanyapong, Sung Kyu Lim
2004 A* conf
Profile-guided microarchitectural floorplanning for deep submicron processor design.
DAC
Mongkol Ekpanyapong, Jacob R. Minz, Thaisiri Watewai, Hsien-Hsin S. Lee, Sung Kyu Lim
2004 J jnl
Retiming-based timing analysis with an application to mincut-based global placement.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Jason Cong, Sung Kyu Lim
2004 — conf
Simultaneous delay and power optimization in global placement.
ISCAS (5)
Mongkol Ekpanyapong, Karthik Balakrishnan, Vidit Nanda, Sung Kyu Lim
2003 A conf
A Novel Geometric Algorithm for Fast Wire-Optimized Floorplanning.
ICCAD
Peter G. Sassone, Sung Kyu Lim
2000 — conf
Edge separability based circuit clustering with application to circuit partitioning.
ASP-DAC
Jason Cong, Sung Kyu Lim
2000 — conf
Multi-way partitioning using bi-partition heuristics.
ASP-DAC
Maogang Wang, Sung Kyu Lim, Jason Cong, Majid Sarrafzadeh
2000 A* conf
Performance driven multi-level and multiway partitioning with retiming.
DAC
Jason Cong, Sung Kyu Lim, Chang Wu
2000 — conf
Performance driven multiway partitioning.
ASP-DAC
Jason Cong, Sung Kyu Lim
2000 A conf
Physical Planning with Retiming.
ICCAD
Jason Cong, Sung Kyu Lim
1998 A conf
Multiway partitioning with pairwise movement.
ICCAD
Jason Cong, Sung Kyu Lim
1997 A conf
Large scale circuit partitioning with loose/stable net removal and signal flow based clustering.
ICCAD
Jason Cong, Honching Peter Li, Sung Kyu Lim, Toshiyuki Shibuya, Dongmin Xu