Sung-Yun Park

18 papers C 1Journal 9Unranked 8
YearRankTypeTitle / Venue / Authors
2026 J jnl
A 120 Frames/s CMOS Image Sensor With 8.19 TOPS/W Computing-In-Pixel for Energy-Efficient Low-Latency Face Detection.
IEEE J. Solid State Circuits
Hyunsoo Song, Sungjin Oh, Juan Salinas, Sung-Yun Park, Euisik Yoon
2025 J jnl
Real-Time Player Tracking Framework on MOBA Game Video Through Object Detection.
IEEE Trans. Games
Dae-Wook Kim, Sung-Yun Park, Seong-Il Yang, Sang-Kwang Lee
2025 — conf
Single-anchored Multi-modal Dense Video Captioning for Esports Broadcasts Commentaries.
MMSports@MM
Ari Yu, Jinwoo Hyun, Hyeong-Gyu Jang, Sung-Yun Park, Sang-Kwang Lee
2024 — conf
A 79.2dB-SNDR Slope-Adaptive Dynamic Zoom-and-Track Incremental sΔΔ Neural Recording Frontend with Resolution-Preservative 192mV/ms Transient Tracking.
VLSI Technology and Circuits
Sungjin Oh, Hyunsoo Song, Jose Roberto Lopez Ruiz, Wangbo Chen, Sung-Yun Park, Michael P. Flynn, Euisik Yoon
2024 — conf
Predicting Player of the Game in Multiplayer Online Battle Arena Games.
ICTC
Hyeong-Gyu Jang, Sung-Yun Park, Sang-Kwang Lee
2023 C conf
Human Interactive Learning with Intrinsic Reward.
CoG
Sung-Yun Park, Seung-Jin Hong, Sang-Kwang Lee
2023 J jnl
Power-Efficient LFP-Adaptive Dynamic Zoom-and-Track Incremental ΔΣ Front-End for Dual-Band Subcortical Recordings.
IEEE Trans. Biomed. Circuits Syst.
Sungjin Oh, Hyunsoo Song, Nathan Slager, Jose Roberto Lopez Ruiz, Sung-Yun Park, Euisik Yoon
2022 J jnl
A 3.1-5.2GHz, Energy-Efficient Single Antenna, Cancellation-Free, Bitwise Time-Division Duplex Transceiver for High Channel Count Optogenetic Neural Interface.
IEEE Trans. Biomed. Circuits Syst.
Yu-Ju Lin, Hyunsoo Song, Sungjin Oh, Mihály Vöröslakos, Kanghwan Kim, Xing Chen, David D. Wentzloff, György Buzsáki, Sung-Yun Park, Euisik Yoon
2022 J jnl
A Miniaturized 256-Channel Neural Recording Interface With Area-Efficient Hybrid Integration of Flexible Probes and CMOS Integrated Circuits.
IEEE Trans. Biomed. Eng.
Sung-Yun Park, Kyounghwan Na, Mihály Vöröslakos, Hyunsoo Song, Nathan Slager, Sungjin Oh, John P. Seymour, György Buzsáki, Euisik Yoon
2022 — conf
LFP-Adaptive Dynamic Zoom-and-Tracking Dual-Band Neural Recording Front-End Using a Power-Efficient Incremental Delta-Sigma ADC.
BioCAS
Sungjin Oh, Hyunsoo Song, Nathan Slager, Jose Roberto Lopez Ruiz, Sung-Yun Park, Euisik Yoon
2021 — conf
A 5.1ms Low-Latency Face Detection Imager with In-Memory Charge-Domain Computing of Machine-Learning Classifiers.
VLSI Circuits
Hyunsoo Song, Sungjin Oh, Juan Salinas, Sung-Yun Park, Euisik Yoon
2018 — conf
A Battery-Powered Opto-Electrophysiology Neural Interface with Artifact-Preventing Optical Pulse Shaping.
VLSI Circuits
Adam E. Mendrela, Sung-Yun Park, Mihály Vöröslakos, Michael P. Flynn, Euisik Yoon
2018 J jnl
Dynamic Power Reduction in Scalable Neural Recording Interface Using Spatiotemporal Correlation and Temporal Sparsity of Neural Signals.
IEEE J. Solid State Circuits
Sung-Yun Park, Jihyun Cho, Kyuseok Lee, Euisik Yoon
2018 J jnl
Minimally-Invasive Neural Interface for Distributed Wireless Electrocorticogram Recording Systems.
Sensors
Sun-Il Chang, Sung-Yun Park, Euisik Yoon
2018 J jnl
Modular 128-Channel Δ-ΔΣ Analog Front-End Architecture Using Spectrum Equalization Scheme for 1024-Channel 3-D Neural Recording Microsystems.
IEEE J. Solid State Circuits
Sung-Yun Park, Jihyun Cho, Kyounghwan Na, Euisik Yoon
2015 — conf
12.3 PWM buck converter with >80% PCE in 45μA-to-4mA loads using analog-digital hybrid control for impiantale biomedical systems.
ISSCC
Sung-Yun Park, Jihyun Cho, Kyuseok Lee, Euisik Yoon
2015 J jnl
A PWM Buck Converter With Load-Adaptive Power Transistor Scaling Scheme Using Analog-Digital Hybrid Control for High Energy Efficiency in Implantable Biomedical Systems.
IEEE Trans. Biomed. Circuits Syst.
Sung-Yun Park, Jihyun Cho, Kyuseok Lee, Euisik Yoon
2015 — conf
Toward 1024-channel parallel neural recording: Modular Δ-ΔΣ analog front-end architecture with 4.84fJ/C-s·mm
VLSIC
Sung-Yun Park, Jihyun Cho, Kyounghwan Na, Euisik Yoon