Sung-Wan Hong

54 papers Journal 24Unranked 30
YearRankTypeTitle / Venue / Authors
2026 — conf
26.6 a 92.4%-Peak-Efficiency 48V to 0.8-to-1.6V Hybrid Converter with Inductor-Interleaved Fibonacci Switched-Capacitor.
ISSCC
Hyun-Woo Jeong, Chan-Ho Lee, Hyeon-Ji Choi, Sung-Wan Hong
2026 — conf
A 94.8%-Peak-Efficiency Double Step-Up SIBO Converter Achieving 88% Output Ripple Reduction for AMOLED Display.
ISSCC
Hyeon-Ji Choi, Joo-Mi Cho, Sang-Yun Nam, Sung-Wan Hong
2026 — conf
A Hybrid Bipolar-Output Isolated Converter with +15V/-5V Outputs for SiC Gate Drivers.
ISSCC
Joo-Mi Cho, Jeong-Hun Kim, Yong-Chan Lee, Sung-Wan Hong
2025 — conf
21.6 A 2A Fully Analog Distribution LDO with Noise Immunity for an SoC.
ISSCC
Jeong-Hun Kim, Young-Jun Jeon, Won-Gyu Kim, Jaeseung Lee, Jun-Hyeok Yang, Sung-Wan Hong
2025 — conf
9.5 A Sub-1V, 50mV Dropout LDO Using Pseudo-Impedance Buffer with Phase-Margin Improvement Design.
ISSCC
Young-Jun Jeon, Jeong-Hun Kim, Won-Gyu Kim, Sung-Wan Hong
2025 J jnl
A 0-to- 10μF Off-Chip Output Capacitor-Scalable Boost Converter Achieving 96.68% Peak Efficiency.
IEEE Solid State Circuits Lett.
Hyeon-Ji Choi, Joo-Mi Cho, Hyo-Jin Park, Seok-Jun Lee, Sung-Wan Hong
2025 J jnl
A 1.8-5.5-V LDO-BGR System With LACM Buffer for High PSRR in Camera Applications.
IEEE Trans. Circuits Syst. II Express Briefs
Won-Gyu Kim, Sang-Yun Nam, Young-Jun Jeon, Sung-Wan Hong
2025 J jnl
A 12-V Input 0.3 V-to-0.6 V Output Imbalanced Inductor-Currents Converter That Achieves a Peak Efficiency of 90.7%.
IEEE Trans. Circuits Syst. II Express Briefs
Chan-Ho Lee, Jeong-Hun Kim, Hyunwoo Jeong, Hyeonho Park, Jeeyoung Shin, Junwon Jeong, Woong Choi, Sung-Wan Hong
2025 J jnl
A 2 A Dual Loop LDO With Dynamic Negative Feedback Loop and G
IEEE Trans. Circuits Syst. I Regul. Pap.
Ho-Chan Ahn, Chan-Ho Lee, Sang-Yun Nam, Jeong-Hun Kim, Hyeonho Park, Hyunwoo Jeong, Jeeyoung Shin, Woong Choi, Junwon Jeong, Sung-Wan Hong
2025 J jnl
A 91.7% Peak-Efficiency 48V-to-1V Pseudo Two-Stage Two-Phase Hybrid Buck Converter.
IEEE Trans. Circuits Syst. II Express Briefs
Young-Ju Oh, Chan-Ho Lee, Jeong-Hun Kim, Hyeonho Park, Dowon Jeong, Sung-Wan Hong
2025 J jnl
A Robust High On-Duty Buck Converter Achieving a Peak Effective On-Duty of 0.976 With EMI Suppression.
IEEE Trans. Ind. Electron.
Young-Ju Oh, Chan-Ho Lee, Sang-Yun Nam, Jun-Seok Oh, Seok-Jun Lee, Jun-Hyeok Yang, Jaeseung Lee, Sung-Wan Hong
2025 J jnl
Compact Single-Stage Input and Output Rail-to-Rail Class AB Buffer Amplifier With an Asymmetric Output Structure.
IEEE Solid State Circuits Lett.
Young-Ju Oh, Hyun-Woo Jeong, Hyeonho Park, Jeeyoung Shin, Junwon Jeong, Woong Choi, Sung-Wan Hong
2024 — conf
8.7 A 92.7% Peak Efficiency 12V-to-60V Input to 1.2V Output Hybrid DC-DC Converter Based on a Series-Parallel-Connected Switched Capacitor.
ISSCC
Hyeon-Ji Choi, Chan-Ho Lee, Young-Jun Jeon, Hyeonho Park, Jeong-Hun Kim, Young-Jin Woo, Ju-Pyo Hong, Haifeng Jin, Sung-Wan Hong
2024 — conf
8.8 A 97.18% Peak-Efficiency Asymmetrically Implemented Dual-phase (AID) Converter with a full Voltage-Conversion Ratio (VCR) between 0-and-1.
ISSCC
Hyo-Jin Park, Joo-Mi Cho, Chan-Ho Lee, Young-Ju Oh, Hyunwoo Jeong, Jun-Hyeok Yang, Jaeseung Lee, Sung-Wan Hong
2024 J jnl
A 92 ns Settling-Time Fast-Transient Capacitor-Less LDO With a Stable Class B Bandwidth-Boosting Error Amplifier and an Improved Buffer for Mobile Applications.
IEEE Trans. Ind. Electron.
Chan-Kyu Lee, Chan-Ho Lee, Young-Jun Jeon, Young-Ju Oh, Byunghun Lee, Sung-Wan Hong
2024 J jnl
A Simultaneous Energy Transferring SIBO Converter Achieving Low Ripple and High Efficiency for AMOLED Applications.
IEEE J. Solid State Circuits
Hyo-Jin Park, Joo-Mi Cho, Hyeon-Ji Choi, Chan-Ho Lee, Young-Jun Jeon, Jeeyoung Shin, Woong Choi, Junwon Jeong, Sung-Wan Hong
2023 — conf
96.48% Peak-Efficiency Continuous-Current Step-Up Battery Charger (CC-SUBC) with Dual Energy-Harvesting Sources for Automotive Application.
VLSI Technology and Circuits
Hyo-Jin Park, Joo-Mi Cho, Hyeon-Ji Choi, Chan-Ho Lee, Sung-Wan Hong
2023 — conf
A 1V 20.7μW Four-Stage Amplifier Capable of Driving a 4-to-12nF Capacitive Load with >1.07MHz GBW with an Improved Active Zero.
VLSI Technology and Circuits
Chan-Ho Lee, Hyo-Jin Park, Joo-Mi Cho, Hyeon-Ji Choi, Young-Jun Jeon, Sung-Wan Hong
2023 — conf
A 2 A Maximum Load Current Capable 0-to-1 μF Off-chip Capacitor N-type LDO using Dual Dynamic Negative Feedback Loop and an Improved Error Amplifier.
ESSCIRC
Ho-Chan Ahn, Joo-Mi Cho, Hyeon-Ji Choi, Chan-Ho Lee, Chan-Kyu Lee, Sung-Wan Hong
2023 — conf
A Capacitor-less LDO for Mobile Devices with Fast Transient Using High Gain Positive Feedback Loop.
ISOCC
Esun Baik, Hyo-Jin Park, Sung-Wan Hong
2023 J jnl
An Ultra-Low Power Soft-Switching Self-Oscillating SIMO Converter for Implantable Stimulation Systems.
IEEE Trans. Ind. Electron.
Hyeon-Ji Choi, ChiSung Bae, Yeunhee Huh, Sang Joon Kim, Seungchul Jung, Kye-Seok Yoon, Joo-Mi Cho, Hyo-Jin Park, Chan-Ho Lee, Su-Min Park, Esun Baik, Young-Ju Oh, Ho-Chan Ahn, Chan-Kyu Lee, Sung-Wan Hong
2022 — conf
A High Slew-rate Wide-range Capacitive Load Driving Buffer Amplifier with Correlated Dual Positive Feedback Loops.
ISOCC
Young-Ju Oh, Hyo-Jin Park, Joo-Mi Cho, Hyeon-Ji Choi, Su-Min Park, Chan-Ho Lee, Esun Baik, Chan-Kyu Lee, Ho-Chan Ahn, Sung-Wan Hong
2021 — conf
A 0.93-μW Single-Stage Rail-to-Rail Class AB Buffer Amplifier Improving DC gain and Slew-Rate with Different-Ratio Current-Mirrors and Positive-Feedback Loops.
VLSI Circuits
Joo-Mi Cho, Hyo-Jin Park, Sung-Wan Hong
2021 — conf
A 100-MHz 81.2% All-Paths Inductor-Connected Buck-Converter with Balanced Conduction-Losses and Continuous Path-Currents.
ESSCIRC
Joo-Mi Cho, Hyo-Jin Park, Hyunji Choi, Esun Baik, Jeeyoung Shin, Sung-Wan Hong
2021 — conf
A 18 µA Rail-to-Rail Class-AB Operational Amplifier with a High-Slew Miller Compensation (HSMC) Technique with 240% Settling Time Reduction in 0.18 µm.
ESSCIRC
Hyo-Jin Park, Joo-Mi Cho, Hyunji Choi, Esun Baik, Jeeyoung Shin, Sung-Wan Hong
2021 J jnl
A Robust Multioutput Self-Regulated Rectifier for Wirelessly Powered Biomedical Applications.
IEEE Trans. Ind. Electron.
Najam Ul Hassan, Sung-Wan Hong, Byunghun Lee
2021 — conf
An Output Capacitor-less Low-dropout Regulator using a Wide-range Single-stage Gain-boosted Error Amplifier and a Frequency-dependent Buffer with a Total Compensation Capacitance of 2.5 pF in 0.5 µm CMOS.
A-SSCC
Hyeon-Ji Choi, Joo-Mi Cho, Hyo-Jin Park, Sung-Wan Hong
2020 — conf
11.6 A 1.46mm
ISSCC
Sung-Wan Hong
2020 — conf
32.1 A 13.56MHz Current-Mode Wireless Power and Data Receiver with Efficient Power Extracting Controller and Energy-Shift Keying Technique for Loosely Coupled Implantable Devices.
ISSCC
Sung-Wan Hong
2020 J jnl
A Resonant Current-Mode Wireless Power and Data Receiver for Loosely Coupled Implantable Devices.
IEEE J. Solid State Circuits
Sung-Wan Hong
2020 J jnl
An Output Capacitorless Low-Dropout Regulator With a Low-V
IEEE Trans. Ind. Electron.
Jieun Park, Byunghun Lee, Sung-Wan Hong
2019 J jnl
A Hybrid Structure Dual-Path Step-Down Converter With 96.2% Peak Efficiency Using 250-m $\Omega$ Large-DCR Inductor.
IEEE J. Solid State Circuits
Yeunhee Huh, Sung-Wan Hong, Gyu-Hyeong Cho
2019 J jnl
A Noninverting Buck-Boost Converter With State-Based Current Control for Li-ion Battery Management in Mobile Applications.
IEEE Trans. Ind. Electron.
Ki-Duk Kim, Hyung-Min Lee, Sung-Wan Hong, Gyu-Hyeong Cho
2019 J jnl
Voltage-Boosted Current-Mode Wireless Power Receiver for Directly Charging a Low-Voltage Battery in Implantable Medical Systems.
IEEE Trans. Ind. Electron.
Sang-Han Lee, Jun-Suk Bang, Kye-Seok Yoon, Hui-Dong Gwon, Sang-Won Kim, In-Kui Cho, Sung-Wan Hong, Gyu-Hyeong Cho
2018 J jnl
A 10.1" 183-µW/electrode, 0.73-mm2/sensor High-SNR 3-D Hover Sensor Based on Enhanced Signal Refining and Fine Error Calibrating Techniques.
IEEE J. Solid State Circuits
Yeunhee Huh, Sung-Wan Hong, Sang-Hui Park, Changsik Shin, Jun-Suk Bang, Changbyung Park, Sungsoo Park, Gyu-Hyeong Cho
2018 — conf
A 95.2% efficiency dual-path DC-DC step-up converter with continuous output current delivery and low voltage ripple.
ISSCC
Se-Un Shin, Yeunhee Huh, Yong-Min Ju, Sung-Won Choi, Changsik Shin, Young-Jin Woo, Minseong Choi, Se-Hong Park, Young-Hoon Sohn, Min-Woo Ko, Youngsin Jo, Hyun-Ki Han, Hyung-Min Lee, Sung-Wan Hong, Wanyuan Qu, Gyu-Hyeong Cho
2018 — conf
A Hybrid Dual-Path Step-Down Converter with 96.2% Peak Efficiency Using a $250\text{m}$ μ Large-DCR Inductor.
VLSI Circuits
Yeunhee Huh, Se-Un Shin, Sung-Wan Hong, Young-Jin Woo, Yong-Min Ju, Sung-Won Choi, Gyu-Hyeong Cho
2018 — conf
A Quasi-Digital Ultra-Fast Capacitor-Less Low-Dropout Regulator Based on Comparator Control for x8 Current Spike of PCRAM Systems.
VLSI Circuits
Sung-Won Choi, Yeunhee Huh, Sang-Hui Park, Kye-Seok Yoon, Jun-Suk Bang, Se-Un Shin, Yong-Min Ju, Yu-Jin Yang, Junghyuk Yoon, Changyong Ahn, Taekseung Kim, Sung-Wan Hong, Gyu-Hyeong Cho
2018 J jnl
Double Pile-Up Resonance Energy Harvesting Circuit for Piezoelectric and Thermoelectric Materials.
IEEE J. Solid State Circuits
Kye-Seok Yoon, Sung-Wan Hong, Gyu-Hyeong Cho
2016 J jnl
A Pseudo Single-Stage Amplifier With an Adaptively Varied Medium Impedance Node for Ultra-High Slew Rate and Wide-Range Capacitive-Load Drivability.
IEEE Trans. Circuits Syst. I Regul. Pap.
Sung-Wan Hong, Gyu-Hyeong Cho
2016 J jnl
High-Gain Wide-Bandwidth Capacitor-Less Low-Dropout Regulator (LDO) for Mobile Applications Utilizing Frequency Response of Multiple Feedback Loops.
IEEE Trans. Circuits Syst. I Regul. Pap.
Sung-Wan Hong, Gyu-Hyeong Cho
2015 — conf
12.1 A 0.518mm
ISSCC
Sang-Han Lee, Jun-Suk Bang, Kye-Seok Yoon, Sung-Wan Hong, Changsik Shin, Min-Yong Jung, Gyu-Hyeong Cho
2015 — conf
7.4μW Ultra-high slew-rate pseudo single-stage amplifier driving 0.1-to-15nF capacitive load with >69° phase margin.
VLSIC
Sung-Wan Hong, Gyu-Hyeong Cho
2015 — conf
86.55% Peak efficiency envelope modulator for 1.5W 10MHz LTE PA without AC coupling capacitor.
VLSIC
Si-Duk Sung, Sung-Wan Hong, Jun-Suk Bang, Ji-Seon Paek, Seung-Chul Lee, Thomas Byunghak Cho, Gyu-Hyeong Cho
2015 J jnl
Inverting Buck-Boost DC-DC Converter for Mobile AMOLED Display Using Real-Time Self-Tuned Minimum Power-Loss Tracking (MPLT) Scheme With Lossless Soft-Switching for Discontinuous Conduction Mode.
IEEE J. Solid State Circuits
Sung-Wan Hong, Sang-Hui Park, Tae-Hwang Kong, Gyu-Hyeong Cho
2014 — conf
23.5 An energy pile-up resonance circuit extracting maximum 422% energy from piezoelectric material in a dual-source energy-harvesting interface.
ISSCC
Young-sub Yuk, Seungchul Jung, Hui-Dong Gwon, Sukhwan Choi, Si-Duk Sung, Tae-Hwang Kong, Sung-Wan Hong, Jun-Han Choi, Min-Yong Jeong, Jong-Pil Im, Seung-Tak Ryu, Gyu-Hyeong Cho
2014 J jnl
A 0.791 mm
IEEE J. Solid State Circuits
Tae-Hwang Kong, Sung-Wan Hong, Gyu-Hyeong Cho
2014 — conf
Inverting buck-boost DC-DC converter for mobile AMOLED display with real-time self-tuned minimum power-loss tracking scheme.
CICC
Sung-Wan Hong, Gyu-Hyeong Cho
2013 J jnl
High Area-Efficient DC-DC Converter With High Reliability Using Time-Mode Miller Compensation (TMMC).
IEEE J. Solid State Circuits
Sung-Wan Hong, Tae-Hwang Kong, Sang-Hui Park, Changbyung Park, Seungchul Jung, Sungwoo Lee, Gyu-Hyeong Cho
2013 J jnl
Zero
IEEE J. Solid State Circuits
Tae-Hwang Kong, Young-Jin Woo, Se-Won Wang, Yong-Joon Jeon, Sung-Wan Hong, Gyu-Hyeong Cho
2012 — conf
A 0.791mm
CICC
Tae-Hwang Kong, Sung-Wan Hong, Sungwoo Lee, Jong-Pil Im, Gyu-Hyeong Cho
2012 — conf
A 40mV transformer-reuse self-startup boost converter with MPPT control for thermoelectric energy harvesting.
ISSCC
Jong-Pil Im, Se-Won Wang, Kang-Ho Lee, Young-Jin Woo, Young-sub Yuk, Tae-Hwang Kong, Sung-Wan Hong, Seung-Tak Ryu, Gyu-Hyeong Cho
2012 — conf
High area-efficient DC-DC converter using Time-Mode Miller Compensation (TMMC).
VLSIC
Sung-Wan Hong, Tae-Hwang Kong, Seungchul Jung, Sungwoo Lee, Se-Won Wang, Jong-Pil Im, Gyu-Hyeong Cho
2011 — conf
Zero-order control of boost DC-DC converter with transient enhancement using residual current.
ISSCC
Tae-Hwang Kong, Young-Jin Woo, Se-Won Wang, Sung-Wan Hong, Gyu-Hyeong Cho