Sung-Ung Kwak

16 papers C 1Journal 6Unranked 8
YearRankTypeTitle / Venue / Authors
2024 — conf
9.2 A 2.08mW 64.4dB SNDR 400MS/s 12b Pipelined-SAR ADC using Mismatch and PVT Variation Tolerant Dynamically Biased Ring Amplifier in 8nm.
ISSCC
Yong Lim, Jaehoon Lee, Jongmi Lee, Kwangmin Lim, Seunghyun Oh, Jongwoo Lee, Sung-Ung Kwak
2024 — conf
9.6 A 6
ISSCC
Jongmi Lee, Seong-Eun Cho, Jaehoon Lee, Yong Lim, Seunghyun Oh, Jongwoo Lee, Sung-Ung Kwak
2024 J jnl
A 4-nm 16-Gb/s/pin Single-Ended PAM-4 Parallel Transceiver With Switching-Jitter Compensation and Transmitter Optimization.
IEEE J. Solid State Circuits
Jahoon Jin, Soo-Min Lee, Kyunghwan Min, Sodam Ju, Jihoon Lim, Jisu Yook, Jihoon Lee, Hyunsu Chae, Kwonwoo Kang, Yunji Hong, Yeongcheol Jeong, Sungsik Park, Sang-Ho Kim, Jongwoo Lee, Joonsuk Kim, Sung-Ung Kwak
2023 J jnl
A 1.05-A/m Minimum Magnetic Field Strength Single-Chip, Fully Integrated Biometric Smart Card SoC Achieving 792.5-ms Transaction Time With Anti-Spoofing Fingerprint Authentication.
IEEE J. Solid State Circuits
Ji-Soo Chang, Eunsang Jang, Youngkil Choi, Moonkyu Song, Sanghyo Lee, Gi-Jin Kang, Junho Kim, Uijong Song, Chang-Yeon Cho, Giyeong Ko, Hyunseok Hwang, Junseo Lee, Han-Sol Lee, Yong-Il Kwon, Kyungduck Seo, Taeseon Kim, Hyun-Wook Lim, Seongwook Song, Jae-Youl Lee, Sung-Ung Kwak
2022 — conf
A 1.05A/m Minimum Magnetic Field Strength Single-Chip Fully Integrated Biometric Smart Card SoC Achieving 1014.7ms Transaction Time with Anti-Spoofing Fingerprint Authentication.
ISSCC
Ji-Soo Chang, Eunsang Jang, Youngkil Choi, Moonkyu Song, Sanghyo Lee, Gi-Jin Kang, Junho Kim, Shin-Wuk Kang, Uijong Song, Chang-Yeon Cho, Junseo Lee, Kyungduck Seo, Seongwook Song, Sung-Ung Kwak
2022 — conf
A Reconfigurable Series-Parallel Charger for Dual-Battery Applications with 89W 97.7
ISSCC
Sung-Woo Lee, Taejin Jeong, Yonghwan Cho, Jeongdu Yoo, Sungkyu Cho, Minkyu Kwon, Daewoong Cho, Sang Hee Kang, Jung-Wook Heo, Hyoung-Seok Oh, Sung-Ung Kwak
2021 — conf
A 10A/μs Fast Transient AOT Voltage Regulator on DDR5 DIMM with Dithered Pseudo-Constant Switching Frequency Achieving -6dB Harmonic Suppression.
VLSI Circuits
Taeyoung Chung, Sooa Kim, Jehyung Yoon, Heeseok Han, Kyung Soo Park, Hokyu Lee, Ho-Young Yoon, Sun-Kyu Lee, JongYoon Lim, Yongjin Kwon, Jungbong Lee, Sung-Ung Kwak
2021 — conf
Zero Current Detector with Slope Judgement Calibration in Mobile Battery Charger IC.
A-SSCC
Kye-Seok Yoon, Hyebong Ko, Jinwoo So, Sung-Woo Lee, Sungkyu Cho, Woonhyung Heo, Ho-Sung Son, Seung-Hoon Kim, Dong-Joon Kim, Kwon-Yub Hyung, Daewoong Cho, Jung-Wook Heo, Hyoung-Seok Oh, Sung-Ung Kwak
2004 J jnl
A dual 10-b 200-MSPS pipelined D/A converter with DLL-based clock synthesizer.
IEEE J. Solid State Circuits
Gabriele Manganaro, Sung-Ung Kwak, Alex R. Bugeja
2003 J jnl
A behavioral modeling approach to the design of a low jitter clock source.
IEEE Trans. Circuits Syst. II Express Briefs
Gabriele Manganaro, Sung-Ung Kwak, SeongHwan Cho, Anurag Pulincherry
2003 — conf
A dual 10b 200MSPS pipeline D/A converter with DLL-based clock synthesizer.
CICC
Gabriele Manganaro, Sung-Ung Kwak, Alex R. Bugeja
2001 — conf
Design of a 14 b 100 MS/s switched-capacitor pipelined ADC in RFSiGe BiCMOS.
ISCAS (1)
Alex R. Bugeja, Sung-Ung Kwak
2000 C conf
A triple 8b, 80MSPS 3.3 V graphics digitizer.
ISCAS
Irfan A. Chaudrhry, Sung-Ung Kwak, Gabriele Manganaro, Maher Sarraj, T. Lakshmi Viswanathan
1997 J jnl
A 15-b, 5-Msample/s low-spurious CMOS ADC.
IEEE J. Solid State Circuits
Sung-Ung Kwak, Bang-Sup Song, Kantilal Bacrania
1997 — —
Low-Spurious Analog-to-Digital Conversion Using Multi-Stage Code-Error Calibration
Sung-Ung Kwak
1995 J jnl
A 10-b 20-Msample/s low-power CMOS ADC.
IEEE J. Solid State Circuits
Won-Chul Song, Hae-Wook Choi, Sung-Ung Kwak, Bang-Sup Song