Sumedh W. Sathaye

16 papers A* 4A 1Journal 7Unranked 4
YearRankTypeTitle / Venue / Authors
2006 J jnl
Preface.
IBM J. Res. Dev.
Erik R. Altman, Sumedh W. Sathaye
2001 J jnl
Dynamic Binary Translation and Optimization.
IEEE Trans. Computers
Kemal Ebcioglu, Erik R. Altman, Michael Gschwind, Sumedh W. Sathaye
2000 A conf
Binary translation and architecture convergence issues for IBM system/390.
ICS
Michael Gschwind, Kemal Ebcioglu, Erik R. Altman, Sumedh W. Sathaye
2000 J jnl
Dynamic and Transparent Binary Translation.
Computer
Michael Gschwind, Erik R. Altman, Sumedh W. Sathaye, Paul Ledak, David Appenzeller
2000 J jnl
Properties of Rescheduling Size Invariance for Dynamic Rescheduling-Based VLIW Cross-Generation Compatibility.
IEEE Trans. Computers
Thomas M. Conte, Sumedh W. Sathaye
2000 J jnl
System-level power consumption modeling and tradeoff analysis techniques for superscalar processor design.
IEEE Trans. Very Large Scale Integr. Syst.
Thomas M. Conte, Kishore N. Menezes, Sumedh W. Sathaye, Mark C. Toburen
1999 — conf
Execution-Based Scheduling for VLIW Architectures.
Euro-Par
Kemal Ebcioglu, Erik R. Altman, Sumedh W. Sathaye, Michael Gschwind
1999 A* conf
Optimizations and Oracle Parallelism with Dynamic Translation.
MICRO
Kemal Ebcioglu, Erik R. Altman, Sumedh W. Sathaye, Michael Gschwind
1998 — conf
A Fast Interrupt Handling Scheme for VLIW Processors.
IEEE PACT
Emre Özer, Sumedh W. Sathaye, Kishore N. Menezes, Sanjeev Banerjia, Matthew D. Jennings, Thomas M. Conte
1998 J jnl
MPS: Miss-Path Scheduling for Multiple-Issue Processors.
IEEE Trans. Computers
Sanjeev Banerjia, Sumedh W. Sathaye, Kishore N. Menezes, Thomas M. Conte
1997 J jnl
Optimization of VLIW compatibility systems employing dynamic rescheduling.
Int. J. Parallel Program.
Thomas M. Conte, Sumedh W. Sathaye
1997 — conf
Path Prediction for High Issue-Rate Processors.
IEEE PACT
Kishore N. Menezes, Sumedh W. Sathaye, Thomas M. Conte
1996 A* conf
A Persistent Rescheduled-page Cache for Low Overhead Object Code Compatibility in VLIW Architectures.
MICRO
Thomas M. Conte, Sumedh W. Sathaye, Sanjeev Banerjia
1996 A* conf
Instruction Fetch Mechanisms for VLIW Architectures with Compressed Encodings.
MICRO
Thomas M. Conte, Sanjeev Banerjia, Sergei Y. Larin, Kishore N. Menezes, Sumedh W. Sathaye
1995 — conf
A technique to determine power-efficient, high-performance superscalar processors.
HICSS (1)
Thomas M. Conte, Kishore N. Menezes, Sumedh W. Sathaye
1995 A* conf
Dynamic rescheduling: a technique for object code compatibility in VLIW architectures.
MICRO
Thomas M. Conte, Sumedh W. Sathaye