Suleyman Tosun

48 papers A 2C 7Journal 25Unranked 14

Year	Rank	Type	Title / Venue / Authors
2025	J	`jnl`	A Novel Heuristic Neuron Grouping Algorithm for Deep Neural Network Accelerators. J. Circuits Syst. Comput. Alperen Cakin, Selma Dilek, Suleyman Tosun, Furkan Nacar
2024	J	`jnl`	DICEguard: enhancing DICE security for IoT devices with periodic memory forensics. J. Supercomput. Yusuf Yamak, Suleyman Tosun, Murat Aydos
2024	J	`jnl`	Energy-aware application mapping methods for mesh-based hybrid wireless network-on-chips. J. Supercomput. Alperen Cakin, Selma Dilek, Suleyman Tosun
2024	J	`jnl`	Neuron grouping and mapping methods for 2D-mesh NoC-based DNN accelerators. J. Parallel Distributed Comput. Furkan Nacar, Alperen Cakin, Selma Dilek, Suleyman Tosun, Krishnendu Chakrabarty
2023	J	`jnl`	Simulated annealing-based high-level synthesis methodology for reliable and energy-aware application specific integrated circuit designs with multiple supply voltages. Int. J. Circuit Theory Appl. Selma Dilek, Suleyman Tosun, Alperen Cakin
2022	J	`jnl`	A High-Level Synthesis Methodology for Energy and Reliability-Oriented Designs. IEEE Trans. Computers Selma Dilek, Rawan Smri, Suleyman Tosun, Deniz Dal
2022	J	`jnl`	A survey on computation offloading and service placement in fog computing-based IoT. J. Supercomput. Kaouther Gasmi, Selma Dilek, Suleyman Tosun, Suat Ozdemir
2022	J	`jnl`	Computation Power and Energy Optimized Task Allocation in Internet of Things. IEEE Trans. Netw. Serv. Manag. Inan Kazanci, Suat Ozdemir, Suleyman Tosun
2022	C	`conf`	Towards QoS-Aware Resource Allocation in Fog Computing: A Theoretical Model. ISNCC Selma Dilek, Alma Oracevic, Suleyman Tosun, Suat Ozdemir
2021	J	`jnl`	HAFTA: Highly adaptive fault-tolerant routing algorithm for two-dimensional network-on-chips. Concurr. Comput. Pract. Exp. Anil Ipek, Suleyman Tosun, Suat Ozdemir
2021	J	`jnl`	ILP formulation and heuristic method for energy-aware application mapping on 3D-NoCs. J. Supercomput. Yigitcan Nalci, Pinar Kullu, Suleyman Tosun, Ozcan Ozturk
2021	C	`conf`	Q-Learning-based Routing Algorithm for 3D Network-on-Chips. DDECS Nurettin Bölücü, Suleyman Tosun
2020	J	`jnl`	Library Characterization of Arithmetic Circuits for Reliability-Aware Designs in SRAM-Based FPGAs. J. Electron. Test. Akin Gokalan, Suleyman Tosun, Deniz Dal
2020	J	`jnl`	Mapping application-specific topology to mesh topology with reconfigurable switches. IET Comput. Digit. Tech. Pinar Kullu, Yilmaz Ar, Suleyman Tosun, Suat Ozdemir
2019	J	`jnl`	Energy-aware and fault-tolerant custom topology design method for network-on-chips. Nano Commun. Networks Pinar Kullu, Suleyman Tosun
2019	J	`jnl`	Genetic Algorithm-based Reliability Optimization for High-Level Synthesis. J. Circuits Syst. Comput. Suleyman Tosun, Tohid Taghizad Gogjeh Yaran
2019	C	`conf`	MARM-GA: Mapping Applications to Reconfigurable Mesh using Genetic Algorithm. DSD Pinar Kullu, Suleyman Tosun
2019	C	`conf`	Number Analysis and Operator Detection in Telecommunication Systems. ISNCC Murat Berk, Onder Aycicek, Ismail Ay, Seda Gonenc, Suleyman Tosun
2018	J	`jnl`	Energy-aware partitioning of fault-tolerant irregular topologies for 3D network-on-chips. J. Supercomput. Suleyman Tosun, Vahid Babaei Ajabshir
2018	J	`jnl`	Evolutionary task allocation in Internet of Things-based application domains. Future Gener. Comput. Syst. Enan A. Khalil, Suat Ozdemir, Suleyman Tosun
2017	C	`conf`	Energy-aware application-specific topology generation for 3D Network-on-Chips. DDECS Arash Barzinmehr, Suleyman Tosun
2017	C	`conf`	Improving combinational circuit resilience against soft errors via selective resource allocation. DDECS Tohid Taghizad Gogjeh Yaran, Suleyman Tosun
2016	—	`conf`	FPGA implementation of a fault-tolerant application-specific NoC design. DTIS Serif Yesil, Suleyman Tosun, Özcan Özturk
2015	J	`jnl`	Application mapping algorithms for mesh-based network-on-chip architectures. J. Supercomput. Suleyman Tosun, Özcan Özturk, Erencan Ozkan, Meltem Ozen
2015	J	`jnl`	Energy reduction in 3D NoCs through communication optimization. Computing Özcan Özturk, Ismail Akturk, Ismail Kadayif, Suleyman Tosun
2015	J	`jnl`	Fault-Tolerant Topology Generation Method for Application-Specific Network-on-Chips. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Suleyman Tosun, Vahid Babaei Ajabshir, Ozge Mercanoglu, Özcan Özturk
2015	—	`conf`	Moving object detection by a mounted moving camera. EUROCON Ozge Mercanoglu Sincan, Vahid Babaei Ajabshir, Hacer Yalim Keles, Suleyman Tosun
2014	C	`conf`	Fault-Tolerant Irregular Topology Design Method for Network-on-Chips. DSD Suleyman Tosun, Vahid Babaei Ajabshir, Ozge Mercanoglu, Özcan Özturk
2014	—	`conf`	Fault-Tolerant Routing for Irregular-Topology-Based Network-on-Chips. CANDAR Vahid Babaei Ajabshir, Suleyman Tosun
2012	J	`jnl`	Application-specific topology generation algorithms for network-on-chip design. IET Comput. Digit. Tech. Suleyman Tosun, Yilmaz Ar, Suat Ozdemir
2012	J	`jnl`	Energy- and reliability-aware task scheduling onto heterogeneous MPSoC architectures. J. Supercomput. Suleyman Tosun
2011	J	`jnl`	Cluster-based application mapping method for Network-on-Chip. Adv. Eng. Softw. Suleyman Tosun
2011	J	`jnl`	New heuristic algorithms for energy aware application mapping and routing on mesh-based NoCs. J. Syst. Archit. Suleyman Tosun
2010	J	`jnl`	FIT: Fast Irregular Topology generation algorithm for application specific NoCs. IEICE Electron. Express Suleyman Tosun
2007	J	`jnl`	Reliability-Centric High-Level Synthesis CoRR Suleyman Tosun, Nazanin Mansouri, Ercument Arvas, Mahmut T. Kandemir, Yuan Xie
2006	—	`conf`	A Novel Essential Prime Implicant Identification Method for Exact Direct Cover Logic Minimization. CDES Sirzat Kahramanli, Suleyman Tosun
2006	—	`conf`	An ILP Formulation for Task Scheduling on Heterogeneous Chip Multiprocessors. ISCIS Suleyman Tosun, Nazanin Mansouri, Mahmut T. Kandemir, Ozcan Ozturk
2006	—	`conf`	An ILP based approach to address code generation for digital signal processors. ACM Great Lakes Symposium on VLSI Ozcan Ozturk, Mahmut T. Kandemir, Suleyman Tosun
2006	—	`conf`	Multi-Level On-Chip Memory Hierarchy Design for Embedded Chip Multiprocessors. ICPADS (1) Ozcan Ozturk, Mahmut T. Kandemir, Mary Jane Irwin, Suleyman Tosun
2006	—	`conf`	Reducing Memory Requirements through Task Recomputation in Embedded Multi-CPU Systems. ISVLSI Hakduran Koc, Suleyman Tosun, Ozcan Ozturk, Mahmut T. Kandemir
2006	—	`conf`	Using Task Recomputation During Application Mapping in Parallel Embedded Architectures. CDES Suleyman Tosun, Mahmut T. Kandemir, Hakduran Koc
2005	—	`conf`	An ILP Formulation for Reliability-Oriented High-Level Synthesis. ISQED Suleyman Tosun, Ozcan Ozturk, Nazanin Mansouri, Ercument Arvas, Mahmut T. Kandemir, Yuan Xie, Wei-Lun Hung
2005	—	`conf`	Constraint-based Code mapping for heterogeneous Chip multiprocessors. SoCC Suleyman Tosun, Nazanin Mansouri, Mahmut T. Kandemir, Özcan Özturk
2005	—	`conf`	On-Chip Memory Management for Embedded MpSoC Architectures Based on Data Compression. SoCC Özcan Özturk, Mahmut T. Kandemir, Mary Jane Irwin, Suleyman Tosun
2005	—	`conf`	Reliability-Centric Hardware/Software Co-Design. ISQED Suleyman Tosun, Nazanin Mansouri, Ercument Arvas, Mahmut T. Kandemir, Yuan Xie, Wei-Lun Hung
2005	A	`conf`	Reliability-Centric High-Level Synthesis. DATE Suleyman Tosun, Nazanin Mansouri, Ercument Arvas, Mahmut T. Kandemir, Yuan Xie
2005	A	`conf`	Reliability-Conscious Process Scheduling under Performance Constraints in FPGA-Based Embedded Systems. IPDPS Guilin Chen, Mahmut T. Kandemir, Suleyman Tosun, Ugur Sezer
2003	—	`conf`	Derving Intermediary RTLs for Verification of Pipelined Synthesized Designs. VLSI Suleyman Tosun, Hakduran Koc, Nazanin Mansouri