Sukumar Jairam

11 papers A 2Misc 5Unranked 4
YearRankTypeTitle / Venue / Authors
2010 A conf
Clock gating approaches by IOEX graphs and cluster efficiency plots.
DATE
Jithendra Srinivas, Sukumar Jairam
2009 — conf
Clock gating effectiveness metrics: Applications to power optimization.
ISQED
Jithendra Srinivas, Madhusudan Rao, Sukumar Jairam, H. Udayakumar, Jagdish C. Rao
2008 — conf
An SSO Based Methodology for EM Emission Estimation from SoCs.
ISQED
Sukumar Jairam, S. M. Stalin, Jean-Yves Oberle, H. Udayakumar
2008 A conf
Clock gating for power optimization in ASIC design cycle theory & practice.
ISLPED
Sukumar Jairam, Madhusudan Rao, Jithendra Srinivas, Parimala Vishwanath, H. Udayakumar, Jagdish C. Rao
2008 Misc conf
GyroCompiler: A Soft IP Model Synthesis and Analysis Framework for Design of MEMS Based Gyroscopes.
VLSI Design
Sukumar Jairam, Navakanta Bhat
2008 — conf
Techniques for Early Package Closure in System-in-Packages.
ISQED
Santhosh Coimbatore Vaidyanathan, Amit Mangesh Brahme, Sukumar Jairam
2008 — conf
Verification of a MEMS based adaptive cruise control system using simulation and semi-formal approaches.
ICECS
Sukumar Jairam, Kusum Lata, Subir K. Roy, Navakanta Bhat
2007 Misc conf
Calibration Based Methods for Substrate Modeling and Noise Analysis for Mixed-Signal SoCsc.
VLSI Design
Sankar P. Debnath, Ganesh P. Kumar, Sukumar Jairam
2006 Misc conf
A Methodology for Switching Activity Based IO Powerpad Optimisation.
VLSI Design
Snehashis Roy, Sukumar Jairam, H. Udayakumar
2005 Misc conf
A Methodology for Fast Vector Based Power Supply and Substrate Noise Analyses.
VLSI Design
Sankar P. Debnath, Sukumar Jairam, H. Udayakumar
2004 Misc conf
A Quasi Static Model for a Simply Supported Beam in a Circuit Simulation Framework.
VLSI Design
Sukumar Jairam, C. Venkatesh, Navakanta Bhat, Shyam Singh, Rudra Pratap