Sujit Dey

259 papers A* 31A 33B 21C 9Misc 20Journal 98Unranked 46
YearRankTypeTitle / Venue / Authors
2025 J jnl
(LiFT) Lightweight Fitness Transformer: A language-vision model for Remote Monitoring of Physical Training.
CoRR
Alexander Postlmayr, Pamela C. Cosman, Sujit Dey
2025 J jnl
JExplore: Design Space Exploration Tool for Nvidia Jetson Boards.
CoRR
Basar Kütükçü, Sinan Xie, Sabur Baidya, Sujit Dey
2025 — conf
ML-Enhanced Performance and Power Estimation for DNNs on Heterogenous SoCs.
MLCAD
Surya Selvam, Jacob R. Stevens, Sujit Dey, Anand Raghunathan
2025 A conf
ML-Power: Machine Learning based Power Estimation for SoCs.
ISLPED
Sujay Pandit, Sujit Dey, Anand Raghunathan
2024 J jnl
Attention-Based Multi-Modal Multi-View Fusion Approach for Driver Facial Expression Recognition.
IEEE Access
Jianrong Chen, Sujit Dey, Lei Wang, Ning Bi, Peng Liu
2024 J jnl
BRIC: Bottom-Up Residual Vector Quantization for Learned Image Compression.
IEEE Access
Bryse Flowers, Sujit Dey
2024 J jnl
Body and Head Orientation Estimation From Low-Resolution Point Clouds in Surveillance Settings.
IEEE Access
Onur N. Tepencelik, Wenchuan Wei, Pamela C. Cosman, Sujit Dey
2024 J jnl
Fast and Scalable Design Space Exploration for Deep Learning on Embedded Systems.
IEEE Access
Basar Kütükçü, Sabur Baidya, Sujit Dey
2024 J jnl
Graph-Based Multi-Modal Multi-View Fusion for Facial Action Unit Recognition.
IEEE Access
Jianrong Chen, Sujit Dey
2024 J jnl
Multi-Modal Data and Model Reduction for Enabling Edge Fusion in Connected Vehicle Environments.
IEEE Trans. Veh. Technol.
Samuel Thornton, Sujit Dey
2024 J jnl
Optimal Vehicle Charging in Bilevel Power-Traffic Networks via Charging Demand Function.
IEEE Trans. Smart Grid
Yufan Zhang, Sujit Dey, Yuanyuan Shi
2024 — conf
Personalized Impact of Lifestyle on Type 1 Diabetes Patients: A Comprehensive Regression Analysis.
ICHI
Sinan Xie, Jared Leitner, Sujit Dey
2024 J jnl
SLEXNet: Adaptive Inference Using Slimmable Early Exit Neural Networks.
ACM Trans. Embed. Comput. Syst.
Basar Kütükçü, Sabur Baidya, Sujit Dey
2024 J jnl
Utilizing Reinforcement Learning for Adaptive Sensor Data Sharing Over C-V2X Communications.
IEEE Trans. Veh. Technol.
Bryse Flowers, Yu-Jen Ku, Sabur Baidya, Sujit Dey
2023 J jnl
Analyzing Head Orientation of Neurotypical and Autistic Individuals in Triadic Conversations.
CoRR
Onur N. Tepencelik, Wenchuan Wei, Pamela C. Cosman, Sujit Dey
2023 J jnl
Classification of Patient Recovery From COVID-19 Symptoms Using Consumer Wearables and Machine Learning.
IEEE J. Biomed. Health Informatics
Jared Leitner, Alexander Behnke, Po-Han Chiang, Michele Ritter, Marlene Millen, Sujit Dey
2023 — conf
EvoSh: Evolutionary Search with Shaving to Enable Power-Latency Tradeoff in Deep Learning Computing on Embedded Systems.
SOCC
Basar Kütükçü, Sabur Baidya, Anand Raghunathan, Sujit Dey
2023 J jnl
GaMiCO: Game-slicing based multi-interface computation offloading in 5G vehicular networks.
J. Commun. Networks
Suhwan Jung, Hyoil Kim, Xinyu Zhang, Sujit Dey
2023 J jnl
Optimal Vehicle Charging in Bilevel Power-Traffic Networks via Charging Demand Function.
CoRR
Yufan Zhang, Sujit Dey, Yuanyuan Shi
2023 B conf
Short: Deep Learning Approach to Skeletal Performance Evaluation of Physical Therapy Exercises.
CHASE
Bhanu Garg, Alexander Postlmayr, Pamela C. Cosman, Sujit Dey
2023 J jnl
Uncertainty-Aware Task Offloading for Multi-Vehicle Perception Fusion Over Vehicular Edge Computing.
IEEE Trans. Veh. Technol.
Yu-Jen Ku, Sabur Baidya, Sujit Dey
2022 — conf
Adaptive C-V2X Sidelink Communications for Vehicular Applications Beyond Safety Messages.
VTC Spring
Yu-Jen Ku, Bryse Flowers, Samuel Thornton, Sabur Baidya, Sujit Dey
2022 — conf
An mHealth Lifestyle Intervention Service for Improving Blood Pressure using Machine Learning and IoMTs.
ICDH
Jared Leitner, Po-Han Chiang, Brian Khan, Sujit Dey
2022 J jnl
Contention Grading and Adaptive Model Selection for Machine Vision in Embedded Systems.
ACM Trans. Embed. Comput. Syst.
Basar Kütükçü, Sabur Baidya, Anand Raghunathan, Sujit Dey
2022 J jnl
Multi-Source Feature Fusion for Object Detection Association in Connected Vehicle Environments.
IEEE Access
Samuel Thornton, Bryse Flowers, Sujit Dey
2022 J jnl
Personalized Blood Pressure Estimation Using Photoplethysmography: A Transfer Learning Approach.
IEEE J. Biomed. Health Informatics
Jared Leitner, Po-Han Chiang, Sujit Dey
2021 J jnl
Adaptive Computation Partitioning and Offloading in Real-Time Sustainable Vehicular Edge Computing.
IEEE Trans. Veh. Technol.
Yu-Jen Ku, Sabur Baidya, Sujit Dey
2021 — conf
Body and Head Orientation Estimation with Privacy Preserving LiDAR Sensors.
EUSIPCO
Onur N. Tepencelik, Wenchuan Wei, Leanne Chukoskie, Pamela C. Cosman, Sujit Dey
2021 — conf
Contention-aware Adaptive Model Selection for Machine Vision in Embedded Systems.
AICAS
Basar Kütükçü, Sabur Baidya, Anand Raghunathan, Sujit Dey
2021 B conf
Low Overhead Codebook Design for mmWave Roadside Units Placed at Smart Intersections.
PIMRC
Bryse Flowers, Xinyu Zhang, Sujit Dey
2021 — conf
Multi-Modal Fusion Enhanced Model For Driver's Facial Expression Recognition.
ICME Workshops
Jianrong Chen, Sujit Dey, Lei Wang, Ning Bi, Peng Liu
2021 J jnl
Predictive Adaptive Streaming to Enable Mobile 360-Degree and VR Experiences.
IEEE Trans. Multim.
Xueshi Hou, Sujit Dey, Jianzhong Zhang, Madhukar Budagavi
2020 — conf
Machine Learning Techniques for Vehicle Matching with Non-Overlapping Visual Features.
CAVS
Samuel Thornton, Sujit Dey
2020 J jnl
Motion Prediction and Pre-Rendering at the Edge to Enable Ultra-Low Latency Mobile 6DoF Experiences.
IEEE Open J. Commun. Soc.
Xueshi Hou, Sujit Dey
2020 J jnl
Real-Time QoS Optimization for Vehicular Edge Computing With Off-Grid Roadside Units.
IEEE Trans. Veh. Technol.
Yu-Jen Ku, Po-Han Chiang, Sujit Dey
2020 J jnl
Using Sensors and Deep Learning to Enable On-Demand Balance Evaluation for Effective Physical Therapy.
IEEE Access
Wenchuan Wei, Carter McElroy, Sujit Dey
2020 A* conf
Vehicular and Edge Computing for Emerging Connected and Autonomous Vehicle Applications.
DAC
Sabur Baidya, Yu-Jen Ku, Hengyu Zhao, Jishen Zhao, Sujit Dey
2020 A* conf
X-Array: approximating omnidirectional millimeter-wave coverage using an array of phased arrays.
MobiCom
Song Wang, Jingqi Huang, Xinyu Zhang, Hyoil Kim, Sujit Dey
2019 — conf
Center of Mass Estimation for Balance Evaluation Using Convolutional Neural Networks.
ICHI
Wenchuan Wei, Sujit Dey
2019 B conf
Head and Body Motion Prediction to Enable Mobile VR Experiences with Low Latency.
GLOBECOM
Xueshi Hou, Jianzhong Zhang, Madhukar Budagavi, Sujit Dey
2019 J jnl
Offline and Online Learning Techniques for Personalized Blood Pressure Prediction and Health Behavior Recommendations.
IEEE Access
Po-Han Chiang, Sujit Dey
2019 C conf
Personalized Blood Pressure Estimation using Photoplethysmography and Wavelet Decomposition.
HealthCom
Jared Leitner, Po-Han Chiang, Sujit Dey
2019 — conf
Sustainable Vehicular Edge Computing Using Local and Solar-Powered Roadside Unit Resources.
VTC Fall
Yu-Jen Ku, Sujit Dey
2019 J jnl
User performance evaluation and real-time guidance in cloud-based physical therapy monitoring and guidance system.
Multim. Tools Appl.
Wenchuan Wei, Yao Lu, Eric Rhoden, Sujit Dey
2018 — conf
Human Action Understanding and Movement Error Identification for the Treatment of Patients with Parkinson's Disease.
ICHI
Wenchuan Wei, Carter McElroy, Sujit Dey
2018 J jnl
Novel Hybrid-Cast Approach to Reduce Bandwidth and Latency for Cloud-Based Virtual Space.
ACM Trans. Multim. Comput. Commun. Appl.
Xueshi Hou, Yao Lu, Sujit Dey
2018 J jnl
Optimal Use of Harvested Solar, Hybrid Storage and Base Station Resources for Green Cellular Networks.
IEEE Trans. Green Commun. Netw.
Po-Han Chiang, Ranjini Guruprasad, Sujit Dey
2018 C conf
Personalized Effect of Health Behavior on Blood Pressure: Machine Learning Based Prediction and Recommendation.
HealthCom
Po-Han Chiang, Sujit Dey
2018 — conf
Predictive View Generation to Enable Mobile 360-degree and VR Experiences.
VR/AR Network@SIGCOMM
Xueshi Hou, Sujit Dey, Jianzhong Zhang, Madhukar Budagavi
2018 B conf
Quality of Service Optimization for Vehicular Edge Computing with Solar-Powered Road Side Units.
ICCCN
Yu-Jen Ku, Po-Han Chiang, Sujit Dey
2017 J jnl
Asymmetric and selective object rendering for optimized Cloud Mobile 3D Display Gaming user experience.
Multim. Tools Appl.
Yao Lu, Yao Liu, Sujit Dey
2017 — conf
Energy Efficient Hybrid Beamforming in Massive MU-MIMO Systems via Eigenmode Selection.
iThings/GreenCom/CPSCom/SmartData
Weiheng Ni, Po-Han Chiang, Sujit Dey
2017 J jnl
User QoS-Aware Adaptive RF Chain Switching for Power Efficient Cooperative Base Stations.
IEEE Trans. Green Commun. Netw.
Ranjini Guruprasad, Sujit Dey
2017 B conf
Wireless VR/AR with Edge/Cloud Computing.
ICCCN
Xueshi Hou, Yao Lu, Sujit Dey
2016 C conf
A Novel Hyper-Cast Approach to Enable Cloud-Based Virtual Classroom Applications.
ISM
Xueshi Hou, Yao Lu, Sujit Dey
2016 J jnl
Dynamic cell reconfiguration framework for energy conservation in cellular wireless networks.
J. Commun. Networks
Kyuho Son, Ranjini Guruprasad, Santosh V. Nagaraj, Mahasweta Sarkar, Sujit Dey
2016 J jnl
Emulation-Based Analysis of System-on-Chip Performance Under Variations.
IEEE Trans. Very Large Scale Integr. Syst.
Vivek Joy Kozhikkottu, Rangharajan Venkatesan, Anand Raghunathan, Sujit Dey
2016 J jnl
Enhancing Mobile Video Capacity and Quality Using Rate Adaptation, RAN Caching and Processing.
IEEE/ACM Trans. Netw.
Hasti A. Pedersen, Sujit Dey
2016 J jnl
Improving Scalability of Personalized Recommendation Systems for Enterprise Knowledge Workers.
IEEE Access
Chetan Kumar Verma, Michael Hart, Sandeep Bhatkar, Aleatha Parker-Wood, Sujit Dey
2016 J jnl
JAVRE: A Joint Asymmetric Video Rendering and Encoding Approach to Enable Optimized Cloud Mobile 3D Virtual Immersive User Experience.
IEEE J. Emerg. Sel. Topics Circuits Syst.
Yao Lu, Sujit Dey
2015 C conf
A Joint Asymmetric Graphics Rendering and Video Encoding Approach for Optimizing Cloud Mobile 3D Display Gaming User Experience.
ISM
Yao Liu, Sujit Dey
2015 — conf
Access Prediction for Knowledge Workers in Enterprise Data Repositories.
ICEIS (1)
Chetan Kumar Verma, Michael Hart, Sandeep Bhatkar, Aleatha Parker-Wood, Sujit Dey
2015 J jnl
An Application Adaptation Approach to Mitigate the Impact of Dynamic Thermal Management on Video Encoding.
ACM Trans. Design Autom. Electr. Syst.
Ali Mirtar, Sujit Dey, Anand Raghunathan
2015 J jnl
Battery Aware Video Delivery Techniques Using Rate Adaptation and Base Station Reconfiguration.
IEEE Trans. Multim.
Ranjini Guruprasad, Sujit Dey
2015 J jnl
Cloud Mobile 3D Display Gaming User Experience Modeling and Optimization by Asymmetric Graphics Rendering.
IEEE J. Sel. Top. Signal Process.
Yao Lu, Yao Liu, Sujit Dey
2015 J jnl
Construction and evaluation of ontological tag trees.
Expert Syst. Appl.
Chetan Kumar Verma, Vijay Mahadevan, Nikhil Rasiwasia, Gaurav Aggarwal, Ravi Kant, Alejandro Jaimes, Sujit Dey
2015 J jnl
Deriving and Validating User Experience Model for DASH Video Streaming.
IEEE Trans. Broadcast.
Yao Liu, Sujit Dey, Fatih Ulupinar, Michael Luby, Yinian Mao
2015 J jnl
Enhancing Video Encoding for Cloud Gaming Using Rendering Information.
IEEE Trans. Circuits Syst. Video Technol.
Yao Liu, Sujit Dey, Yao Lu
2015 J jnl
Joint Work and Voltage/Frequency Scaling for Quality-Optimized Dynamic Thermal Management.
IEEE Trans. Very Large Scale Integr. Syst.
Ali Mirtar, Sujit Dey, Anand Raghunathan
2015 J jnl
Methods to Obtain Training Videos for Fully Automated Application-Specific Classification.
IEEE Access
Chetan Kumar Verma, Sujit Dey
2015 — conf
Motion data alignment and real-time guidance in cloud-based virtual training system.
Wireless Health
Wenchuan Wei, Yao Lu, Catherine D. Printz, Sujit Dey
2015 C conf
Motion data alignment for real-time guidance in avatar based physical therapy training system.
HealthCom
Dennis Shen, Yao Lu, Sujit Dey
2015 — conf
Optimizing Cloud Mobile 3D Display Gaming user experience by asymmetric object of interest rendering.
ICC
Yao Lu, Yao Liu, Sujit Dey
2015 — conf
Power-efficient base station operation through user QoS-aware adaptive RF chain switching technique.
ICC
Ranjini Guruprasad, Kyuho Son, Sujit Dey
2015 B conf
Renewable energy-aware video download in cellular networks.
PIMRC
Po-Han Chiang, Ranjini Guruprasad, Sujit Dey
2014 — conf
Construction of tag ontological graphs by locally minimizing weighted average hops.
WWW (Companion Volume)
Chetan Kumar Verma, Vijay Mahadevan, Nikhil Rasiwasia, Gaurav Aggarwal, Ravi Kant, Alejandro Jaimes, Sujit Dey
2014 J jnl
Content-Aware Modeling and Enhancing User Experience in Cloud Mobile Rendering and Streaming.
IEEE J. Emerg. Sel. Topics Circuits Syst.
Yao Liu, Shaoxuan Wang, Sujit Dey
2014 Misc conf
Enhancing Cloud Mobile 3D display gaming user experience by asymmetric graphics rendering.
ICNC
Yao Lu, Yao Liu, Sujit Dey
2014 A conf
Mobile device video caching to improve video qoe and cellular network capacity.
MSWiM
Hasti A. Pedersen, Sujit Dey
2014 A* conf
Variation Aware Cache Partitioning for Multithreaded Programs.
DAC
Vivek Joy Kozhikkottu, Abhisek Pan, Vijay S. Pai, Sujit Dey, Anand Raghunathan
2014 A conf
Variation tolerant design of a vector processor for recognition, mining and synthesis.
ISLPED
Vivek Joy Kozhikkottu, Swagath Venkataramani, Sujit Dey, Anand Raghunathan
2014 J jnl
Video-Aware Scheduling and Caching in the Radio Access Network.
IEEE/ACM Trans. Netw.
Hasti Ahlehagh, Sujit Dey
2013 B conf
Adaptive Bit Rate capable video caching and scheduling.
WCNC
Hasti Ahlehagh, Sujit Dey
2013 J jnl
Adaptive Mobile Cloud Computing to Enable Rich Mobile Multimedia Applications.
IEEE Trans. Multim.
Shaoxuan Wang, Sujit Dey
2013 — conf
Fully Automated Learning for Application-Specific Web Video Classification.
Web Intelligence
Chetan Kumar Verma, Sujit Dey
2013 B conf
QoS-aware dynamic cell reconfiguration for energy conservation in cellular networks.
WCNC
Kyuho Son, Santosh V. Nagaraj, Mahasweta Sarkar, Sujit Dey
2013 B conf
Rate adaptation and base station reconfiguration for battery efficient video download.
WCNC
Ranjini Guruprasad, Sujit Dey
2013 — conf
User Experience Modeling for DASH Video.
PV
Yao Liu, Sujit Dey, Don Gillies, Fatih Ulupinar, Michael Luby
2012 — conf
Adaptation of video encoding to address dynamic thermal management effects.
IGCC
Ali Mirtar, Sujit Dey, Anand Raghunathan
2012 Misc conf
Cloud Mobile Media: Opportunities, challenges, and directions.
ICNC
Sujit Dey
2012 J jnl
Cloud mobile gaming: modeling and measuring user experience in mobile wireless networks.
ACM SIGMOBILE Mob. Comput. Commun. Rev.
Shaoxuan Wang, Sujit Dey
2012 — conf
Hierarchical video caching in wireless cloud: Approaches and algorithms.
ICC
Hasti Ahlehagh, Sujit Dey
2012 Misc conf
Modeling, characterizing, and enhancing user experience in Cloud Mobile Rendering.
ICNC
Yao Liu, Shaoxuan Wang, Sujit Dey
2012 A* conf
Recovery-based design for variation-tolerant SoCs.
DAC
Vivek Joy Kozhikkottu, Sujit Dey, Anand Raghunathan
2012 J jnl
Variation-Aware Voltage Level Selection.
IEEE Trans. Very Large Scale Integr. Syst.
Saumya Chandra, Anand Raghunathan, Sujit Dey
2012 B conf
Video caching in Radio Access Network: Impact on delay and capacity.
WCNC
Hasti Ahlehagh, Sujit Dey
2012 — conf
Wireless network aware cloud scheduler for scalable cloud mobile gaming.
ICC
Shaoxuan Wang, Yao Liu, Sujit Dey
2011 A conf
VESPA: Variability emulation for System-on-Chip performance analysis.
DATE
Vivek Joy Kozhikkottu, Rangharajan Venkatesan, Anand Raghunathan, Sujit Dey
2010 B conf
Addressing Response Time and Video Quality in Remote Server Based Internet Mobile Gaming.
WCNC
Shaoxuan Wang, Sujit Dey
2010 B conf
Rendering Adaptation to Address Communication and Computation Constraints in Cloud Mobile Gaming.
GLOBECOM
Shaoxuan Wang, Sujit Dey
2010 J jnl
Variation-Aware System-Level Power Analysis.
IEEE Trans. Very Large Scale Integr. Syst.
Saumya Chandra, Kanishka Lahiri, Anand Raghunathan, Sujit Dey
2009 Misc conf
Coping with Variations through System-Level Design.
VLSI Design
Nilanjan Banerjee, Saumya Chandra, Swaroop Ghosh, Sujit Dey, Anand Raghunathan, Kaushik Roy
2009 J jnl
Enabling rich mobile applications: joint computation and communication scheduling.
ACM SIGMOBILE Mob. Comput. Commun. Rev.
Shoubhik Mukhopadhyay, Curt Schurgers, Sujit Dey
2009 J jnl
Model-Based Techniques for Data Reliability in Wireless Sensor Networks.
IEEE Trans. Mob. Comput.
Shoubhik Mukhopadhyay, Curt Schurgers, Debashis Panigrahi, Sujit Dey
2009 B conf
Modeling and Characterizing User Experience in a Cloud Server Based Mobile Gaming Approach.
GLOBECOM
Shaoxuan Wang, Sujit Dey
2009 J jnl
Variation-Tolerant Dynamic Power Management at the System-Level.
IEEE Trans. Very Large Scale Integr. Syst.
Saumya Chandra, Kanishka Lahiri, Anand Raghunathan, Sujit Dey
2008 J jnl
Dynamically Configurable Bus Topologies for High-Performance On-Chip Communication.
IEEE Trans. Very Large Scale Integr. Syst.
Krishna Sekar, Kanishka Lahiri, Anand Raghunathan, Sujit Dey
2008 J jnl
Intelligent Robustness Insertion for Optimal Transient Error Tolerance Improvement in VLSI Circuits.
IEEE Trans. Very Large Scale Integr. Syst.
Chong Zhao, Yi Zhao, Sujit Dey
2007 B conf
A Device and Network-Aware Scaling Framework for Efficient Delivery of Scalable Video over Wireless Networks.
PIMRC
Naomi Ramos, Sujit Dey
2007 J jnl
Dynamic adaptation policies to improve quality of service of real-time multimedia applications in IEEE 802.11e WLAN Networks.
Wirel. Networks
Naomi Ramos, Debashis Panigrahi, Sujit Dey
2007 J jnl
Evaluating Transient Error Effects in Digital Nanometer Circuits.
IEEE Trans. Reliab.
Chong Zhao, Xiaoliang Bai, Sujit Dey
2007 B conf
Joint Computation and Communication Scheduling to Enable Rich Mobile Applications.
GLOBECOM
Shoubhik Mukhopadhyay, Curt Schurgers, Sujit Dey
2007 C conf
Modeling soft error effects considering process variations.
ICCD
Chong Zhao, Sujit Dey
2007 A* conf
System-on-Chip Power Management Considering Leakage Power Variations.
DAC
Saumya Chandra, Kanishka Lahiri, Anand Raghunathan, Sujit Dey
2006 A conf
Considering process variations during system-level power analysis.
ISLPED
Saumya Chandra, Kanishka Lahiri, Anand Raghunathan, Sujit Dey
2006 A conf
Evaluating and Improving Transient Error Tolerance of CMOS Digital VLSI Circuits.
ITC
Chong Zhao, Sujit Dey
2006 — conf
Improving Transient Error Tolerance of Digital VLSI Circuits Using RObustness COmpiler (ROCO).
ISQED
Chong Zhao, Sujit Dey
2006 A conf
Integrated data relocation and bus reconfiguration for adaptive system-on-chip platforms.
DATE
Krishna Sekar, Kanishka Lahiri, Anand Raghunathan, Sujit Dey
2005 A conf
A static noise impact analysis methodology for evaluating transient error effects in digital VLSI circuits.
ITC
Chong Zhao, Xiaoliang Bai, Sujit Dey
2005 — conf
Addressing Computational and Networking Constraints to Enable Video Streaming from Wireless Appliances.
ESTIMedia
Saumya Chandra, Sujit Dey
2005 A* conf
Constraint-aware robustness insertion for optimal noise-tolerance enhancement in VLSI circuits.
DAC
Chong Zhao, Yi Zhao, Sujit Dey
2005 B conf
Dynamic end-to-end image adaptation for guaranteed quality of service in wireless image data services.
WCNC
Dong-Gi Lee, Sujit Dey
2005 A* conf
FLEXBUS: a high-performance system-on-chip communication architecture with a dynamically configurable topology.
DAC
Krishna Sekar, Kanishka Lahiri, Anand Raghunathan, Sujit Dey
2005 J jnl
Quality of service provisioning in 802.11e networks: challenges, approaches, and future directions.
IEEE Netw.
Naomi Ramos, Debashis Panigrahi, Sujit Dey
2005 J jnl
Soft-Spot Analysis: Targeting Compound Noise Effects in Nanometer Circuits.
IEEE Des. Test Comput.
Chong Zhao, Sujit Dey, Xiaoliang Bai
2004 A* conf
A scalable soft spot analysis methodology for compound noise effects in nano-meter circuits.
DAC
Chong Zhao, Xiaoliang Bai, Sujit Dey
2004 B conf
CHASER: content and channel aware object scheduling and error control for wireless Web access in 3G networks.
PIMRC
Debashis Panigrahi, Sujit Dey
2004 J jnl
Common-case computation: a high-level energy and performance optimization technique.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Ganesh Lakshminarayana, Anand Raghunathan, Kamal S. Khouri, Niraj K. Jha, Sujit Dey
2004 Misc conf
Configurable Platforms With Dynamic Platform Management: An Efficient Alternative to Application-Specific System-on-Chips.
VLSI Design
Krishna Sekar, Kanishka Lahiri, Sujit Dey
2004 B conf
Data aware, low cost error correction for wireless sensor networks.
WCNC
Shoubhik Mukhopadhyay, Debashis Panigrahi, Sujit Dey
2004 J jnl
Design of high-performance system-on-chips using communication architecture tuners.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Kanishka Lahiri, Anand Raghunathan, Ganesh Lakshminarayana, Sujit Dey
2004 J jnl
Design space exploration for optimizing on-chip communication architectures.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Kanishka Lahiri, Anand Raghunathan, Sujit Dey
2004 J jnl
Double sampling data checking technique: an online testing solution for multisource noise-induced errors on on-chip interconnects and buses.
IEEE Trans. Very Large Scale Integr. Syst.
Yi Zhao, Sujit Dey, Li Chen
2004 B conf
Dynamic image adaptation technique and architecture to enhance server performance in wireless image services.
PIMRC
Dong-Gi Lee, Sujit Dey
2004 J jnl
Efficient power profiling for battery-driven embedded system design.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Kanishka Lahiri, Anand Raghunathan, Sujit Dey
2004 J jnl
High-level crosstalk defect Simulation methodology for system-on-chip interconnects.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Xiaoliang Bai, Sujit Dey
2004 J jnl
Interconnect coupling-aware driver modeling in static noise analysis for nanometer circuits.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Xiaoliang Bai, Rajit Chandra, Sujit Dey, P. V. Srinivas
2004 B conf
Model based error correction for wireless sensor networks.
SECON
Shoubhik Mukhopadhyay, Debashis Panigrahi, Sujit Dey
2004 J jnl
Optimizing designs using the addition of deflection operations.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Jennifer L. Wong, Miodrag Potkonjak, Sujit Dey
2004 J jnl
Resource budgeting for Multiprocess High-level synthesis.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Weidong Wang, Anand Raghunathan, Niraj K. Jha, Sujit Dey
2004 — conf
Run-time allocation of buffer resources for maximizing video clip quality in a wireless last-hop system.
ICC
Clark N. Taylor, Sujit Dey
2004 B conf
VSHAPER: an efficient method of serving video streams shaped for diverse wireless communication conditions.
GLOBECOM
Clark N. Taylor, Sujit Dey
2003 A* conf
A scalable software-based self-test methodology for programmable processors.
DAC
Li Chen, Srivaths Ravi, Anand Raghunathan, Sujit Dey
2003 — conf
Addressing Server Latency and Capacity to Enable Fast and Affordable Wireless Image Data Services.
ESTIMedia
Dong-Gi Lee, Sujit Dey
2003 A conf
Dynamic Platform Management for Configurable Platform-Based System-on-Chips.
ICCAD
Krishna Sekar, Kanishka Lahiri, Sujit Dey
2003 J jnl
Fault-coverage analysis techniques of crosstalk in chip interconnects.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Yi Zhao, Sujit Dey
2003 Misc conf
High-level Synthesis of Multi-process Behavioral Descriptions.
VLSI Design
Weidong Wang, Niraj K. Jha, Anand Raghunathan, Sujit Dey
2003 J jnl
High-level macro-modeling and estimation techniques for switching activity and power consumption.
IEEE Trans. Very Large Scale Integr. Syst.
Anand Raghunathan, Sujit Dey, Niraj K. Jha
2003 A conf
HyAC: A Hybrid Structural SAT Based ATPG for Crosstalk.
ITC
Xiaoliang Bai, Sujit Dey, Angela Krstic
2003 J jnl
LI-BIST: A Low-Cost Self-Test Scheme for SoC Logic Cores and Interconnects.
J. Electron. Test.
Krishna Sekar, Sujit Dey
2003 — conf
Noise-Aware Driver Modeling for Nanometer Technology.
ISQED
Xiaoliang Bai, Rajit Chandra, Sujit Dey, P. V. Srinivas
2003 C conf
Separate Dual-Transistor Registers - A Circuit Solution for On-line Testing of Transient Error in UDSM-IC.
IOLTS
Yi Zhao, Sujit Dey
2003 — conf
Software-based self-test methodology for crosstalk faults in processors.
HLDVT
Xiaoliang Bai, Li Chen, Sujit Dey
2002 — conf
A Hardware/Software Reconfigurable Architecture for Adaptive Wireless Image Communication.
ASP-DAC/VLSI Design
Debashis Panigrahi, Clark N. Taylor, Sujit Dey
2002 — conf
Adaptive and energy efficient wavelet image compression for mobile multimedia data services.
ICC
Dong-Gi Lee, Sujit Dey
2002 J jnl
An Interconnect Architecture for Networking Systems on Chips.
IEEE Micro
Faraydon Karim, Anh Nguyen, Sujit Dey
2002 — conf
Battery-efficient architecture for an 802.11 MAC processor.
ICC
Kanishka Lahiri, Anand Raghunathan, Sujit Dey
2002 A* conf
Communication architecture based power management for battery efficient system design.
DAC
Kanishka Lahiri, Sujit Dey, Anand Raghunathan
2002 J jnl
Communication-Based Power Management.
IEEE Des. Test Comput.
Kanishka Lahiri, Sujit Dey, Anand Raghunathan
2002 J jnl
Cosimulation-based power estimation for system-on-chip design.
IEEE Trans. Very Large Scale Integr. Syst.
Marcello Lajolo, Anand Raghunathan, Sujit Dey, Luciano Lavagno
2002 — conf
Design of an Adaptive Architecture for Energy Efficient Wireless Image Communication.
Embedded Processor Design Challenges
Clark N. Taylor, Debashis Panigrahi, Sujit Dey
2002 J jnl
Embedded Software-Based Self-Test for Programmable Core-Based Designs.
IEEE Des. Test Comput.
Angela Krstic, Wei-Cheng Lai, Kwang-Ting Cheng, Li Chen, Sujit Dey
2002 — conf
Embedded Tutorial: Battery-Driven System Design: A New Frontier in Low Power Design.
ASP-DAC/VLSI Design
Kanishka Lahiri, Anand Raghunathan, Sujit Dey, Debashis Panigrahi
2002 A* conf
Embedded software-based self-testing for SoC design.
DAC
Angela Krstic, Wei-Cheng Lai, Kwang-Ting Cheng, Li Chen, Sujit Dey
2002 — conf
Fast system-level power profiling for battery-efficient system design.
CODES
Kanishka Lahiri, Anand Raghunathan, Sujit Dey
2002 Misc conf
LI-BIST: A Low-Cost Self-Test Scheme for SoC Logic Cores and Interconnects.
VTS
Krishna Sekar, Sujit Dey
2002 A conf
On-Line Testing of Multi-Source Noise-Induced Errors on the Interconnects and Buses of System-on-Chips.
ITC
Yi Zhao, Li Chen, Sujit Dey
2002 A* conf
Software-based diagnosis for processors.
DAC
Li Chen, Sujit Dey
2002 — conf
Specification, Modeling and Design Tools for System-on-Chip (Tutorial Abstract).
ASP-DAC/VLSI Design
Luciano Lavagno, Sujit Dey, Rajesh K. Gupta
2002 J jnl
Testing for Interconnect Crosstalk Defects Using On-Chip Embedded Processor Cores.
J. Electron. Test.
Li Chen, Xiaoliang Bai, Sujit Dey
2002 Misc conf
Validation and Test of Network Processors and ASICs.
VTS
C.-H. Chia, Sujit Dey, Faraydon Karim, Haluk Konuk, Keesup Kim
2001 — conf
Adaptive image compression for wireless multimedia communication.
ICC
Clark N. Taylor, Sujit Dey
2001 Misc conf
Battery Life Estimation of Mobile Embedded Systems.
VLSI Design
Debashis Panigrahi, Sujit Dey, Ramesh R. Rao, Kanishka Lahiri, Carla-Fabiana Chiasserini, Anand Raghunathan
2001 Misc conf
Evaluation of the Traffic-Performance Characteristics of System-on-Chip Communication Architectures.
VLSI Design
Kanishka Lahiri, Sujit Dey, Anand Raghunathan
2001 Misc conf
High-level Crosstalk Defect Simulation for System-on-Chip Interconnects.
VTS
Xiaoliang Bai, Sujit Dey
2001 Misc conf
Low-Power Mobile Wireless Communication System Design: Protocols, Architectures, and Design Methodologies.
VLSI Design
Anand Raghunathan, Sujit Dey
2001 A* conf
Modeling and Minimization of Interconnect Energy Dissipation in Nanometer Technologies.
DAC
Clark N. Taylor, Sujit Dey, Yi Zhao
2001 A* conf
On-Chip Communication Architecture for OC-768 Network Processors.
DAC
Faraydon Karim, Anh Nguyen, Sujit Dey, Ramesh R. Rao
2001 J jnl
Software-based self-testing methodology for processor cores.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Li Chen, Sujit Dey
2001 J jnl
System-level performance analysis for designing on-chipcommunication architectures.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Kanishka Lahiri, Anand Raghunathan, Sujit Dey
2001 A* conf
Testing for Interconnect Crosstalk Defects Using On-Chip Embedded Processor Cores.
DAC
Li Chen, Xiaoliang Bai, Sujit Dey
2000 J jnl
A fast and low-cost testing technique for core-based system-chips.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Indradeep Ghosh, Sujit Dey, Niraj K. Jha
2000 A conf
Analysis of interconnect crosstalk defect coverage of test sets.
ITC
Yi Zhao, Sujit Dey
2000 A* conf
Communication architecture tuners: a methodology for the design of high-performance communication architectures for systems-on-chips.
DAC
Kanishka Lahiri, Anand Raghunathan, Ganesh Lakshminarayana, Sujit Dey
2000 Misc conf
DEFUSE: A Deterministic Functional Self-Test Methodology for Processors.
VTS
Li Chen, Sujit Dey
2000 A conf
Efficient Exploration of the SoC Communication Architecture Design Space.
ICCAD
Kanishka Lahiri, Anand Raghunathan, Sujit Dey
2000 A conf
Efficient Power Co-Estimation Techniques for System-on-Chip Design.
DATE
Marcello Lajolo, Anand Raghunathan, Sujit Dey, Luciano Lavagno
2000 A* conf
Embedded hardware and software self-testing methodologies for processor cores.
DAC
Li Chen, Sujit Dey, Pablo Sanchez, Krishna Sekar, Ying Cheng
2000 — conf
Interface based hardware/software validation of a system-on-chip.
HLDVT
Debashis Panigrahi, Clark N. Taylor, Sujit Dey
2000 Misc conf
Performance Analysis of Systems with Multi-Channel Communication Architectures.
VLSI Design
Kanishka Lahiri, Sujit Dey, Anand Raghunathan
2000 A* conf
Self-test methodology for at-speed test of crosstalk in chip interconnects.
DAC
Xiaoliang Bai, Sujit Dey, Janusz Rajski
2000 A* conf
Test challenges for deep sub-micron technologies.
DAC
Kwang-Ting Cheng, Sujit Dey, Mike Rodgers, Kaushik Roy
2000 A conf
Test of Future System-on-Chips.
ICCAD
Yervant Zorian, Sujit Dey, Mike Rodgers
2000 J jnl
Using a Soft Core in a SoC Design: Experiences with picoJava.
IEEE Des. Test Comput.
Sujit Dey, Debashis Panigrahi, Li Chen, Clark N. Taylor, Krishna Sekar, Pablo Sanchez
1999 J jnl
A low overhead design for testability and test generation technique for core-based systems-on-a-chip.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Indradeep Ghosh, Niraj K. Jha, Sujit Dey
1999 A* conf
Common-Case Computation: A High-Level Technique for Power and Performance Optimization.
DAC
Ganesh Lakshminarayana, Anand Raghunathan, Kamal S. Khouri, Niraj K. Jha, Sujit Dey
1999 J jnl
Controller-based power management for control-flow intensive designs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Sujit Dey, Anand Raghunathan, Niraj K. Jha, Kazutoshi Wakabayashi
1999 A conf
Fast performance analysis of bus-based system-on-chip communication architectures.
ICCAD
Kanishka Lahiri, Anand Raghunathan, Sujit Dey
1999 A conf
Fault modeling and simulation for crosstalk in system-on-chip interconnects.
ICCAD
Michael Cuviello, Sujit Dey, Xiaoliang Bai, Yi Zhao
1999 Misc conf
Low Power Design Methodologies for Systems-on-Chips.
VLSI Design
Kaushik Roy, Anand Raghunathan, Sujit Dey
1999 J jnl
Power management in high-level synthesis.
IEEE Trans. Very Large Scale Integr. Syst.
Ganesh Lakshminarayana, Anand Raghunathan, Niraj K. Jha, Sujit Dey
1999 J jnl
Register transfer level power optimization with emphasis on glitch analysis and reduction.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Anand Raghunathan, Sujit Dey, Niraj K. Jha
1999 J jnl
Resynthesis and retiming for optimum partial scan.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Srimat T. Chakradhar, Sujit Dey
1999 J jnl
Testing Embedded-Core-Based System Chips.
Computer
Yervant Zorian, Erik Jan Marinissen, Sujit Dey
1998 A* conf
A Fast and Low Cost Testing Technique for Core-Based System-on-Chip.
DAC
Indradeep Ghosh, Sujit Dey, Niraj K. Jha
1998 Misc conf
A Power Management Methodology for High-Level Synthesis.
VLSI Design
Ganesh Lakshminarayana, Anand Raghunathan, Niraj K. Jha, Sujit Dey
1998 — conf
A case study on modeling shared memory access effects during performance analysis of HW/SW systems.
CODES
Marcello Lajolo, Anand Raghunathan, Sujit Dey, Luciano Lavagno, Alberto L. Sangiovanni-Vincentelli
1998 J jnl
A controller redesign technique to enhance testability of controller-data path circuits.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Sujit Dey, Vijay Gangaram, Miodrag Potkonjak
1998 — conf
Considering Testability during High-level Design (Embedded Tutorial).
ASP-DAC
Sujit Dey, Anand Raghunathan, Rabindra K. Roy
1998 J jnl
Controller Resynthesis for Testability Enhancement of RTL Controller/Data Path Circuits.
J. Electron. Test.
Srivaths Ravi, Indradeep Ghosh, Rabindra K. Roy, Sujit Dey
1998 Misc conf
Controller Resynthesis for Testability Enhancement of RTL Controller/Data path Circuits.
VLSI Design
Srivaths Ravi, Indradeep Ghosh, Rabindra K. Roy, Sujit Dey
1998 J jnl
Design for Testability Techniques at the Behavioral and Register-Transfer Levels.
J. Electron. Test.
Sujit Dey, Anand Raghunathan, Kenneth D. Wagner
1998 J jnl
Effects of resource sharing on circuit delay: an assignment algorithm for clock period optimization.
ACM Trans. Design Autom. Electr. Syst.
Subhrajit Bhattacharya, Sujit Dey, Franc Brglez
1998 — book
High-Level Power Analysis and Optimization.
Anand Raghunathan, Niraj K. Jha, Sujit Dey
1998 A conf
High-level design validation and test.
ICCAD
Sujit Dey, Jacob A. Abraham, Yervant Zorian
1998 A conf
Testing embedded-core based system chips.
ITC
Yervant Zorian, Erik Jan Marinissen, Sujit Dey
1998 A conf
Transforming control-flow intensive designs to facilitate power management.
ICCAD
Ganesh Lakshminarayana, Anand Raghunathan, Niraj K. Jha, Sujit Dey
1997 A conf
A Low-Overhead Design for Testability and Test Generation Technique for Core-Based Systems.
ITC
Indradeep Ghosh, Niraj K. Jha, Sujit Dey
1997 — conf
An RTL methodology to enable low overhead combinational testing.
ED&TC
Subhrajit Bhattacharya, Sujit Dey, Bhaskar Sengupta
1997 A conf
H-SCAN+: A Practical Low-Overhead RTL Design-for-Testability Technique for Industrial Designs.
ITC
Toshiharu Asaka, Masaaki Yoshida, Subhrajit Bhattacharya, Sujit Dey
1997 J jnl
Nonscan design-for-testability techniques using RT-level design information.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Sujit Dey, Miodrag Potkonjak
1997 A conf
Performance analysis of a system of communicating processes.
ICCAD
Sujit Dey, Surendra Bommu
1997 A* conf
Power Management Techniques for Control-Flow Intensive Designs.
DAC
Anand Raghunathan, Sujit Dey, Niraj K. Jha, Kazutoshi Wakabayashi
1996 A conf
Controller re-specification to minimize switching activity in controller/data path circuits.
ISLPED
Anand Raghunathan, Sujit Dey, Niraj K. Jha, Kazutoshi Wakabayashi
1996 J jnl
Fast true delay estimation during high level synthesis.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Subhrajit Bhattacharya, Sujit Dey, Franc Brglez
1996 A* conf
Glitch Analysis and Reduction in Register Transfer Level.
DAC
Anand Raghunathan, Sujit Dey, Niraj K. Jha
1996 Misc conf
H-SCAN: A high level alternative to full-scan testing with reduced area and test application overheads.
VTS
Subhrajit Bhattacharya, Sujit Dey
1996 A* conf
High-Level Synthesis for Testability: A Survey and Perspective.
DAC
Kenneth D. Wagner, Sujit Dey
1996 A conf
Register-transfer level estimation techniques for switching activity and power consumption.
ICCAD
Anand Raghunathan, Sujit Dey, Niraj K. Jha
1995 A conf
A controller-based design-for-testability technique for controller-data path circuits.
ICCAD
Sujit Dey, Vijay Gangaram, Miodrag Potkonjak
1995 J jnl
Behavioral synthesis of area-efficient testable designs using interaction between hardware sharing and partial scan.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Miodrag Potkonjak, Sujit Dey, Rabindra K. Roy
1995 J jnl
Considering testability at behavioral level: use of transformations for partial scan cost minimization under timing and area constraints.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Miodrag Potkonjak, Sujit Dey, Rabindra K. Roy
1995 J jnl
Design of testable sequential circuits by repositioning flip-flops.
J. Electron. Test.
Sujit Dey, Srimat T. Chakradhar
1995 A conf
Design-for-debugging of application specific designs.
ICCAD
Miodrag Potkonjak, Sujit Dey, Kazutoshi Wakabayashi
1995 J jnl
Exploiting multicycle false paths in the performance optimization of sequential logic circuits.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Pranav Ashar, Sujit Dey, Sharad Malik
1995 — conf
Synthesis-for-testability using transformations.
ASP-DAC
Miodrag Potkonjak, Sujit Dey, Rabindra K. Roy
1994 — conf
Behavioral synthesis of low-cost partial scan designs for DSP applications.
ICASSP (2)
Sujit Dey, Miodrag Potkonjak, Rabindra K. Roy
1994 A* conf
Clock Period Optimization During Resource Sharing and Assignment.
DAC
Subhrajit Bhattacharya, Sujit Dey, Franc Brglez
1994 A conf
Non-scan design-for-testability of RT-level data paths.
ICCAD
Sujit Dey, Miodrag Potkonjak
1994 A* conf
Optimizing Resource Utilization and Testability Using Hot Potato Techniques.
DAC
Miodrag Potkonjak, Sujit Dey
1994 A* conf
Performance Analysis and Optimization of Schedules for Conditional and Loop-Intensive Specifications.
DAC
Subhrajit Bhattacharya, Sujit Dey, Franc Brglez
1994 A conf
Provably correct high-level timing analysis without path sensitization.
ICCAD
Subhrajit Bhattacharya, Sujit Dey, Franc Brglez
1994 A* conf
Resynthesis and Retiming for Optimum Partial Scan.
DAC
Srimat T. Chakradhar, Sujit Dey
1994 Misc conf
Retiming sequential circuits to enhance testability.
VTS
Sujit Dey, Srimat T. Chakradhar
1994 Misc conf
Synthesizing designs with low-cardinality minimum feedback vertex set for partial scan application.
VTS
Sujit Dey, Miodrag Potkonjak, Rabindra K. Roy
1994 A conf
Transforming Behavioral Specifications to Facilitate Synthesis of Testable Designs.
ITC
Sujit Dey, Miodrag Potkonjak
1993 A* conf
Critical Path Minimization Using Retiming and Algebraic Speed-Up.
DAC
Zia Iqbal, Miodrag Potkonjak, Sujit Dey, Alice C. Parker
1993 A conf
Exploiting hardware sharing in high-level synthesis for partial scan optimization.
ICCAD
Sujit Dey, Miodrag Potkonjak, Rabindra K. Roy
1993 C conf
High Performance Embedded System Optimization Using Algebraic and Generalized Retiming Techniques.
ICCD
Miodrag Potkonjak, Sujit Dey, Zia Iqbal, Alice C. Parker
1993 A* conf
Sequential Circuit Delay optimization Using Global Path Delays.
DAC
Srimat T. Chakradhar, Sujit Dey, Miodrag Potkonjak, Steven G. Rothweiler
1993 J jnl
Transformations and resynthesis for testability of RT-level control-data path specifications.
IEEE Trans. Very Large Scale Integr. Syst.
Subhrajit Bhattacharya, Franc Brglez, Sujit Dey
1992 A conf
Exploiting multi-cycle false paths in the performance optimization of sequential circuits.
ICCAD
Pranav Ashar, Sujit Dey, Sharad Malik
1992 A conf
Performance optimization of sequential circuits by eliminating retiming bottlenecks.
ICCAD
Sujit Dey, Miodrag Potkonjak, Steven G. Rothweiler
1991 J jnl
Circuit partitioning for logic synthesis.
IEEE J. Solid State Circuits
Sujit Dey, Franc Brglez, Gershon Kedem
1991 — conf
Identification and Resynthesis of Pipelines in Sequential Networks.
VLSI
Sujit Dey, Franc Brglez, Gershon Kedem
1991 C conf
Partitioning Sequential Circuits for Logic Optimization.
ICCD
Sujit Dey, Franc Brglez, Gershon Kedem
1990 J jnl
A New Parallel Sorting Algorithm and its Efficient VLSI Implementation.
Comput. J.
Sujit Dey, Pradip K. Srimani
1990 A* conf
Corolla Based Circuit Partitioning and Resynthesis.
DAC
Sujit Dey, Franc Brglez, Gershon Kedem
1988 — conf
Parallel VLSI computation of all shortest paths in a graph.
ACM Conference on Computer Science
Sujit Dey, Pradip K. Srimani