Sudip Shekhar - RankMe

79 papers A 1C 4Journal 41Unranked 33

Year	Rank	Type	Title / Venue / Authors
2026	—	`conf`	35.1 CANCEL: A Cancellation-Aided Ambient IoT Nanopowered Communication System for Energy-Limited Tags. ISSCC Hany Abolmagd, Shihkai Kuo, Md Nazmul Hasan, Sreevatsank Kadaveru, Aboozar Ghorbani-Nejad, Manideep Dunna, Ata Khorami, YiChen Yu, Dinesh Bharadia, Patrick P. Mercier, Sudip Shekhar
2026	J	`jnl`	A Self-Injection LC Oscillator for Flicker Noise Reduction. IEEE J. Solid State Circuits Bahram Jafari, Ali Ghafari, Sankaran Aniruddhan, Shahriar Mirabbasi, Sudip Shekhar
2026	J	`jnl`	Modern Wireline Transceivers. IEEE J. Solid State Circuits Tony Chan Carusone, Timothy O. Dickson, Samuel Palermo, Sudip Shekhar, Mozhgan Mansuri
2025	—	`conf`	A 4.6-6GHz Self-Injection LC Oscillator Exploiting 2 CICC Bahram Jafari, Sankaran Aniruddhan, Shahriar Mirabbasi, Sudip Shekhar
2025	—	`conf`	A Zero-Change Isolator-Replacement Circuit in Silicon-On-Insulator Leveraging Controlled Self-Injections. OFC Omid Esmaeeli, Lukas Chrostowski, Sudip Shekhar
2024	J	`jnl`	Dynamic Electro-Optic Analog Memory for Neuromorphic Photonic Computing. CoRR Sean Lam, Ahmed Khaled, Simon Bilodeau, Bicky A. Marquez, Paul R. Prucnal, Lukas Chrostowski, Bhavin J. Shastri, Sudip Shekhar
2024	J	`jnl`	Enabling data-driven and bidirectional model development in Verilog-A for photonic devices. CoRR Dias Azhigulov, Zeqin Lu, James Pond, Lukas Chrostowski, Sudip Shekhar
2023	J	`jnl`	120 GOPS Photonic Tensor Core in Thin-film Lithium Niobate for Inference and in-situ Training, CoRR Zhongjin Lin, Bhavin J. Shastri, Shangxuan Yu, Jingxiang Song, Yuntao Zhu, Arman Safarnejadian, Wangning Cai, Yanmei Lin, Wei Ke, Mustafa Hammood, Tianye Wang, Mengyue Xu, Zibo Zheng, Mohammed Al-Qadasi, Omid Esmaeeli, Mohamed Rahim, Grzegorz Pakulski, Jens H. Schmid, Pedro Barrios, Weihong Jiang, Hugh D. Morison, Matthew Mitchell, Xun Guan, Nicolas A. F. Jaeger, Leslie Ann Rusch, Sudip Shekhar, Wei Shi, Siyuan Yu, Xinlun Cai, Lukas Chrostowski
2023	J	`jnl`	A Dual-Polarization Silicon-Photonic Coherent Receiver Front-End Supporting 528 Gb/s/Wavelength. IEEE J. Solid State Circuits Abdelrahman H. Ahmed, Leonardo Vera, Lorenzo Iotti, Ruizhi Shi, Sudip Shekhar, Alexander V. Rylyakov
2023	J	`jnl`	A Hierarchical Self-Interference Canceller for Full-Duplex LPWAN Applications Achieving 52-70-dB RF Cancellation. IEEE J. Solid State Circuits Hany Abolmagd, Raghav Subbaraman, Omid Esmaeeli, Yeswanth Guntupalli, Ahmad Sharkia, Dinesh Bharadia, Sudip Shekhar
2023	J	`jnl`	A Serrodyne Modulator-Based Fractional Frequency Synthesis Technique for Low-Noise, GHz-Rate Clocking. IEEE J. Solid State Circuits Ahmad Sharkia, Shahriar Mirabbasi, Sudip Shekhar
2023	J	`jnl`	Improving Linearity in CMOS Phase Interpolators. IEEE J. Solid State Circuits Amit Kumar Mishra, Yifei Li, Pawan Agarwal, Sudip Shekhar
2023	—	`conf`	Photon-pair generation from two silicon micro-rings using the recycled optical power from a contra-directional pump-reject filter. OFC Abdelrahman E. Afifi, Andreas T. Pfenning, Sudip Shekhar, Lukas Chrostowski, Jeff F. Young
2022	—	`conf`	A 9b-Linear 14GHz Integrating-Mode Phase Interpolator in 5nm FinFET Process. ISSCC Amit Kumar Mishra, Yifei Li, Pawan Agarwal, Sudip Shekhar
2022	J	`jnl`	A Transformer-Based Technique to Improve Tuning Range and Phase Noise of a 20-28GHz LCVCO and a 51-62GHz Self-Mixing LCVCO. IEEE Trans. Circuits Syst. I Regul. Pap. Omid Esmaeeli, Sam Lightbody, Amir Hossein Masnadi Shirazi, Hormoz Djahanshahi, Rod Zavari, Shahriar Mirabbasi, Sudip Shekhar
2022	—	`conf`	Full-Duplex Wireless for (Joint-) Communication and Sensing. ESSCIRC Hany Abolmagd, Raghav Subbaraman, Dinesh Bharadia, Sudip Shekhar
2022	J	`jnl`	Optimum Conditions for Efficient Second-Harmonic Power Generation in mm-Wave Harmonic Oscillators. IEEE J. Solid State Circuits Aboozar Ghorbani-Nejad, Amir Nikpaik, Abdolreza Nabavi, Amir Hossein Masnadi Shirazi, Shahriar Mirabbasi, Sudip Shekhar
2021	A	`conf`	A Case for Emerging Memories in DNN Accelerators. DATE Avilash Mukherjee, Kumar Saurav, Prashant J. Nair, Sudip Shekhar, Mieszko Lis
2021	—	`conf`	F6: Optical and Electrical Transceivers for 400GbE and Beyond. ISSCC Tony Chan Carusone, Sudip Shekhar, Yohan Frans, Wei-Zen Chen, Thomas Toifl, Munehiko Nagatani, Franz Dielacher, William Redman-White
2021	J	`jnl`	Guest Editorial Introduction to the Special Issue on the 2021 IEEE International Solid-State Circuits Conference (ISSCC). IEEE J. Solid State Circuits Vyshnavi Suntharalingam, Sudip Shekhar
2021	J	`jnl`	Monolithic Silicon Photonic Architecture for Training Deep Neural Networks with Direct Feedback Alignment. CoRR Matthew J. Filipovich, Zhimu Guo, Mohammed Al-Qadasi, Bicky A. Marquez, Hugh D. Morison, Volker J. Sorger, Paul R. Prucnal, Sudip Shekhar, Bhavin J. Shastri
2021	—	`conf`	Neuromorphic Photonic Networks. OFC Bhavin J. Shastri, Simon Bilodeau, Bicky A. Marquez, Alexander N. Tait, Thomas Ferreira de Lima, Chaoran Huang, Lukas Chrostowski, Sudip Shekhar, Paul R. Prucnal
2021	J	`jnl`	Prospects and applications of photonic neural networks. CoRR Chaoran Huang, Volker J. Sorger, Mario Miscuglio, Mohammed Al-Qadasi, Avilash Mukherjee, Sudip Shekhar, Lukas Chrostowski, Lutz Lampe, Mitchell Nichols, Mable P. Fok, Daniel Brunner, Alexander N. Tait, Thomas Ferreira de Lima, Bicky A. Marquez, Paul R. Prucnal, Bhavin J. Shastri
2021	J	`jnl`	Scaling Up Silicon Photonic-based Accelerators: Challenges and Opportunities, and Roadmapping with Silicon Photonics 2.0. CoRR Mohammed Al-Qadasi, Lukas Chrostowski, Bhavin J. Shastri, Sudip Shekhar
2021	—	`conf`	Stable Laser Without a Magneto-optic Isolator. ECOC Hossam Shoman, Nicolas A. F. Jaeger, Connor Mosquera, Hasitha Jayatilleka, Minglei Ma, Haisheng Rong, Sudip Shekhar, Lukas Chrostowski
2020	—	`conf`	A Compact Dual-Core 26.1-to-29.9GHz Coupled-CMOS LC-VCO with Implicit Common-Mode Resonance and FoM of-191 dBc/Hz at 10MHz. CICC Amir Hossein Masnadi Shirazi, Mohammad Mahani, Hossein Miri Lavasani, Shahriar Mirabbasi, Sudip Shekhar, Rod Zavari, Hormoz Djahanshahi
2020	J	`jnl`	A Dual-Polarization Silicon-Photonic Coherent Transmitter Supporting 552 Gb/s/wavelength. IEEE J. Solid State Circuits Abdelrahman H. Ahmed, Abdellatif Elmoznine, Daihyun Lim, Yangjin Ma, Alexander V. Rylyakov, Sudip Shekhar
2020	J	`jnl`	Injection Locking in Switching Power Amplifiers. IEEE Access Amit Kumar Mishra, Sankaran Aniruddhan, Sudip Shekhar
2020	J	`jnl`	On the Design of Low-Power Hybrids for Full Duplex Simultaneous Bidirectional Signaling Links. IEEE Trans. Circuits Syst. I Fundam. Theory Appl. Chen Yuan, Ahmed Naguib, Sudip Shekhar
2019	J	`jnl`	A 10-Gb/s -18.8 dBm Sensitivity 5.7 mW Fully-Integrated Optoelectronic Receiver With Avalanche Photodetector in 0.13- $\mu$ m CMOS. IEEE Trans. Circuits Syst. I Regul. Pap. Spoorthi Nayak, Abdelrahman H. Ahmed, Ahmad Sharkia, Ajith Sivadhasan Ramani, Shahriar Mirabbasi, Sudip Shekhar
2019	—	`conf`	A 6V Swing 3.6% THD >40GHz Driver with 4.5× Bandwidth Extension for a 272Gb/s Dual-Polarization 16-QAM Silicon Photonic Transmitter. ISSCC Abdelrahman H. Ahmed, Daihyun Lim, Abdellatif Elmoznine, Yangjin Ma, Tam N. Huynh, Christopher Williams, Leonardo Vera, Yang Liu, Ruizhi Shi, Matthew Streshinsky, Ari Novack, Ran Ding, Rick Younce, Rafid A. Sukkar, Jose Roman, Michael Hochberg, Sudip Shekhar, Alexander V. Rylyakov
2019	J	`jnl`	A Compact, Voltage-Mode Type-I PLL With Gain-Boosted Saturated PFD and Synchronous Peak Tracking Loop Filter. IEEE Trans. Circuits Syst. I Regul. Pap. Ahmad Sharkia, Sankaran Aniruddhan, Shahriar Mirabbasi, Sudip Shekhar
2019	J	`jnl`	A Differential Push-Pull Voltage Mode VCSEL Driver in 65-nm CMOS. IEEE Trans. Circuits Syst. I Regul. Pap. Ajith Sivadhasan Ramani, Spoorthi Nayak, Sudip Shekhar
2019	J	`jnl`	A Hilbert Transform Equalizer Enabling 80 MHz RF Self-Interference Cancellation for Full-Duplex Receivers. IEEE Trans. Circuits Syst. I Regul. Pap. Ahmed El Sayed, Amit Kumar Mishra, Abdelrahman H. Ahmed, Amir Hossein Masnadi Shirazi, Sang-Pil Woo, Yang-Seok Choi, Shahriar Mirabbasi, Sudip Shekhar
2019	J	`jnl`	A Low-Power Bidirectional Link With a Direct Data-Sequencing Blind Oversampling CDR. IEEE J. Solid State Circuits Sudip Shekhar, Rajesh Inti, James E. Jaussi, Tzu-Chien Hsueh, Bryan Casper
2019	J	`jnl`	A Supply-Noise-Insensitive Digitally-Controlled Oscillator. IEEE Trans. Circuits Syst. I Regul. Pap. Chen Yuan, Sudip Shekhar
2019	J	`jnl`	An Integrated Discrete-Time Delay-Compensating Technique for Large-Array Beamformers. IEEE Trans. Circuits Syst. I Regul. Pap. Erfan Ghaderi, Ajith Sivadhasan Ramani, Arya A. Rahimi, Deukhyoun Heo, Sudip Shekhar, Subhanshu Gupta
2018	—	`conf`	A 0.01mm ISSCC Ahmad Sharkia, Shahriar Mirabbasi, Sudip Shekhar
2018	J	`jnl`	A 219-to-231 GHz Frequency-Multiplier-Based VCO With ~3% Peak DC-to-RF Efficiency in 65-nm CMOS. IEEE J. Solid State Circuits Amir Nikpaik, Amir Hossein Masnadi Shirazi, Abdolreza Nabavi, Shahriar Mirabbasi, Sudip Shekhar
2018	J	`jnl`	A Type-I Sub-Sampling PLL With a 100×100 µm IEEE J. Solid State Circuits Ahmad Sharkia, Shahriar Mirabbasi, Sudip Shekhar
2018	—	`conf`	Compact Silicon Microring Modulator with Tunable Extinction Ratio and Wide FSR. OFC Hossam Shoman, Hasitha Jayatilleka, Anthony H. K. Park, Nicolas A. F. Jaeger, Sudip Shekhar, Lukas Chrostowski
2017	—	`conf`	A low-power temperature sensing system for implantable biomedical applications. NEWCAS Hasan Afkhami Ardakani, Amir Hossein Masnadi Shirazi, Sudip Shekhar, Shahriar Mirabbasi
2017	—	`conf`	Analog interference cancellation for full-duplex broadband power line communications. ISPLC Gautham Prasad, Lutz Lampe, Sudip Shekhar
2017	—	`conf`	Automatic tuning and temperature stabilization of high-order silicon Vernier microring filters. OFC Hasitha Jayatilleka, Robert Boeck, Mohammed W. AlTaha, Jonas Flueckiger, Nicolas A. F. Jaeger, Sudip Shekhar, Lukas Chrostowski
2017	J	`jnl`	Digitally Controlled Analog Cancellation for Full Duplex Broadband Power Line Communications. IEEE Trans. Commun. Gautham Prasad, Lutz Lampe, Sudip Shekhar
2017	—	`conf`	Session 2 - Wireline techniques for advanced modulation schemes. CICC Sudip Shekhar, Tod Dickson
2016	—	`conf`	Automatic wavelength tuning of series-coupled Vernier racetrack resonators on SOI. OFC Hasitha Jayatilleka, Robert Boeck, Kyle Murray, Jonas Flueckiger, Lukas Chrostowski, Nicolas A. F. Jaeger, Sudip Shekhar
2016	—	`conf`	Enhancing transmission efficiency of broadband PLC systems with In-Band Full Duplexing. ISPLC Gautham Prasad, Lutz Lampe, Sudip Shekhar
2016	J	`jnl`	In-Band Full Duplex Broadband Power Line Communications. IEEE Trans. Commun. Gautham Prasad, Lutz Lampe, Sudip Shekhar
2016	J	`jnl`	On the Design of mm-Wave Self-Mixing-VCO Architecture for High Tuning-Range and Low Phase Noise. IEEE J. Solid State Circuits Amir Hossein Masnadi Shirazi, Amir Nikpaik, Reza Molavi, Sam Lightbody, Hormoz Djahanshahi, Mazhareddin Taghivand, Shahriar Mirabbasi, Sudip Shekhar
2016	—	`conf`	Silicon-photonic devices: Electronic control and stabilization. CCECE Mohammed W. AlTaha, Spoorthi Nayak, Hasitha Jayatilleka, Sudip Shekhar, Shahriar Mirabbasi
2015	—	`conf`	A 0.5-to-0.75V, 3-to-8 Gbps/lane, 385-to-790 fJ/b, bi-directional, quad-lane forwarded-clock transceiver in 22nm CMOS. VLSIC Rajesh Inti, Sudip Shekhar, Ganesh Balamurugan, James E. Jaussi, Clark Roberts, Tzu-Chien Hsueh, Bryan Casper
2015	—	`conf`	A 1.2-5Gb/s 1.4-2pJ/b serial link in 22nm CMOS with a direct data-sequencing blind oversampling CDR. VLSIC Sudip Shekhar, Rajesh Inti, James E. Jaussi, Tzu-Chien Hsueh, Bryan Casper
2015	—	`conf`	A dual-tank LC VCO topology approaching towards the maximum thermodynamically-achievable oscillator FoM. CICC Amir Nikpaik, Abdolreza Nabavi, Amir Hossein Masnadi Shirazi, Sudip Shekhar, Shahriar Mirabbasi
2015	—	`conf`	A high-performance, yet simple to design, digital-friendly type-I PLL. CICC Ahmad Sharkia, Sankaran Aniruddhan, Sudip Shekhar, Shahriar Mirabbasi
2014	—	`conf`	26.2 A 205mW 32Gb/s 3-Tap FFE/6-tap DFE bidirectional serial link in 22nm CMOS. ISSCC James E. Jaussi, Ganesh Balamurugan, Sami Hyvonen, Tzu-Chien Hsueh, Tawfiq Musah, Gökçe Keskin, Sudip Shekhar, Joseph T. Kennedy, Shreyas Sen, Rajesh Inti, Mozhgan Mansuri, Michael Leddige, Bryce Horine, Clark Roberts, Randy Mooney, Bryan Casper
2014	—	`conf`	26.4 A 25.6Gb/s differential and DDR4/GDDR5 dual-mode transmitter with digital clock calibration in 22nm CMOS. ISSCC Tzu-Chien Hsueh, Ganesh Balamurugan, James E. Jaussi, Sami Hyvonen, Joseph T. Kennedy, Gökçe Keskin, Tawfiq Musah, Sudip Shekhar, Rajesh Inti, Shreyas Sen, Mozhgan Mansuri, Clark Roberts, Bryan Casper
2014	J	`jnl`	A 4-32 Gb/s Bidirectional Link With 3-Tap FFE/6-Tap DFE and Collaborative CDR in 22 nm CMOS. IEEE J. Solid State Circuits Tawfiq Musah, James E. Jaussi, Ganesh Balamurugan, Sami Hyvonen, Tzu-Chien Hsueh, Gokce Keskin, Sudip Shekhar, Joseph T. Kennedy, Shreyas Sen, Rajesh Inti, Mozhgan Mansuri, Michael Leddige, Bryce Horine, Clark Roberts, Randy Mooney, Bryan Casper
2014	—	`conf`	A low-power DC-to-27-GHz transimpedance amplifier in 0.13-µm CMOS using inductive-peaking and current-reuse techniques. MWSCAS Amir Hossein Masnadi Shirazi, Reza Molavi, Peter Sangpil Woo, Ge Yu, Shahriar Mirabbasi, Sudip Shekhar, André Ivanov
2013	J	`jnl`	A Scalable 0.128-1 Tb/s, 0.8-2.6 pJ/bit, 64-Lane Parallel I/O in 32-nm CMOS. IEEE J. Solid State Circuits Mozhgan Mansuri, James E. Jaussi, Joseph T. Kennedy, Tzu-Chien Hsueh, Sudip Shekhar, Ganesh Balamurugan, Frank O'Mahony, Clark Roberts, Randy Mooney, Bryan Casper
2013	—	`conf`	A scalable 0.128-to-1Tb/s 0.8-to-2.6pJ/b 64-lane parallel I/O in 32nm CMOS. ISSCC Mozhgan Mansuri, James E. Jaussi, Joseph T. Kennedy, Tzu-Chien Hsueh, Sudip Shekhar, Ganesh Balamurugan, Frank O'Mahony, Clark Roberts, Randy Mooney, Bryan Casper
2013	—	`conf`	Design considerations for low-power receiver front-end in high-speed data links. CICC Sudip Shekhar, James E. Jaussi, Frank O'Mahony, Mozhgan Mansuri, Bryan Casper
2011	J	`jnl`	A 2.4-GHz Extended-Range Type-I SigmaDelta Fractional-N Synthesizer With 1.8-MHz Loop Bandwidth and -110-dBc/Hz Phase Noise. IEEE Trans. Circuits Syst. II Express Briefs Sudip Shekhar, Daibashish Gangopadhyay, Eum Chan Woo, David J. Allstot
2011	J	`jnl`	A CMOS 1.6 GHz Dual-Loop PLL With Fourth-Harmonic Mixing. IEEE Trans. Circuits Syst. I Regul. Pap. Sankaran Aniruddhan, Sudip Shekhar, David J. Allstot
2010	C	`conf`	A 1.6 mW 5.4 GHz transformer-feedback gm-boosted current-reuse LNA in 0.18/μm CMOS. ISCAS Daibashish Gangopadhyay, Sudip Shekhar, Jeffrey S. Walling, David J. Allstot
2010	J	`jnl`	A 47 , ˟, 10 Gb/s 1.4 mW/Gb/s Parallel Interface in 45 nm CMOS. IEEE J. Solid State Circuits Frank O'Mahony, James E. Jaussi, Joseph T. Kennedy, Ganesh Balamurugan, Mozhgan Mansuri, Clark Roberts, Sudip Shekhar, Randy Mooney, Bryan Casper
2010	—	`conf`	A 47×10Gb/s 1.4mW/(Gb/s) parallel interface in 45nm CMOS. ISSCC Frank O'Mahony, Joseph T. Kennedy, James E. Jaussi, Ganesh Balamurugan, Mozhgan Mansuri, Clark Roberts, Sudip Shekhar, Randy Mooney, Bryan Casper
2010	C	`conf`	U-shaped slow-wave transmission lines in 0.18μm CMOS. ISCAS Heng-Chia Hsu, Kaushik Dasgupta, Nathan M. Neihart, Sudip Shekhar, Jeffrey S. Walling, David J. Allstot
2009	J	`jnl`	Strong Injection Locking in Low- Q LC Oscillators: Modeling and Application in a Forwarded-Clock I/O Receiver. IEEE Trans. Circuits Syst. I Regul. Pap. Sudip Shekhar, Ganesh Balamurugan, David J. Allstot, Mozhgan Mansuri, James E. Jaussi, Randy Mooney, Joseph T. Kennedy, Bryan Casper, Frank O'Mahony
2008	—	`conf`	A 27Gb/s Forwarded-Clock I/O Receiver Using an Injection-Locked LC-DCO in 45nm CMOS. ISSCC Frank O'Mahony, Sudip Shekhar, Mozhgan Mansuri, Ganesh Balamurugan, James E. Jaussi, Joseph T. Kennedy, Bryan Casper, David J. Allstot, Randy Mooney
2008	J	`jnl`	CMOS VCO and LNA Using Tuned-Input Tuned-Output Circuits. IEEE J. Solid State Circuits Sudip Shekhar, Jeffrey S. Walling, Sankaran Aniruddhan, David J. Allstot
2008	—	`conf`	Strong injection locking of low-Q LC oscillators. CICC Mozhgan Mansuri, Frank O'Mahony, Ganesh Balamurugan, James E. Jaussi, Joseph T. Kennedy, Sudip Shekhar, Randy Mooney, Bryan Casper
2008	J	`jnl`	Wideband CMOS Amplifier Design: Time-Domain Considerations. IEEE Trans. Circuits Syst. I Regul. Pap. Jeffrey S. Walling, Sudip Shekhar, David J. Allstot
2006	C	`conf`	A delay generation technique for fast-locking frequency synthesizers. ISCAS Sankaran Aniruddhan, Sudip Shekhar, David J. Allstot
2006	C	`conf`	A fully-differential CMOS Clapp VCO for IEEE 802.11a applications. ISCAS Sudip Shekhar, Sankaran Aniruddhan, David J. Allstot
2006	J	`jnl`	Bandwidth Extension Techniques for CMOS Amplifiers. IEEE J. Solid State Circuits Sudip Shekhar, Jeffrey S. Walling, David J. Allstot
2005	J	`jnl`	A capacitor cross-coupled common-gate low-noise amplifier. IEEE Trans. Circuits Syst. II Express Briefs Wei Zhuo, Xiaoyong Li, Sudip Shekhar, Sherif H. K. Embabi, José Pineda de Gyvez, David J. Allstot, Edgar Sánchez-Sinencio
2005	J	`jnl`	G IEEE J. Solid State Circuits Xiaoyong Li, Sudip Shekhar, David J. Allstot
2004	—	`conf`	Design considerations for anti-phase injected quadrature voltage controlled oscillators. ICECS Min Chu, Sudip Shekhar, David J. Allstot, Tarun Kanti Bhattacharyya