Sudip Ghosh - RankMe

17 papers C 1Journal 6Unranked 10

Year	Rank	Type	Title / Venue / Authors
2026	J	`jnl`	ASIC Design and Implementation of Fast 2D Gaussian Filter Chip Using Approximate Computing. Circuits Syst. Signal Process. Utsab Dhara, Subhrajyoti Choudhury, Sudip Ghosh, Hafizur Rahaman
2026	J	`jnl`	Architectural Design and Performance Analysis of FPGA based AI Accelerators: A Comprehensive Review. CoRR Soumita Chatterjee, Sudip Ghosh, Tamal Ghosh, Hafizur Rahaman
2024	—	`conf`	ML Based Diagnosis for Fault Location in Digital Circuits. ATS Diptanshu Bagchi, Habibur Rahaman, Sudip Ghosh, Subhajit Chatterjee
2023	—	`conf`	Hardware Performance Analysis of N-bit CLA on FPGA and Programmable SoC. IAIT Piyali Saha, Sudip Ghosh, Debajyoti Pal, Hafizur Rahaman
2023	—	`conf`	Implementation of Area Efficient Adders for Inexact Computing. ISDCS Rounak Roy, Sudip Ghosh, Hafizur Rahaman
2023	—	`conf`	Power and Delay Efficient Hardware Implementation with ATPG for Vedic Multiplier Using Urdhva Tiryagbhyam Sutra. IAIT Anchit Arun, Ananya Chakraborty, Priyanka Dutta, Debajyoti Pal, Tridibesh Nag, Debashis De, Sudip Ghosh, Hafizur Rahaman
2022	J	`jnl`	Hardware Design with Real-Time Implementation for Security of Medical Images and EPMR. Circuits Syst. Signal Process. Sudip Ghosh, Yuvam Bhateja, Joshua Roy Palathinkal, Hafizur Rahaman
2020	—	`conf`	A New Blind Invisible and Semi-Fragile Colour Image Watermarking Scheme in Spatial Domain. ISDCS Joshua Roy Palathinkal, Yuvam Bhateja, Sudip Ghosh, Hafizur Rahaman
2020	—	`conf`	A New Digital Color Image Watermarking Algorithm with its FPGA and ASIC Implementation. ISDCS Shivdeep, Sudip Ghosh, Hafizur Rahaman
2018	J	`jnl`	Correction to: VLSI-Based Pipeline Architecture for Reversible Image Watermarking by Difference Expansion with High-Level Synthesis Approach. Circuits Syst. Signal Process. Subhajit Das, Sudip Ghosh, Nachiketa Das, Santi P. Maity, Hafizur Rahaman, Reshmi Maity, Niladri Maity
2018	J	`jnl`	FPGA implementation of semi-fragile reversible watermarking by histogram bin shifting in real time. J. Real Time Image Process. Sambaran Hazra, Sudip Ghosh, Sayandip De, Hafizur Rahaman
2016	C	`conf`	A rule-based approach for minimizing power dissipation of digital circuits. DDECS Subrata Das, Parthasarathi Dasgupta, Petr Fiser, Sudip Ghosh, Debesh Kumar Das
2015	—	`conf`	An adaptive feedback based reversible watermarking algorithm using difference expansion. ReTIS Sudip Ghosh, Nachiketa Das, Subhajit Das, Santi Prasad Maity, Hafizur Rahaman
2015	J	`jnl`	Field Programmable Gate Array and System-on-Chip Based Implementation of Discrete Fast Walsh-Hadamard Transform Domain Image Watermarking Architecture for Real-Time Applications. J. Low Power Electron. Sudip Ghosh, Arijit Biswas, Santi Prasad Maity, Hafizur Rahaman
2014	—	`conf`	Design of a Low Complexity and Fast Hardware Architecture for Digital Image Watermarking in FWHT Domain on FPGA. ISED Sudip Ghosh, Arijit Biswas, Santi P. Maity, Hafizur Rahaman
2014	—	`conf`	Digital Design and Pipelined Architecture for Reversible Watermarking Based on Difference Expansion Using FPGA. ICIT Sudip Ghosh, Nachiketa Das, Subhajit Das, Santi P. Maity, Hafizur Rahaman
2012	—	`conf`	VLSI Architecture for Spatial Domain Spread Spectrum Image Watermarking Using Gray-Scale Watermark. VDAT Sudip Ghosh, Somsubhra Talapatra, Debasish Mondal, Navonil Chatterjee, Hafizur Rahaman, Santi P. Maity