Sudhir M. Gowda

14 papers C 1Journal 10Unranked 3
YearRankTypeTitle / Venue / Authors
2006 J jnl
A 10-Gb/s 5-Tap DFE/4-Tap FFE Transceiver in 90-nm CMOS Technology.
IEEE J. Solid State Circuits
John F. Bulzacchelli, Mounir Meghelli, Sergey V. Rylov, Woogeun Rhee, Alexander V. Rylyakov, Herschel A. Ainspan, Benjamin D. Parker, Michael P. Beakes, Aichin Chung, Troy J. Beukema, Petar K. Pepeljugoski, Lei Shan, Young Hoon Kwark, Sudhir M. Gowda, Daniel J. Friedman
2006 — conf
A 10Gb/s 5-Tap-DFE/4-Tap-FFE Transceiver in 90nm CMOS.
ISSCC
Mounir Meghelli, Sergey V. Rylov, John F. Bulzacchelli, Woogeun Rhee, Alexander V. Rylyakov, Herschel A. Ainspan, Benjamin D. Parker, Michael P. Beakes, Aichin Chung, Troy J. Beukema, Petar K. Pepeljugoski, L. Shan, Young Hoon Kwark, Sudhir M. Gowda, Daniel J. Friedman
2005 J jnl
10+ gb/s 90-nm CMOS serial link demo in CBGA package.
IEEE J. Solid State Circuits
Sergey V. Rylov, Scott K. Reynolds, Daniel W. Storaska, Brian A. Floyd, Mohit Kapur, Thomas Zwick, Sudhir M. Gowda, Michael Sorna
2004 — conf
10+ Gb/s 90nm CMOS serial link demo in CBGA package.
CICC
Sergey V. Rylov, Scott K. Reynolds, Daniel W. Storaska, Brian A. Floyd, Mohit Kapur, Thomas Zwick, Sudhir M. Gowda, Michael Sorna
2003 — conf
A 10-Gb/s CMOS clock and data recovery circuit using a secondary delay-locked loop.
CICC
Woogeun Rhee, Herschel A. Ainspan, Sergey V. Rylov, Alexander V. Rylyakov, Michael P. Beakes, Daniel J. Friedman, Sudhir M. Gowda, Mehmet Soyuer
2003 J jnl
Integrated transversal equalizers in high-speed fiber-optic systems.
IEEE J. Solid State Circuits
Hui Wu, José A. Tierno, Petar K. Pepeljugoski, Jeremy Schaub, Sudhir M. Gowda, Jeffrey A. Kash, Ali Hajimiri
1995 J jnl
Custom design of CMOS low-power high-performance digital signal-processing macro for hard-disk-drive applications.
IBM J. Res. Dev.
Hyun J. Shin, Dale J. Pearson, Scott K. Reynolds, Andrew C. Megdanis, Sudhir M. Gowda, Kevin R. Wrenner
1995 J jnl
Digital FIR filters for high speed PRML disk read channels.
IEEE J. Solid State Circuits
Dale J. Pearson, Scott K. Reynolds, Andrew C. Megdanis, Sudhir M. Gowda, Kevin R. Wrenner, Michael Immediato, Richard L. Galbraith, Hyun J. Shin
1994 J jnl
BSIM plus: an advanced SPICE model for submicron MOS VLSI circuits.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Sudhir M. Gowda, Bing J. Sheu
1994 J jnl
Testing of programmable analog neural network chips.
J. VLSI Signal Process.
Sudhir M. Gowda, Bing J. Sheu, Wen-Jay Hsu
1993 J jnl
Design and characterization of analog VLSI neural network modules.
IEEE J. Solid State Circuits
Sudhir M. Gowda, Bing J. Sheu, Joongho Choi, Chang-Gyu Hwang, James S. Cable
1992 J jnl
Advanced integrated-circuit reliability simulation including dynamic stress effects.
IEEE J. Solid State Circuits
Wen-Jay Hsu, Bing J. Sheu, Sudhir M. Gowda, Chang-Gyu Hwang
1991 J jnl
Design of reliable VLSI circuits using simulation techniques.
IEEE J. Solid State Circuits
Wen-Jay Hsu, Bing J. Sheu, Sudhir M. Gowda
1991 C conf
Testing of Analog Neural Array-Processor Chips.
ICCD
Wen-Jay Hsu, Bing J. Sheu, Sudhir M. Gowda