Sudhanshu Khanna

19 papers A 3C 3Misc 1Journal 4Unranked 8
YearRankTypeTitle / Venue / Authors
2025 J jnl
Protecting Analog Circuits Using Switch Mode Time Domain Locking.
IEEE Trans. Very Large Scale Integr. Syst.
Utkarsh Kumar, Sudhanshu Khanna, Ankit Mittal, Aatmesh Shrivastava
2019 — conf
16MHz FRAM Micro-Controller with a Low-Cost Sub-1μA Embedded Piezo-Electric Strain Sensor for ULP Motion Detection.
ISSCC
Sudhanshu Khanna, Michael Zwerg, Brian Elies, Juergen Luebbe, Nagaraj Krishnasawamy, Hadi Najar, Suman Bellary, Wei-Yan Shih, Scott R. Summerfelt, Steven Bartling
2018 — conf
Energy Efficient Adiabatic FRAM with 0.99 PJ/Bit Write for IoT Applications.
VLSI Circuits
Supreet Jeloka, Zhehong Wang, Ruochen Xie, Sudhanshu Khanna, Steven Bartling, Dennis Sylvester, David T. Blaauw
2017 — conf
Non-volatile logic SoC with software-hardware co-design and integrated supply supervisor for energy harvesting applications.
MWSCAS
Michael Zwerg, Sudhanshu Khanna, Steven Bartling
2015 — conf
A digitally-controlled power-aware low-dropout regulator to reduce standby current drain in ultra-low-power MCU.
ISQED
Kaushik Mazumdar, Steven Bartling, Sudhanshu Khanna, Mircea R. Stan
2014 — conf
A 1.2µW SIMO energy harvesting and power management unit with constant peak inductor current control achieving 83-92% efficiency across wide input and output voltages.
VLSIC
Aatmesh Shrivastava, Yogesh K. Ramadass, Sudhanshu Khanna, Steven Bartling, Benton H. Calhoun
2014 J jnl
A 32 b 90 nm Processor Implementing Panoptic DVS Achieving Energy Efficient Operation From Sub-Threshold to High Performance.
IEEE J. Solid State Circuits
Kyle Craig, Yousef Shakhsheer, Saad Arrabi, Sudhanshu Khanna, John C. Lach, Benton H. Calhoun
2014 J jnl
An FRAM-Based Nonvolatile Logic MCU SoC Exhibiting 100% Digital State Retention at
IEEE J. Solid State Circuits
Sudhanshu Khanna, Steven Bartling, Michael Clinton, Scott R. Summerfelt, John A. Rodriguez, Hugh P. McAdams
2014 Misc conf
Pipelined Non-strobed Sensing Scheme for Lowering BL Swing in Nano-scale Memories.
VLSID
Sudhanshu Khanna, Satyanand Nalam, Benton H. Calhoun
2013 — conf
An 8MHz 75µA/MHz zero-leakage non-volatile logic-based Cortex-M0 MCU SoC exhibiting 100% digital state retention at VDD=0V with <400ns wakeup and sleep transitions.
ISSCC
Steven Bartling, Sudhanshu Khanna, Michael Clinton, Scott R. Summerfelt, John A. Rodriguez, Hugh P. McAdams
2012 A conf
A programmable resistive power grid for post-fabrication flexibility and energy tradeoffs.
ISLPED
Kyle Craig, Yousef Shakhsheer, Sudhanshu Khanna, Saad Arrabi, John C. Lach, Benton H. Calhoun, Stephen Kosonocky
2011 — conf
A 90nm data flow processor demonstrating fine grained DVS for energy efficient operation from 0.25V to 1.2V.
CICC
Yousef Shakhsheer, Sudhanshu Khanna, Kyle Craig, Saad Arrabi, John C. Lach, Benton H. Calhoun
2011 A conf
An analytical model for performance yield of nanoscale SRAM accounting for the sense amplifier strobe signal.
ISLPED
Joseph F. Ryan, Sudhanshu Khanna, Benton H. Calhoun
2011 — conf
Stepped Supply Voltage Switching for energy constrained systems.
ISQED
Sudhanshu Khanna, Kyle Craig, Yousef Shakhsheer, Saad Arrabi, John C. Lach, Benton H. Calhoun
2010 J jnl
Flexible Circuits and Architectures for Ultralow Power.
Proc. IEEE
Benton H. Calhoun, Joseph F. Ryan, Sudhanshu Khanna, Mateja Putic, John C. Lach
2010 C conf
System design principles combining sub-threshold circuit and architectures with energy scavenging mechanisms.
ISCAS
Benton H. Calhoun, Sudhanshu Khanna, Yanqing Zhang, Joseph F. Ryan, Brian P. Otis
2009 A conf
Serial sub-threshold circuits for ultra-low-power systems.
ISLPED
Sudhanshu Khanna, Benton H. Calhoun
2009 C conf
Sub-threshold Circuit Design with Shrinking CMOS Devices.
ISCAS
Benton H. Calhoun, Sudhanshu Khanna, Randy W. Mann, Jiajing Wang
2009 C conf
Sub-threshold Operation and Cross-hierarchy Design for Ultra Low Power Wearable Sensors.
ISCAS
Benton H. Calhoun, Jonathan F. Bolus, Sudhanshu Khanna, Andrew D. Jurik, Alfred C. Weaver, Travis N. Blalock