Sudarsan V. S. Ranganathan

18 papers B 7Misc 2Journal 8Unranked 1
YearRankTypeTitle / Venue / Authors
2019 B conf
Decoding Flash Memory with Progressive Reads and Independent vs. Joint Encoding of Bits in a Cell.
GLOBECOM
Nathan Wong, Ethan Liang, Haobo Wang, Sudarsan V. S. Ranganathan, Richard D. Wesel
2019 J jnl
Quasi-Cyclic Protograph-Based Raptor-Like LDPC Codes for Short Block-Lengths.
IEEE Trans. Inf. Theory
Sudarsan V. S. Ranganathan, Dariush Divsalar, Richard D. Wesel
2019 J jnl
Variable-Length Coding With Shared Incremental Redundancy: Design Methods and Examples.
IEEE Trans. Commun.
Haobo Wang, Sudarsan V. S. Ranganathan, Richard D. Wesel
2018 B conf
Linear Rate-Compatible Codes with Degree-1 Extending Variable Nodes Under Iterative Decoding.
ISIT
Sudarsan V. S. Ranganathan, Richard D. Wesel, Dariush Divsalar
2018 B conf
Serial List Viterbi Decoding with CRC: Managing Errors, Erasures, and Complexity.
GLOBECOM
Hengjie Yang, Sudarsan V. S. Ranganathan, Richard D. Wesel
2017 J jnl
Allocating Redundancy Between Erasure Coding and Channel Coding When Fading Channel Diversity Grows With Codeword Length.
IEEE Trans. Commun.
Sudarsan V. S. Ranganathan, Tong Mu, Richard D. Wesel
2017 B conf
An information density approach to analyzing and optimizing incremental redundancy with feedback.
ISIT
Haobo Wang, Nathan Wong, Alexander M. Baldauf, Christopher K. Bachelor, Sudarsan V. S. Ranganathan, Dariush Divsalar, Richard D. Wesel
2017 B conf
Approaching capacity using incremental redundancy without feedback.
ISIT
Haobo Wang, Sudarsan V. S. Ranganathan, Richard D. Wesel
2017 J jnl
Design of Improved Quasi-Cyclic Protograph-Based Raptor-Like LDPC Codes for Short Block-Lengths.
CoRR
Sudarsan V. S. Ranganathan, Dariush Divsalar, Richard D. Wesel
2017 B conf
Design of improved quasi-cyclic protograph-based Raptor-like LDPC codes for short block-lengths.
ISIT
Sudarsan V. S. Ranganathan, Dariush Divsalar, Richard D. Wesel
2017 Misc conf
Sequential differential optimization of incremental redundancy transmission lengths: An example with tail-biting convolutional codes.
ITA
Nathan Wong, Kasra Vakilinia, Haobo Wang, Sudarsan V. S. Ranganathan, Richard D. Wesel
2016 J jnl
Optimality and Rate-Compatibility for Erasure-Coded Packet Transmissions when Fading Channel Diversity Increases with Packet Length.
CoRR
Sudarsan V. S. Ranganathan, Tong Mu, Richard D. Wesel
2016 J jnl
Optimizing Transmission Lengths for Limited Feedback With Nonbinary LDPC Examples.
IEEE Trans. Commun.
Kasra Vakilinia, Sudarsan V. S. Ranganathan, Dariush Divsalar, Richard D. Wesel
2016 J jnl
Optimizing Transmission Lengths for Limited Feedback with Non-Binary LDPC Examples.
CoRR
Kasra Vakilinia, Sudarsan V. S. Ranganathan, Dariush Divsalar, Richard D. Wesel
2016 Misc conf
Some results on spatially coupled protograph LDPC codes.
ITA
Sudarsan V. S. Ranganathan, Kasra Vakilinia, Lara Dolecek, Dariush Divsalar, Richard D. Wesel
2016 — conf
Universal rate-compatible LDPC code families for any increment ordering.
ISTC
Sudarsan V. S. Ranganathan, Kasra Vakilinia, Dariush Divsalar, Richard D. Wesel
2015 J jnl
On the Girth of (3, L) Quasi-Cyclic LDPC Codes based on Complete Protographs.
CoRR
Sudarsan V. S. Ranganathan, Dariush Divsalar, Richard D. Wesel
2015 B conf
On the girth of (3, L) quasi-cyclic LDPC codes based on complete protographs.
ISIT
Sudarsan V. S. Ranganathan, Dariush Divsalar, Richard D. Wesel