Subho Chatterjee

17 papers A 5B 1C 1Misc 2Journal 6Unranked 1
YearRankTypeTitle / Venue / Authors
2026 A conf
A Multi-tenant Relational OLTP Database at Salesforce.
CIDR
Vaibhav Arora, Subho Chatterjee, Terry Chong, Thomas Fanghaenel, Pat Helland, Jamie Martin, Kaushal Mittal, Nat Wyatt
2015 J jnl
A Memory-Based Logic Block With Optimized-for-Read SRAM for Energy-Efficient Reconfigurable Computing Fabric.
IEEE Trans. Circuits Syst. II Express Briefs
Wen Yueh, Subho Chatterjee, Muneeb Zia, Swarup Bhunia, Saibal Mukhopadhyay
2015 J jnl
Exploring Spin Transfer Torque Devices for Unconventional Computing.
IEEE J. Emerg. Sel. Topics Circuits Syst.
Kaushik Roy, Deliang Fan, Xuanyao Fong, Yusung Kim, Mrigank Sharad, Somnath Paul, Subho Chatterjee, Swarup Bhunia, Saibal Mukhopadhyay
2014 — conf
A methodology for yield-specific leakage estimation in memory.
CICC
Subho Chatterjee, Pramod Kolar, Wei Jian Chan, Jae Y. Ko, Gunjan H. Pandya
2013 J jnl
Electrothermal analysis of spin-transfer-torque random access memory arrays.
ACM J. Emerg. Technol. Comput. Syst.
Subho Chatterjee, Sayeef S. Salahuddin, Satish Kumar, Saibal Mukhopadhyay
2012 — —
A design methodology for robust, energy-efficient, application-aware memory systems.
Subho Chatterjee
2012 Misc conf
On the parametric failures of SRAM in a 3D-die stack considering tier-to-tier supply cross-talk.
VTS
Wen Yueh, Subho Chatterjee, Amit Ranjan Trivedi, Saibal Mukhopadhyay
2011 J jnl
A Scalable Design Methodology for Energy Minimization of STTRAM: A Circuit and Architecture Perspective.
IEEE Trans. Very Large Scale Integr. Syst.
Subho Chatterjee, Mitchelle Rasquinha, Sudhakar Yalamanchili, Saibal Mukhopadhyay
2011 J jnl
Energy-Efficient Reconfigurable Computing Using a Circuit-Architecture-Software Co-Design Approach.
IEEE J. Emerg. Sel. Topics Circuits Syst.
Somnath Paul, Subho Chatterjee, Saibal Mukhopadhyay, Swarup Bhunia
2011 B conf
Power Aware Post-manufacture Tuning of Analog Nanocircuits.
ETS
Aritra Banerjee, Subho Chatterjee, Azad Naeemi, Abhijit Chatterjee
2010 A conf
An energy efficient cache design using spin torque transfer (STT) RAM.
ISLPED
Mitchelle Rasquinha, Dhruv Choudhary, Subho Chatterjee, Saibal Mukhopadhyay, Sudhakar Yalamanchili
2010 A conf
Analysis of thermal behaviors of spin-torque-transfer RAM: a simulation study.
ISLPED
Subho Chatterjee, Sayeef S. Salahuddin, Satish Kumar, Saibal Mukhopadhyay
2010 J jnl
Dual-Source-Line-Bias Scheme to Improve the Read Margin and Sensing Accuracy of STTRAM in Sub-90-nm Nodes.
IEEE Trans. Circuits Syst. II Express Briefs
Subho Chatterjee, Sayeef S. Salahuddin, Saibal Mukhopadhyay
2009 A conf
A circuit-software co-design approach for improving EDP in reconfigurable frameworks.
ICCAD
Somnath Paul, Subho Chatterjee, Saibal Mukhopadhyay, Swarup Bhunia
2009 A conf
A methodology for robust, energy efficient design of Spin-Torque-Transfer RAM arrays at scaled technologies.
ICCAD
Subho Chatterjee, Mitchelle Rasquinha, Sudhakar Yalamanchili, Saibal Mukhopadhyay
2008 Misc conf
A Fast Settling 100dB OPAMP in 180nm CMOS Process with Compensation Based Optimisation.
VLSI Design
Amal Kumar Kundu, Subho Chatterjee, Tarun Kanti Bhattacharyya
2008 C conf
An efficient approach to model distortion in weakly nonlinear Gm - C filters.
ISCAS
Amitava Banerjee, Subho Chatterjee, Amit Patra, Siddhartha Mukhopadhyay