Subhendu Kumar Sahoo

25 papers C 1Misc 1Journal 16Unranked 7

Year	Rank	Type	Title / Venue / Authors
2026	Misc	`conf`	An Instruction-Set-Based Processor Design for Scalable Post-Quantum Cryptography: A Case Study with Baby Kyber. VLSID Ramyavani P, Radhanath Mishra, Abhiram Karanam, Amit Kumar Panda, G. Geethakumari, Joseph Zambreno, Subhendu Kumar Sahoo
2026	J	`jnl`	UPP-NTT: A Unified Parallel Pipelined NTT Accelerator for CRYSTALS-Kyber Post-Quantum Cryptography. IEEE Access Ramyavani P, Reddigari Tanay Reddy, Archith Casheekar, Amit Kumar Panda, G. Geethakumari, Subhendu Kumar Sahoo
2024	J	`jnl`	A new fast and efficient dehazing and defogging algorithm for single remote sensing images. Signal Process. Apurva Kumari, Subhendu Kumar Sahoo
2024	J	`jnl`	An effective and robust single-image dehazing method based on gamma correction and adaptive Gaussian notch filtering. J. Supercomput. Apurva Kumari, Subhendu Kumar Sahoo
2024	J	`jnl`	IoT-Enabled Triglyceride Microstrip Electrochemical Sensor Using Enzymes Anchored to Gold by Polydopamine. IEEE Access Mrunali D. Wagh, Akhilesh Gowrishetty, K. Ramya, Subhendu Kumar Sahoo, Sanket Goel
2021	J	`jnl`	Fast and Efficient Visibility Restoration Technique for Single Image Dehazing and Defogging. IEEE Access Apurva Kumari, Subhendu Kumar Sahoo, M. C. Chinnaiah
2021	J	`jnl`	Tunnel FET-based ultra-lightweight reconfigurable TRNG and PUF design for resource-constrained internet of things. Int. J. Circuit Theory Appl. Aditya Japa, Manoj Kumar Majumder, Subhendu Kumar Sahoo, Ramesh Vaddi
2020	C	`conf`	A Low Voltage Discriminant Circuit for Pattern Recognition Exploiting the Asymmetrical Characteristics of Tunnel FET. ISCAS Aditya Japa, Yellappa Palagani, Venkateswarlu Gonuguntla, Manoj Kumar Majumder, Subhendu Kumar Sahoo, Jun Rim Choi, Ramesh Vaddi
2020	J	`jnl`	Area and power-efficient variable-length fast Fourier transform for MR-OFDM physical layer of IEEE 802.15.4-g. IET Comput. Digit. Tech. Ganesh Kumar Ganjikunta, Subhendu Kumar Sahoo
2020	J	`jnl`	Low area overhead DPA countermeasure exploiting tunnel transistor-based random number generator. IET Circuits Devices Syst. Aditya Japa, Manoj Kumar Majumder, Subhendu Kumar Sahoo, Ramesh Vaddi
2020	J	`jnl`	Power-efficient compensation circuit for fixed-width multipliers. IET Circuits Devices Syst. Ganesh Kumar Ganjikunta, Subhendu Kumar Sahoo
2020	J	`jnl`	Tunnel FET-based ultralow-power and hardware-secure circuit design considering p-i-n forward leakage. Int. J. Circuit Theory Appl. Aditya Japa, Manoj Kumar Majumder, Subhendu Kumar Sahoo, Ramesh Vaddi
2019	J	`jnl`	50 Years of FFT Algorithms and Applications. Circuits Syst. Signal Process. G. Ganesh Kumar, Subhendu Kumar Sahoo, Pramod Kumar Meher
2019	J	`jnl`	Multichannel Filters for Wireless Networks: Lookup-Table-Based Efficient Implementation. IEEE Consumer Electron. Mag. Subhendu Kumar Sahoo, Pramod Kumar Meher, Ganesh Kumar Ganjikunta
2019	J	`jnl`	Tunnel FET ambipolarity-based energy efficient and robust true random number generator against reverse engineering attacks. IET Circuits Devices Syst. Aditya Japa, Manoj Kumar Majumder, Subhendu Kumar Sahoo, Ramesh Vaddi
2018	—	`conf`	High Performance Ternary Multiplier Using CNTFET. ISVLSI Subhendu Kumar Sahoo, Krishna Dhoot, Rasmita Sahoo
2017	J	`jnl`	An area-efficient and low-power 64-point pipeline Fast Fourier Transform for OFDM applications. Integr. Ganesh Kumar Ganjikunta, Subhendu Kumar Sahoo
2017	—	`conf`	Design of a High Performance Carry Generation Circuit for Ternary Full Adder Using CNTFET. iNIS Subhendu Kumar Sahoo, Gangishetty Akhilesh, Rasmita Sahoo
2017	—	`conf`	Lookup Table-Based Low-Power Implementation of Multi-channel Filters for Software Defined Radio. iNIS Subhendu Kumar Sahoo, Pramod Kumar Meher
2015	—	`conf`	Implementation of a high speed multiplier for high-performance and low power applications. VDAT G. Ganesh Kumar, Subhendu Kumar Sahoo
2010	J	`jnl`	A Novel Redundant Binary Number to Natural Binary Number Converter. J. Signal Process. Syst. Subhendu Kumar Sahoo, Anu Gupta, Abhijit R. Asati, Chandra Shekhar
2009	—	`conf`	A Novel Dynamic Current Boosting Technique for Enhancement of Settling Time and Elimination of Slewing of CMOS Amplifiers. ARTCom Ashutosh Mehra, Anu Gupta, Sharvil Patil, Abhishek Mehra, Subhendu Kumar Sahoo
2009	J	`jnl`	Dual channel addition based FFT processor architecture for signal and image processing. Int. J. High Perform. Syst. Archit. Subhendu Kumar Sahoo, Chandra Shekhar, Sudeepti Kodali, Abhijit R. Asati, Anu Gupta
2009	—	`conf`	Selection of Optimum Device Size and Trans-Conductance Ratio for High Speed Digital CMOS Inverter Design for a Given Fanout Load. ICETET Abhijit R. Asati, Subhendu Kumar Sahoo, Chandra Shekhar
2008	—	`conf`	A High-Speed Radix-64 Parallel Multiplier Using a Novel Hardware Implementation Approach for Partial Product Generation Based on Redundant Binary Arithmetic. ICETET Subhendu Kumar Sahoo, Abhijit Ashati, Rasmita Sahoo, Chandra Shekhar