Subhasis Banerjee

23 papers A 1B 2Misc 2Journal 4Unranked 13
YearRankTypeTitle / Venue / Authors
2025 — conf
Accelerating Temporal Triangle Counting and Betweenness Centrality on GPUs.
HPEC
Tuteja Trimansingh Parvindersingh, Venkata Kalyan Tavva, Subhasis Banerjee, Chiranjib Sur
2025 J jnl
Lightweight Session-Key Rekeying Framework for Secure IoT-Edge Communication.
CoRR
Haranath Rakshit, Rajkumar Bhandari, Subhasis Banerjee
2024 — conf
FNOPerf: A Robust Empirical Model for Predicting LLM Performance.
HIPCW
Mitali Sinha, Lalson Vincent, Mudit Sand, Subhasis Banerjee
2024 — conf
GPU Accelerated Construction of Time Respecting Data Structure for Temporal Graphs.
HPEC
Animan Naskar, Venkata Kalyan Tavva, Subhasis Banerjee
2024 — conf
HiPC 2024 WORKSHOP 3: 1st Workshop on AI for Scientific and General Purpose Computing (AI-SPC 2024).
HIPCW
Subhasis Banerjee, Pradeep Rao
2022 — conf
Performance Engineering for Deep Learning Adaptation of Seismic Processing Workflow.
COMAD/CODS
Subhasis Banerjee, Aniruddha Panda, Saurabh Chawdhary, Pandu Devarakota
2017 — conf
The interaction of last-level-cache mechanisms on modern processors.
MEMSYS
Rakhi Hemani, Subhasis Banerjee, Apala Guha
2016 — conf
Easy and expressive LLC contention model.
HPCS
Rakhi Hemani, Subhasis Banerjee, Apala Guha
2016 — conf
On the applicability of simple cache models for modern processors.
ICGHPC
Rakhi Hemani, Subhasis Banerjee, Apala Guha
2014 Misc conf
FlowMaster: Early Eviction of Dead Flow on SDN Switches.
ICDCN
Kalapriya Kannan, Subhasis Banerjee
2014 — conf
SARROD: SPARQL Analyzer and Reordering for Runtime Optimization on Big Data.
BDA
Nishtha Tripathi, Subhasis Banerjee
2014 B conf
Tag-In-Tag: Efficient flow table management in SDN switches.
CNSM
Subhasis Banerjee, Kalapriya Kannan
2013 Misc conf
Compact TCAM: Flow Entry Compaction in TCAM for Power Aware SDN.
ICDCN
Kalapriya Kannan, Subhasis Banerjee
2012 B conf
Scissors: Dealing with header redundancies in data centers through SDN.
CNSM
Kalapriya Kannan, Subhasis Banerjee
2008 J jnl
On the effectiveness of phase based regression models to trade power and performance using dynamic processor adaptation.
J. Syst. Archit.
Subhasis Banerjee, G. Surendra, S. K. Nandy
2007 — conf
Program Phase Directed Dynamic Cache Way Reconfiguration for Power Efficiency.
ASP-DAC
Subhasis Banerjee, G. Surendra, S. K. Nandy
2006 J jnl
Instruction Reuse in SPEC, media and packet processing benchmarks: A comparative study of power, performance and related microarchitectural optimizations.
J. Embed. Comput.
G. Surendra, Subhasis Banerjee, S. K. Nandy
2004 — conf
Exploiting program execution phases to trade power and performance for media workload.
ASP-DAC
Subhasis Banerjee, G. Surendra, S. K. Nandy
2004 — conf
On the effectiveness of prefetching and reuse in reducing L1 data cache traffic: a case study of Snort.
WMPI
G. Surendra, Subhasis Banerjee, S. K. Nandy
2004 — conf
Power-performance trade-off using pipeline delays.
ASP-DAC
G. Surendra, Subhasis Banerjee, S. K. Nandy
2003 — ch.
Enhancing Speedup in Network Processing Applications by Exploiting Instruction Reuse with Flow Aggregation.
Embedded Software for SoC
G. Surendra, Subhasis Banerjee, S. K. Nandy
2003 A conf
Enhancing Speedup in Network Processing Applications by Exploiting Instruction Reuse with Flow Aggregation.
DATE
G. Surendra, Subhasis Banerjee, S. K. Nandy
2003 J jnl
On the Effectiveness of Flow Aggregation in Improving Instruction Reuse in Network Processing Applications.
Int. J. Parallel Program.
G. Surendra, Subhasis Banerjee, S. K. Nandy