Stéphane Emery

20 papers A 3C 2Journal 4Unranked 11
YearRankTypeTitle / Venue / Authors
2025 C conf
A high-PSRR and low-noise CMOS-based reference with barrel shifting and notch filtering.
ISCAS
Amrith Sukumaran, Enrico Miotello, Chun-Min Zhang, Francesco Caruso, Paula Blanca Cruz, Stéphane Emery
2025 — conf
Multi-Electroanalytical Method Capable, Duty-Cycled, 0.36 mm
CICC
Amrith Sukumaran, Francesco Caruso, Régis Cattenoz, B. Putter, Jean-Luc Nagel, R. Ravanilla, I. Stergiou, G. Bouilly, P. Nussbaum, Stéphane Emery
2023 A conf
An Ultra-Low-Power Serial Implementation for Sigmoid and Tanh Using CORDIC Algorithm.
DATE
Yaoxing Chang, Petar Jokic, Stéphane Emery, Luca Benini
2022 J jnl
A Construction Kit for Efficient Low Power Neural Network Accelerator Designs.
ACM Trans. Embed. Comput. Syst.
Petar Jokic, Erfan Azarkhish, Andrea Bonetti, Marc Pons, Stéphane Emery, Luca Benini
2021 J jnl
A Construction Kit for Efficient Low Power Neural Network Accelerator Designs.
CoRR
Petar Jokic, Erfan Azarkhish, Andrea Bonetti, Marc Pons, Stéphane Emery, Luca Benini
2021 — conf
A Sub-mW Dual-Engine ML Inference System-on-Chip for Complete End-to-End Face-Analysis at the Edge.
VLSI Circuits
Petar Jokic, Erfan Azarkhish, Régis Cattenoz, Engin Türetken, Luca Benini, Stéphane Emery
2021 — conf
Battery-Less Face Recognition at the Extreme Edge.
NEWCAS
Petar Jokic, Stéphane Emery, Luca Benini
2021 C conf
Comparison of Capacitive DAC Architectures for Power and Area Efficient SAR ADC Designs.
ISCAS
Ankita Ahuja, Komail M. H. Badami, Cédric Barbelenet, Stéphane Emery
2021 J jnl
Improving Memory Utilization in Convolutional Neural Network Accelerators.
IEEE Embed. Syst. Lett.
Petar Jokic, Stéphane Emery, Luca Benini
2021 — conf
Single-Battery Cooperative Sensors For Multi-Lead Long Term Ambulatory ECG Measurement.
BioCAS
Komail M. H. Badami, Marc Pons Solé, Erfan Azarkhish, André Fivaz, Michaël Rapin, Olivier Chételat, Stéphane Emery
2021 — conf
Ultra-low-power Physical Activity Classifier for Wearables: From Generic MCUs to ASICs.
EMBC
Enric M. Calvo, Philippe Renevey, Mathieu Lemay, Andrea Bonetti, Marc Pons Solé, Régis Cattenoz, Stéphane Emery, Ricard Delgado-Gonzalo
2020 J jnl
Improving Memory Utilization in Convolutional Neural Network Accelerators.
CoRR
Petar Jokic, Stéphane Emery, Luca Benini
2019 — conf
A 0.5 V 2.5 μW/MHz Microcontroller with Analog-Assisted Adaptive Body Bias PVT Compensation with 3.13nW/kB SRAM Retention in 55nm Deeply-Depleted Channel CMOS.
CICC
Marc Pons, Christoph Thomas Müller, David Ruffieux, Jean-Luc Nagel, Stéphane Emery, Andreas Burg, Shuuji Tanahashi, Yoshitaka Tanaka, Atsushi Takeuchi
2019 — conf
A 20 Channel EMG SoC with an Integrated 32b RISC Core for Real-Time Wireless Prosthetic Control.
ESSCIRC
Marc Pons Solé, Andre Bischof, Lorenzo Bergamini, Philippe Dallemagne, Stéphane Emery, Komail M. H. Badami, Jiang Deng, Themistoklis Mavrogordatos, Erfan Azarkhish, Loïc Zahnd, Costantino Cosentino, Marcin K. Augustyniak, Yingyun Zha
2019 — conf
An Untrimmed PVT-Robust 12-bit 1-MS/s SAR ADC IP in 55nm Deeply Depleted Channel CMOS Process.
A-SSCC
Y. Zha, Loïc Zahnd, Jiang Deng, David Ruffieux, Komail M. H. Badami, T. Mavrogordatos, Y. Matsuo, Stéphane Emery
2019 A conf
Energy-Autonomous MCU Operating in sub-VT Regime with Tightly-Integrated Energy-Harvester : A SoC for IoT smart nodes containing a MCU with minimum-energy point of 2.9pJ/cycle and a harvester with output power range from sub-µW to 4.32mW.
ISLPED
Jian Deng, Jean-Luc Nagel, Loïc Zahnd, Marc Pons, David Ruffieux, Claude Arm, Pascal Persechini, Stéphane Emery
2019 — conf
Minimum Energy Point in Constant Frequency Designs under Adaptive Supply Voltage and Body Bias Adjustment in 55 nm DDC.
PRIME
Christoph Thomas Müller, Marc Pons, David Ruffieux, Jean-Luc Nagel, Stéphane Emery, Andreas Burg, Shuuji Tanahashi, Yoshitaka Tanaka, Atsushi Takeuchi
2018 — conf
BinaryEye: A 20 kfps Streaming Camera System on FPGA with Real-Time On-Device Image Recognition Using Binary Neural Networks.
SIES
Petar Jokic, Stéphane Emery, Luca Benini
2017 A conf
Ultra low power microelectronics for wearable and medical devices.
DATE
Pierre-François Rüedi, A. Bishof, Marcin K. Augustyniak, Pascal Persechini, Jean-Luc Nagel, Marc Pons, Stéphane Emery, Olivier Chételat
2016 — conf
Sub-threshold latch-based icyflex2 32-bit processor with wide supply range operation.
ESSCIRC
Marc Pons, Thanh-Chau Le, Claude Arm, Daniel Séverac, Jean-Luc Nagel, Marc-Nicolas Morgan, Stéphane Emery