Stéphane Donnay

61 papers A* 5A 13B 1C 1Journal 23Unranked 18

Year	Rank	Type	Title / Venue / Authors
2007	C	`conf`	Scalable Gate-Level Models for Power and Timing Analysis. ISCAS Mustafa Badaroglu, Geert Van der Plas, Piet Wambacq, Stéphane Donnay, Georges G. E. Gielen, Hugo De Man
2007	J	`jnl`	Simulation Methodology for Analysis of Substrate Noise Impact on Analog / RF Circuits Including Interconnect Resistance CoRR Charlotte Soens, Geert Van der Plas, Piet Wambacq, Stéphane Donnay
2006	—	`conf`	A 0.16pJ/Conversion-Step 2.5mW 1.25GS/s 4b ADC in a 90nm Digital CMOS Process. ISSCC Geert Van der Plas, Stefaan Decoutere, Stéphane Donnay
2006	J	`jnl`	Clock-skew-optimization methodology for substrate-noise reduction with supply-current folding. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Mustafa Badaroglu, Kris Tiri, Geert Van der Plas, Piet Wambacq, Ingrid Verbauwhede, Stéphane Donnay, Georges G. E. Gielen, Hugo De Man
2006	J	`jnl`	Evolution of substrate noise generation mechanisms with CMOS technology scaling. IEEE Trans. Circuits Syst. I Regul. Pap. Mustafa Badaroglu, Piet Wambacq, Geert Van der Plas, Stéphane Donnay, Georges G. E. Gielen, Hugo J. De Man
2006	J	`jnl`	Modeling of Substrate Noise Generation, Isolation, and Impact for an LC-VCO and a Digital Modem on a Lightly-Doped Substrate. IEEE J. Solid State Circuits Charlotte Soens, Geert Van der Plas, Mustafa Badaroglu, Piet Wambacq, Stéphane Donnay, Yves Rolain, Maarten Kuijk
2006	J	`jnl`	SWAN: high-level simulation methodology for digital substrate noise generation. IEEE Trans. Very Large Scale Integr. Syst. Mustafa Badaroglu, Geert Van der Plas, Piet Wambacq, Stéphane Donnay, Georges G. E. Gielen, Hugo De Man
2006	J	`jnl`	Technologies for highly miniaturized autonomous sensor networks. Microelectron. J. Kris Baert, Bert Gyselinckx, Tom Torfs, Vladimir Leonov, Refet Firat Yazicioglu, Steven Brebels, Stéphane Donnay, J. Vanfletern, M. Pastreen, Eric Beyne, Chris Van Hoof
2005	J	`jnl`	A 5-GHz fully integrated ESD-protected low-noise amplifier in 90-nm RF CMOS. IEEE J. Solid State Circuits Dimitri Linten, Steven Thijs, Mahadeva Iyer Natarajan, Piet Wambacq, Wutthinan Jeamsaksiri, Javier Ramos, Abdelkarim Mercha, Snezana Jenei, Stéphane Donnay, Stefaan Decoutere
2005	J	`jnl`	Compensation of IQ imbalance and phase noise in OFDM systems. IEEE Trans. Wirel. Commun. Jan Tubbax, Boris Come, Liesbet Van der Perre, Stéphane Donnay, Marc Engels, Hugo De Man, Marc Moonen
2005	J	`jnl`	Digital ground bounce reduction by supply current shaping and clock frequency Modulation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Mustafa Badaroglu, Piet Wambacq, Geert Van der Plas, Stéphane Donnay, Georges G. E. Gielen, Hugo De Man
2005	J	`jnl`	Low-power voltage-controlled oscillators in 90-nm CMOS using high-quality thin-film postprocessed inductors. IEEE J. Solid State Circuits Dimitri Linten, Xiao Sun, Geert Carchon, Wutthinan Jeamsaksiri, Abdelkarim Mercha, Javier Ramos, Snezana Jenei, Piet Wambacq, Morin Dehan, Lars Aspemyr, Andries J. Scholten, Stefaan Decoutere, Stéphane Donnay, Walter De Raedt
2005	J	`jnl`	Performance degradation of LC-tank VCOs by impact of digital switching noise in lightly doped substrates. IEEE J. Solid State Circuits Charlotte Soens, Geert Van der Plas, Piet Wambacq, Stéphane Donnay, Maarten Kuijk
2005	A	`conf`	Simulation Methodology for Analysis of Substrate Noise Impact on Analog / RF Circuits Including Interconnect Resistance. DATE Charlotte Soens, Geert Van der Plas, Piet Wambacq, Stéphane Donnay
2005	—	`conf`	Substrate noise immune design of an LC-tank VCO using sensitivity functions. CICC Charlotte Soens, Geert Van der Plas, Piet Wambacq, Stéphane Donnay
2005	—	`conf`	Ultra wide-band body area channel model. ICC Andrew Fort, Claude Desset, Julien Ryckaert, Philippe De Doncker, Leo Van Biesen, Stéphane Donnay
2005	J	`jnl`	Ultra-wide-band transmitter for low-power wireless body area networks: design and evaluation. IEEE Trans. Circuits Syst. I Regul. Pap. Julien Ryckaert, Claude Desset, Andrew Fort, Mustafa Badaroglu, Vincent De Heyn, Piet Wambacq, Geert Van der Plas, Stéphane Donnay, Bart van Poucke, Bert Gyselinckx
2004	—	`conf`	A 328 μW 5 GHz voltage-controlled oscillator in 90 nm CMOS with high-quality thin-film post-processed inductor. CICC Dimitri Linten, Xiao Sun, Geert Carchon, Wutthinan Jeamsaksiri, Abdelkarim Mercha, Javier Ramos, Snezana Jenei, Lars Aspemyr, Andries J. Scholten, Piet Wambacq, Stefaan Decoutere, Stéphane Donnay, Walter De Raedt
2004	—	`conf`	A 5 GHz fully integrated ESD-protected low-noise amplifier in 90 nm RF CMOS. ESSCIRC Dimitri Linten, Steven Thijs, Mahadeva Iyer Natarajan, Piet Wambacq, Wutthinan Jeamsaksiri, Javier Ramos, Abdelkarim Mercha, Snezana Jenei, Stéphane Donnay, Stefaan Decoutere
2004	—	`conf`	A harmonic quadrature LO generator using a 90° delay-locked loop [zero-IF transceiver applications]. ESSCIRC Jan Craninckx, Vincent Gravot, Stéphane Donnay
2004	—	`conf`	Compensation of transmitter IQ imbalance for OFDM systems. ICASSP (2) Jan Tubbax, Boris Come, Liesbet Van der Perre, Stéphane Donnay, Marc Moonen, Hugo De Man
2004	A	`conf`	Digital Ground Bounce Reduction by Phase Modulation of the Clock. DATE Mustafa Badaroglu, Piet Wambacq, Geert Van der Plas, Stéphane Donnay, Georges G. E. Gielen, Hugo De Man
2004	J	`jnl`	Digital circuit capacitance and switching analysis for ground bounce in ICs with a high-ohmic substrate. IEEE J. Solid State Circuits Mustafa Badaroglu, Geert Van der Plas, Piet Wambacq, Lakshmanan Balasubramanian, Kris Tiri, Ingrid Verbauwhede, Stéphane Donnay, Georges G. E. Gielen, Hugo J. De Man
2004	A	`conf`	Extended Subspace Identification of Improper Linear Systems. DATE Gerd Vandersteen, Rik Pintelon, Dimitri Linten, Stéphane Donnay
2004	A*	`conf`	High-level simulation of substrate noise in high-ohmic substrates with interconnect and supply effects. DAC Geert Van der Plas, Mustafa Badaroglu, Gerd Vandersteen, Petr Dobrovolný, Piet Wambacq, Stéphane Donnay, Georges G. E. Gielen, Hugo De Man
2004	—	`conf`	Impact of technology scaling on substrate noise generation mechanisms [mixed signal ICs]. CICC Mustafa Badaroglu, Piet Wambacq, Geert Van der Plas, Stéphane Donnay, Georges G. E. Gielen, Hugo De Man
2004	J	`jnl`	Joint compensation of IQ imbalance, frequency offset and phase noise in OFDM receivers. Eur. Trans. Telecommun. Jan Tubbax, Liesbet Van der Perre, Stéphane Donnay, Marc Engels, Marc Moonen, Hugo De Man
2004	—	`conf`	Performance degradation of an LC-tank VCO by impact of digital switching noise. ESSCIRC Charlotte Soens, Geert Van der Plas, Piet Wambacq, Stéphane Donnay
2003	A*	`conf`	4G terminals: how are we going to design them? DAC Jan Craninckx, Stéphane Donnay
2003	—	`conf`	A linear high voltage charge pump for MEMs applications in 0.18μm CMOS technology. ESSCIRC Manuel Innocent, Piet Wambacq, Stéphane Donnay, Willy Sansen, Hugo De Man
2003	J	`jnl`	An analytic Volterra-series-based model for a MEMS variable capacitor. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Manuel Innocent, Piet Wambacq, Stéphane Donnay, Harrie A. C. Tilmans, Willy M. C. Sansen, Hugo De Man
2003	A	`conf`	Analysis and White-Box Modeling of Weakly Nonlinear Time-Varying Circuits. DATE Petr Dobrovolný, Gerd Vandersteen, Piet Wambacq, Stéphane Donnay
2003	J	`jnl`	Analysis and compact behavioral modeling of nonlinear distortion in analog communication circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Petr Dobrovolný, Gerd Vandersteen, Piet Wambacq, Stéphane Donnay
2003	A	`conf`	Behavioral Modeling and Simulation of a Mixed Analog/Digital Automatic Gain Control Loop in a 5 GHz WLAN Receiver. DATE Wolfgang Eberle, Gerd Vandersteen, Piet Wambacq, Stéphane Donnay, Georges G. E. Gielen, Hugo De Man
2003	—	`conf`	Compensation of IQ imbalance in OFDM systems. ICC Jan Tubbax, Boris Come, Liesbet Van der Perre, Luc Deneire, Stéphane Donnay, Marc Engels
2003	—	`conf`	Digital circuit capacitance and switching analysis for ground bounce in ICs with a high-ohmic substrate. ESSCIRC Mustafa Badaroglu, Lakshmanan Balasubramanian, Kris Tiri, Vincent Gravot, Piet Wambacq, Geert Van der Plas, Stéphane Donnay, Georges G. E. Gielen, Hugo De Man
2003	B	`conf`	Joint compensation of IQ imbalance and frequency offset in OFDM systems. GLOBECOM Jan Tubbax, Andrew Fort, Liesbet Van der Perre, Stéphane Donnay, Marc Engels, Marc Moonen, Hugo De Man
2003	J	`jnl`	Modeling and experimental verification of substrate noise generation in a 220-Kgates WLAN system-on-chip with multiple supplies. IEEE J. Solid State Circuits Mustafa Badaroglu, Stéphane Donnay, Hugo J. De Man, Yann A. Zinzius, Georges G. E. Gielen, Willy Sansen, Tony Fondén, Svante Signell
2003	—	`conf`	Single-carrier communication using decision-feedback equalization for multiple antennas. ICC Jan Tubbax, Liesbet Van der Perre, Stéphane Donnay, Marc Engels
2002	A	`conf`	Analysis of Nonlinearities in RF Front-End Architectures Using a Modified Volterra Series Approach . DATE Michaël Goffioul, Piet Wambacq, Gerd Vandersteen, Stéphane Donnay
2002	A*	`conf`	Clock tree optimization in synchronous CMOS digital circuits for substrate noise reduction using folding of supply current transients. DAC Mustafa Badaroglu, Kris Tiri, Stéphane Donnay, Piet Wambacq, Hugo De Man, Ingrid Verbauwhede, Georges G. E. Gielen
2002	A	`conf`	High-Frequency Nonlinear Amplifier Model for the Efficient Evaluation of Inband Distortion Under Nonlinear Load-Pull Conditions. DATE Gerd Vandersteen, Piet Wambacq, Stéphane Donnay, Frans Verbeyst
2002	J	`jnl`	Methodology and experimental verification for substrate noise reduction in CMOS mixed-signal ICs with synchronous digital circuits. IEEE J. Solid State Circuits Mustafa Badaroglu, Marc van Heijningen, Vincent Gravot, John Compiet, Stéphane Donnay, Georges G. E. Gielen, Hugo J. De Man
2002	J	`jnl`	Substrate noise generation in complex digital systems: efficient modeling and simulation methodology and experimental verification. IEEE J. Solid State Circuits Marc van Heijningen, Mustafa Badaroglu, Stéphane Donnay, Georges G. E. Gielen, Hugo J. De Man
2001	J	`jnl`	A Mixed-Signal Design Roadmap. IEEE Des. Test Comput. Ralf Brederlow, Werner Weber, Joseph Sauerer, Stéphane Donnay, Piet Wambacq, Maarten Vertregt
2001	A	`conf`	Efficient bit-error-rate estimation of multicarrier transceivers. DATE Gerd Vandersteen, Piet Wambacq, Yves Rolain, Johan Schoukens, Stéphane Donnay, Marc Engels, Ivo Bolsens
2001	A	`conf`	High-level simulation of substrate noise generation from large digital circuits with multiple supplies. DATE Mustafa Badaroglu, Marc van Heijningen, Vincent Gravot, Stéphane Donnay, Hugo De Man, Georges G. E. Gielen, Marc Engels, Ivo Bolsens
2001	—	`conf`	OFDM versus Single Carrier with Cyclic Prefix: a system-based comparison. VTC Fall Jan Tubbax, Boris Come, Liesbet Van der Perre, Luc Deneire, Stéphane Donnay, Marc Engels
2000	A*	`conf`	A methodology for efficient high-level dataflow simulation of mixed-signal front-ends of digital telecom transceivers. DAC Gerd Vandersteen, Piet Wambacq, Yves Rolain, Petr Dobrovolný, Stéphane Donnay, Marc Engels, Ivo Bolsens
2000	J	`jnl`	Analysis and experimental verification of digital substrate noise generation for epi-type substrates. IEEE J. Solid State Circuits Marc van Heijningen, John Compiet, Piet Wambacq, Stéphane Donnay, Marc Engels, Ivo Bolsens
2000	J	`jnl`	Chip-package codesign of a low-power 5-GHz RF front end. Proc. IEEE Stéphane Donnay, Philip Pieters, Kristof Vaesen, Wim Diels, Piet Wambacq, Walter De Raedt, Eric Beyne, Marc Engels, Ivo Bolsens
2000	A	`conf`	Compact Modeling of Nonlinear Distortion in Analog Communication Circuits. DATE Piet Wambacq, Petr Dobrovolný, Stéphane Donnay, Marc Engels, Ivo Bolsens
2000	A*	`conf`	High-level simulation of substrate noise generation including power supply noise coupling. DAC Marc van Heijningen, Mustafa Badaroglu, Stéphane Donnay, Marc Engels, Ivo Bolsens
1999	A	`conf`	A Single-Package Solution for Wireless Transceivers. DATE Piet Wambacq, Stéphane Donnay, Hocine Ziad, Marc Engels, Hugo De Man, Ivo Bolsens
1999	—	`conf`	BANDIT: embedding analog-to-digital converters on digital telecom ASICs. ICECS Stéphane Donnay, Marc van Heijningen, Mustafa Badaroglu, Wim Diels, Marc Engels, Ivo Bolsens, Yann A. Zinzius, Georges G. E. Gielen, Willy Sansen, Tony Fondén, Svante Signell
1999	—	`conf`	High-level simulation and power modelling of mixed-signal front-ends for digital telecommunications. ICECS Piet Wambacq, Gerd Vandersteen, Stéphane Donnay, Marc Engels, Ivo Bolsens, Erik Lauwers, Piet Vanassche, Georges G. E. Gielen
1998	A	`conf`	Hierarchical Top-Down Design of Analog Sensor Interfaces: From System-Level Specifications Down to Silicon. DATE Jan Vandenbussche, Stéphane Donnay, Francky Leyn, Georges G. E. Gielen, Willy M. C. Sansen
1998	J	`jnl`	High-Level Power Minimization of Analog Sensor Interface Architectures. Integr. Comput. Aided Eng. Stéphane Donnay, Georges G. E. Gielen, Willy M. C. Sansen
1997	—	`conf`	High-level synthesis of analog sensor interface front-ends. ED&TC Stéphane Donnay, Georges G. E. Gielen, Willy M. C. Sansen, Wim Kruiskamp, Domine Leenaerts, W. van Bokhoven
1995	A	`conf`	A high-level design and optimization tool for analog RF receiver front-ends. ICCAD Jan Crols, Stéphane Donnay, Michiel Steyaert, Georges G. E. Gielen
1994	—	`conf`	A Methodology for Analog Design Automation in Mixed-Signal ASICs. EDAC-ETC-EUROASIC Stéphane Donnay, Koen Swings, Georges G. E. Gielen, Willy M. C. Sansen, Wim Kruiskamp, Domine Leenaerts