Steve Dai - RankMe

45 papers A* 8A 10Misc 3Journal 18Unranked 6

Year	Rank	Type	Title / Venue / Authors
2026	—	`conf`	31.9 Alpha-Vision: A Real-Time Always-on Vision Processor with 787µs Face Detection Latency in <5mW. ISSCC Ben Keller, Rangharajan Venkatesan, Steve Dai, Jason Clemons, Matthew Fojtik, Muya Chang, Thierry Tambe, Nathaniel Ross Pinckney, Stephen G. Tell, Qijing Huang, Shalini De Mello, Brucek Khailany
2026	J	`jnl`	GaloisSAT: Differentiable Boolean Satisfiability Solving via Finite Field Algebra. CoRR Curie Kim, Carsten Portner, Mingju Liu, Steve Dai, Haoxing Ren, Brucek Khailany, Alvaro Velasquez, Ismail Alkhouri, Cunxi Yu
2025	J	`jnl`	GalaxyDiT: Efficient Video Generation with Guidance Alignment and Adaptive Proxy in Diffusion Transformers. CoRR Zhiye Song, Steve Dai, Ben Keller, Brucek Khailany
2025	A*	`conf`	SQ-DM: Accelerating Diffusion Models with Aggressive Quantization and Temporal Sparsity. DAC Zichen Fan, Steve Dai, Rangharajan Venkatesan, Dennis Sylvester, Brucek Khailany
2025	J	`jnl`	SQ-DM: Accelerating Diffusion Models with Aggressive Quantization and Temporal Sparsity. CoRR Zichen Fan, Steve Dai, Rangharajan Venkatesan, Dennis Sylvester, Brucek Khailany
2025	J	`jnl`	TurboSAT: Gradient-Guided Boolean Satisfiability Accelerated on GPU-CPU Hybrid System. CoRR Steve Dai, Cunxi Yu, Kalyan Krishnamani, Brucek Khailany
2024	J	`jnl`	Survey of Machine Learning for Software-assisted Hardware Design Verification: Past, Present, and Prospect. ACM Trans. Design Autom. Electr. Syst. Nan Wu, Yingjie Li, Hang Yang, Hanqiu Chen, Steve Dai, Cong Hao, Cunxi Yu, Yuan Xie
2023	J	`jnl`	A 95.6-TOPS/W Deep Learning Inference Accelerator With Per-Vector Scaled 4-bit Quantization in 5 nm. IEEE J. Solid State Circuits Ben Keller, Rangharajan Venkatesan, Steve Dai, Stephen G. Tell, Brian Zimmer, Charbel Sakr, William J. Dally, C. Thomas Gray, Brucek Khailany
2023	A*	`conf`	Efficient Transformer Inference with Statically Structured Sparse Attention. DAC Steve Dai, Hasan Genc, Rangharajan Venkatesan, Brucek Khailany
2023	A*	`conf`	Gamora: Graph Learning based Symbolic Reasoning for Large-Scale Boolean Networks. DAC Nan Wu, Yingjie Li, Cong Hao, Steve Dai, Cunxi Yu, Yuan Xie
2023	J	`jnl`	Gamora: Graph Learning based Symbolic Reasoning for Large-Scale Boolean Networks. CoRR Nan Wu, Yingjie Li, Cong Hao, Steve Dai, Cunxi Yu, Yuan Xie
2022	—	`conf`	A 17-95.6 TOPS/W Deep Learning Inference Accelerator with Per-Vector Scaled 4-bit Quantization for Transformers in 5nm. VLSI Technology and Circuits Ben Keller, Rangharajan Venkatesan, Steve Dai, Stephen G. Tell, Brian Zimmer, William J. Dally, C. Thomas Gray, Brucek Khailany
2022	J	`jnl`	LNS-Madam: Low-Precision Training in Logarithmic Number System Using Multiplicative Weight Update. IEEE Trans. Computers Jiawei Zhao, Steve Dai, Rangharajan Venkatesan, Brian Zimmer, Mustafa Fayez Ali, Ming-Yu Liu, Brucek Khailany, William J. Dally, Anima Anandkumar
2022	A*	`conf`	Optimal Clipping and Magnitude-aware Differentiation for Improved Quantization-aware Training. ICML Charbel Sakr, Steve Dai, Rangharajan Venkatesan, Brian Zimmer, William J. Dally, Brucek Khailany
2022	J	`jnl`	Optimal Clipping and Magnitude-aware Differentiation for Improved Quantization-aware Training. CoRR Charbel Sakr, Steve Dai, Rangharajan Venkatesan, Brian Zimmer, William J. Dally, Brucek Khailany
2021	Misc	`conf`	Clockwork: Resource-Efficient Static Scheduling for Multi-Rate Image Processing Applications on FPGAs. FCCM Dillon Huff, Steve Dai, Pat Hanrahan
2021	A	`conf`	Clockwork: Resource-Efficient Static Scheduling for Multi-Rate Image Processing Applications on FPGAs. FPGA Dillon Huff, Steve Dai, Pat Hanrahan
2021	J	`jnl`	Low-Precision Training in Logarithmic Number System using Multiplicative Weight Update. CoRR Jiawei Zhao, Steve Dai, Rangharajan Venkatesan, Ming-Yu Liu, Brucek Khailany, Bill Dally, Anima Anandkumar
2021	A*	`conf`	Softermax: Hardware/Software Co-Design of an Efficient Softmax for Transformers. DAC Jacob R. Stevens, Rangharajan Venkatesan, Steve Dai, Brucek Khailany, Anand Raghunathan
2021	J	`jnl`	Softermax: Hardware/Software Co-Design of an Efficient Softmax for Transformers. CoRR Jacob R. Stevens, Rangharajan Venkatesan, Steve Dai, Brucek Khailany, Anand Raghunathan
2021	—	`conf`	VS-Quant: Per-vector Scaled Quantization for Accurate Low-Precision Neural Network Inference. MLSys Steve Dai, Rangharajan Venkatesan, Mark Ren, Brian Zimmer, William J. Dally, Brucek Khailany
2021	J	`jnl`	VS-Quant: Per-vector Scaled Quantization for Accurate Low-Precision Neural Network Inference. CoRR Steve Dai, Rangharajan Venkatesan, Haoxing Ren, Brian Zimmer, William J. Dally, Brucek Khailany
2021	J	`jnl`	Verifying High-Level Latency-Insensitive Designs with Formal Model Checking. CoRR Steve Dai, Alicia Klinefelter, Haoxing Ren, Rangharajan Venkatesan, Ben Keller, Nathaniel Ross Pinckney, Brucek Khailany
2020	J	`jnl`	Accelerating Chip Design With Machine Learning. IEEE Micro Brucek Khailany, Haoxing Ren, Steve Dai, Saad Godil, Ben Keller, Robert Kirby, Alicia Klinefelter, Rangharajan Venkatesan, Yanqing Zhang, Bryan Catanzaro, William J. Dally
2019	—	`conf`	A 1.4 GHz 695 Giga Risc-V Inst/s 496-Core Manycore Processor With Mesh On-Chip Network and an All-Digital Synthesized PLL in 16nm CMOS. VLSI Circuits Austin Rovinski, Chun Zhao, Khalid Al-Hawaj, Paul Gao, Shaolin Xie, Christopher Torng, Scott Davidson, Aporva Amarnath, Luis Vega, Bandhav Veluri, Anuj Rao, Tutu Ajayi, Julian Puscar, Steve Dai, Ritchie Zhao, Dustin Richmond, Zhiru Zhang, Ian Galton, Christopher Batten, Michael B. Taylor, Ronald G. Dreslinski
2019	A*	`conf`	Improving Scalability of Exact Modulo Scheduling with Specialized Conflict-Driven Learning. DAC Steve Dai, Zhiru Zhang
2019	A	`conf`	MAGNet: A Modular Accelerator Generator for Neural Networks. ICCAD Rangharajan Venkatesan, Yakun Sophia Shao, Miaorong Wang, Jason Clemons, Steve Dai, Matthew Fojtik, Ben Keller, Alicia Klinefelter, Nathaniel Ross Pinckney, Priyanka Raina, Yanqing Zhang, Brian Zimmer, William J. Dally, Joel S. Emer, Stephen W. Keckler, Brucek Khailany
2018	A	`conf`	A Scalable Approach to Exact Resource-Constrained Scheduling Based on a Joint SDC and SAT Formulation. FPGA Steve Dai, Gai Liu, Zhiru Zhang
2018	Misc	`conf`	Fast and Accurate Estimation of Quality of Results in High-Level Synthesis with Machine Learning. FCCM Steve Dai, Yuan Zhou, Hang Zhang, Ecenur Ustun, Evangeline F. Y. Young, Zhiru Zhang
2018	A	`conf`	High-level synthesis with timing-sensitive information flow enforcement. ICCAD Zhenghong Jiang, Steve Dai, G. Edward Suh, Zhiru Zhang
2018	A	`conf`	Rosetta: A Realistic High-Level Synthesis Benchmark Suite for Software Programmable FPGAs. FPGA Yuan Zhou, Udit Gupta, Steve Dai, Ritchie Zhao, Nitish Kumar Srivastava, Hanchen Jin, Joseph Featherston, Yi-Hsiang Lai, Gai Liu, Gustavo Angarita Velasquez, Wenping Wang, Zhiru Zhang
2018	J	`jnl`	The Celerity Open-Source 511-Core RISC-V Tiered Accelerator Fabric: Fast Architectures and Design Methodologies for Fast Chips. IEEE Micro Scott Davidson, Shaolin Xie, Christopher Torng, Khalid Al-Hawaj, Austin Rovinski, Tutu Ajayi, Luis Vega, Chun Zhao, Ritchie Zhao, Steve Dai, Aporva Amarnath, Bandhav Veluri, Paul Gao, Anuj Rao, Gai Liu, Rajesh K. Gupta, Zhiru Zhang, Ronald G. Dreslinski, Christopher Batten, Michael B. Taylor
2017	A	`conf`	Accelerating Face Detection on Programmable SoC Using C-Based Synthesis. FPGA Nitish Kumar Srivastava, Steve Dai, Rajit Manohar, Zhiru Zhang
2017	J	`jnl`	Architecture and Synthesis for Area-Efficient Pipelining of Irregular Loop Nests. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Gai Liu, Mingxing Tan, Steve Dai, Ritchie Zhao, Zhiru Zhang
2017	A	`conf`	Dynamic Hazard Resolution for Pipelining Irregular Loops in High-Level Synthesis. FPGA Steve Dai, Ritchie Zhao, Gai Liu, Shreesha Srinath, Udit Gupta, Christopher Batten, Zhiru Zhang
2017	Misc	`conf`	Enabling adaptive loop pipelining in high-level synthesis. ACSSC Steve Dai, Gai Liu, Ritchie Zhao, Zhiru Zhang
2015	A*	`conf`	Area-efficient pipelining for FPGA-targeted high-level synthesis. DAC Ritchie Zhao, Mingxing Tan, Steve Dai, Zhiru Zhang
2015	A	`conf`	ElasticFlow: A Complexity-Effective Approach for Pipelining Irregular Loop Nests. ICCAD Mingxing Tan, Gai Liu, Ritchie Zhao, Steve Dai, Zhiru Zhang
2015	J	`jnl`	High-level Synthesis for Low-power Design. IPSJ Trans. Syst. LSI Des. Methodol. Zhiru Zhang, Deming Chen, Steve Dai, Keith A. Campbell
2015	A	`conf`	Mapping-Aware Constrained Scheduling for LUT-Based FPGAs. FPGA Mingxing Tan, Steve Dai, Udit Gupta, Zhiru Zhang
2014	A*	`conf`	Flushing-Enabled Loop Pipelining for High-Level Synthesis. DAC Steve Dai, Mingxing Tan, Kecheng Hao, Zhiru Zhang
2014	A	`conf`	Multithreaded pipeline synthesis for data-parallel kernels. ICCAD Mingxing Tan, Bin Liu, Steve Dai, Zhiru Zhang
2013	—	`conf`	Design, simulation, and evaluation of imaging oximeters. Digital Photography Steve Dai, Ye Tian, Joyce E. Farrell
2011	J	`jnl`	Design and Evaluation of Identifiable Key-Click Signals for Mobile Devices. IEEE Trans. Haptics Hsiang-Yu Chen, Jaeyoung Park, Steve Dai, Hong Z. Tan
2010	—	`conf`	Redundant coding of simulated tactile key clicks with audio signals. HAPTICS Hsiang-Yu Chen, Jaeyoung Park, Hong Z. Tan, Steve Dai