Stephen Y. H. Su

51 papers A* 9A 8B 1Misc 2Journal 27Unranked 4

Year	Rank	Type	Title / Venue / Authors
1997	Misc	`conf`	Fault-Tolerant Array Processors Via Reconfiguration of Two-Level Redundancy Arrays. PDPTA Stephen Y. H. Su, Rong Yao
1991	Misc	`conf`	Distributed self-diagnosis of VLSI mesh array processors. VTS Michal Cutler, Stephen Y. H. Su, Mingshien Wang
1991	J	`jnl`	Self-Diagnosis of Faelures in VLSI Tree Array Processors. IEEE Trans. Computers Stephen Y. H. Su, Michal Cutler, Mingshien Wang
1989	J	`jnl`	Reconfiguration of VLSI/WSI Mesh Array Processors with Two-Level Redundancy. IEEE Trans. Computers Mingshien Wang, Michal Cutler, Stephen Y. H. Su
1988	J	`jnl`	A Functional Testing Method for Microprocessors. IEEE Trans. Computers Li Shen, Stephen Y. H. Su
1988	A	`conf`	Designs for Diagnosability and Reliability in VLSI Systems. ITC Stephen Y. H. Su, Hede Ma
1988	A	`conf`	Fault Isolation in Grey Systems. ITC Stephen Y. H. Su, Hede Ma
1986	J	`jnl`	Analysis of a Class of Recovery Procedures. IEEE Trans. Computers Israel Koren, Zahava Koren, Stephen Y. H. Su
1985	J	`jnl`	Detecting I/O and Internal Feedback Bridging Faults. IEEE Trans. Computers Shiyi Xu, Stephen Y. H. Su
1985	J	`jnl`	The S-Algorithm: A Promising Solution for Systematic Functional Test Generation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Tonysheng Lin, Stephen Y. H. Su
1985	A	`conf`	VLSI Functional Test Pattern Generation: A Design and Implementation. ITC Tonysheng Lin, Stephen Y. H. Su
1984	A	`conf`	Functional Test Generation of Digital LSI/VLSI Systems Using Machine Symbolic Execution Technique. ITC Tonysheng Lin, Stephen Y. H. Su
1984	A*	`conf`	Functional testing techniques for digital LSI/VLSI systems. DAC Stephen Y. H. Su, Tonysheng Lin
1984	—	`conf`	IDAS: an integrated design automation system. AFIPS National Computer Conference Stephen Y. H. Su
1984	—	`conf`	VLSI functional testing using critical path traces at hardware description language level. Fehlertolerierende Rechensysteme Li Shen, Stephen Y. H. Su
1983	A	`conf`	A Simplified Algorithm for Testing Microprocessors. ITC Kewal K. Saluja, Li Shen, Stephen Y. H. Su
1982	A	`conf`	A New Fault Model and Testing Technique for CMOS Devices. ITC Yashwant K. Malaiya, Stephen Y. H. Su
1982	J	`jnl`	Fault Diagnosis of MOS Combinational Networks. IEEE Trans. Computers Yacoub M. El-Ziq, Stephen Y. H. Su
1982	A*	`conf`	Testing functional faults in VLSI. DAC Yinghua Min, Stephen Y. H. Su
1981	J	`jnl`	Reliability Measure of Hardware Redundancy Fault-Tolerant Digital Systems with Intermittent Faults. IEEE Trans. Computers Yashwant K. Malaiya, Stephen Y. H. Su
1981	A	`conf`	State Diagram Approach for Functional Testing of Control Section. ITC Chi-Chang Liaw, Stephen Y. H. Su, Yashwant K. Malaiya
1981	J	`jnl`	Test-Experiments for Detection and Location of Intermittent Faults in Sequential Circuits. IEEE Trans. Computers Chi-Chang Liaw, Stephen Y. H. Su, Yashwant K. Malaiya
1981	A	`conf`	Testing Functional Faults in Digital Systems Described by Register Transfer Language. ITC Stephen Y. H. Su, Yu-I Hsieh
1980	J	`jnl`	A Hardware Redundancy Reconfiguration Scheme for Tolerating Multiple Module Failures. IEEE Trans. Computers Stephen Y. H. Su, Edgar DuCasse
1980	A*	`conf`	Detecting bridging and stuck-at faults at input and output pins of standard digital components. DAC Mark G. Karpovsky, Stephen Y. H. Su
1980	J	`jnl`	Detection and Location of Input and Feedback Bridging Faults Among Input and Output Lines. IEEE Trans. Computers Mark G. Karpovsky, Stephen Y. H. Su
1979	—	`conf`	A survey of methods for intermittent fault analysis. MARK Yashwant K. Malaiya, Stephen Y. H. Su
1979	J	`jnl`	Reliability Analysis of IEEE Trans. Computers Israel Koren, Stephen Y. H. Su
1978	J	`jnl`	A Continous-Parameter Markov Model and Detection Procedures for Intermittent Faults. IEEE Trans. Computers Stephen Y. H. Su, Israel Koren, Yashwant K. Malaiya
1978	B	`conf`	A scheme for tolerating faulty data in real-time systems. COMPSAC John G. Yee, Stephen Y. H. Su
1978	J	`jnl`	Computer-Aided Logic Design of Two-Level MOS Combinational Networks with Statistical Results. IEEE Trans. Computers Yacoub M. El-Ziq, Stephen Y. H. Su
1977	—	`conf`	An overview of fault-tolerant digital system architecture. AFIPS National Computer Conference Stephen Y. H. Su, Richard J. Spillman
1977	J	`jnl`	Detection of Single, Stuck-Type Faulures in Multivalued Combinational Networks. IEEE Trans. Computers Richard J. Spillman, Stephen Y. H. Su
1977	J	`jnl`	Hardware Description Language Applications: An Introdiction and Prognosis. Computer Stephen Y. H. Su
1977	A*	`conf`	Logic design automation of diagnosable MOS combinational logic networks. DAC Yacoub M. El-Ziq, Stephen Y. H. Su
1976	J	`jnl`	Identification of Multiple Stuck-Type Faults in Combinational Networks. IEEE Trans. Computers Melvin A. Breuer, Shih-Jeh Chang, Stephen Y. H. Su
1975	J	`jnl`	An introduction to CHDL (computer hardware description languages). SIGARCH Comput. Archit. News Stephen Y. H. Su
1974	J	`jnl`	A survey of computer hardware description languages in the U.S.A. Computer Stephen Y. H. Su
1974	J	`jnl`	Book review of Logic and logic design by B. Girling and H. G. Morning. International Textbook Company Limited 1973. SIGARCH Comput. Archit. News Stephen Y. H. Su
1974	A*	`conf`	Speculation on the future of design automation. DAC Stephen Y. H. Su
1973	A*	`conf`	An interactive design automation system. DAC Stephen Y. H. Su
1973	J	`jnl`	B73-12 Fault Detection in Digital Circuits. IEEE Trans. Computers Stephen Y. H. Su
1973	J	`jnl`	Review of "Asynchronous Sequential Switching Circuits" by S. H. Unger. IEEE Trans. Syst. Man Cybern. Stephen Y. H. Su
1973	J	`jnl`	Review of "Fault Diagnosis of Digital Systems" by H. Y. Chang, E. G. Manning, and G. Metze. IEEE Trans. Syst. Man Cybern. Stephen Y. H. Su
1972	J	`jnl`	A New Approach to the Fault Location of Combinational Circuits. IEEE Trans. Computers Stephen Y. H. Su, Yun-Chung Cho
1972	J	`jnl`	Computer Minimization of Multivalued Switching Functions. IEEE Trans. Computers Stephen Y. H. Su, Peter T. Cheung
1972	J	`jnl`	The Relationship Between Multivalued Switching Algebra and Boolean Algebra Under Different Definitions of Complement. IEEE Trans. Computers Stephen Y. H. Su, Achilles A. Sarris
1971	A*	`conf`	A digital system modeling philosophy and design language. DAC Mehmet Baray, Stephen Y. H. Su
1971	A*	`conf`	A system modeling language translator. DAC Stephen Y. H. Su, Mehmet Baray, Robert L. Carberry
1971	J	`jnl`	Computer-Aided Synthesis or Multiple-Output Multilevel NAND Networks witk Fan-in and Fan-out Constraints. IEEE Trans. Computers Stephen Y. H. Su, Chong-Woo Nam
1971	A*	`conf`	The structure and operation of a design language compatible simulator. DAC Mehmet Baray, Stephen Y. H. Su, Robert L. Carberry