Stephen W. Keckler

184 papers A* 61A 19B 9C 11Journal 60Unranked 20

Year	Rank	Type	Title / Venue / Authors
2025	—	`conf`	Enabling Unstructured Sparse Acceleration on Structured Sparse Accelerators. MLSys Geonhwa Jeong, Po-An Tsai, Abhimanyu Rajeshkumar Bambhaniya, Stephen W. Keckler, Tushar Krishna
2025	J	`jnl`	GPUArmor: A Hardware-Software Co-design for Efficient and Scalable Memory Safety on GPUs. CoRR Mohamed Tarek Ibn Ziad, Sana Damani, Mark Stephenson, Stephen W. Keckler, Aamer Jaleel
2025	J	`jnl`	Kitsune: Enabling Dataflow Execution on GPUs. CoRR Michael Davies, Neal Clayton Crago, Karthikeyan Sankaralingam, Stephen W. Keckler
2025	J	`jnl`	The TRIPS Project. Commun. ACM Doug Burger, Stephen W. Keckler, Kathryn S. McKinley
2025	J	`jnl`	Understanding Error Propagation in Deep-Learning Neural Networks' Accelerators and Applications. IEEE Des. Test Guanpeng Li, Siva Kumar Sastry Hari, Michael B. Sullivan, Timothy Tsai, Karthik Pattabiraman, Joel S. Emer, Stephen W. Keckler
2024	J	`jnl`	Abstracting Sparse DNN Acceleration via Structured Sparse Tensor Decomposition. CoRR Geonhwa Jeong, Po-An Tsai, Abhimanyu Rajeshkumar Bambhaniya, Stephen W. Keckler, Tushar Krishna
2024	A*	`conf`	PrIDE: Achieving Secure Rowhammer Mitigation with Low-Cost In-DRAM Trackers. ISCA Aamer Jaleel, Gururaj Saileshwar, Stephen W. Keckler, Moinuddin K. Qureshi
2024	J	`jnl`	Probabilistic Tracker Management Policies for Low-Cost and Scalable Rowhammer Mitigation. CoRR Aamer Jaleel, Stephen W. Keckler, Gururaj Saileshwar
2024	J	`jnl`	SDQ: Sparse Decomposed Quantization for LLM Inference. CoRR Geonhwa Jeong, Po-An Tsai, Stephen W. Keckler, Tushar Krishna
2024	B	`conf`	Vision Transformer Computation and Resilience for Dynamic Inference. ISPASS Kavya Sreedhar, Jason Clemons, Rangharajan Venkatesan, Stephen W. Keckler, Mark Horowitz
2024	A*	`conf`	WASP: Exploiting GPU Pipeline Parallelism with Hardware-Accelerated Automatic Warp Specialization. HPCA Neal Clayton Crago, Sana Damani, Karthikeyan Sankaralingam, Stephen W. Keckler
2023	C	`conf`	Augmenting Legacy Networks for Flexible Inference. IV Jason Clemons, Iuri Frosio, Maying Shen, José M. Álvarez, Stephen W. Keckler
2023	B	`conf`	Community-based Matrix Reordering for Sparse Linear Algebra Optimization. ISPASS Vignesh Balaji, Neal Clayton Crago, Aamer Jaleel, Stephen W. Keckler
2023	A*	`conf`	Implicit Memory Tagging: No-Overhead Memory Safety Using Alias-Free Tagged ECC. ISCA Michael B. Sullivan, Mohamed Tarek Ibn Ziad, Aamer Jaleel, Stephen W. Keckler
2023	J	`jnl`	Symphony: Orchestrating Sparse and Dense Tensors with Hierarchical Heterogeneous Processing. ACM Trans. Comput. Syst. Michael Pellauer, Jason Clemons, Vignesh Balaji, Neal Clayton Crago, Aamer Jaleel, Donghyuk Lee, Mike O'Connor, Anghsuman Parashar, Sean Treichler, Po-An Tsai, Stephen W. Keckler, Joel S. Emer
2023	A	`conf`	VaPr: Variable-Precision Tensors to Accelerate Robot Motion Planning. IROS Yu-Shun Hsiao, Siva Kumar Sastry Hari, Balakumar Sundaralingam, Jason Yik, Thierry Tambe, Charbel Sakr, Stephen W. Keckler, Vijay Janapa Reddi
2023	J	`jnl`	VaPr: Variable-Precision Tensors to Accelerate Robot Motion Planning. CoRR Yu-Shun Hsiao, Siva Kumar Sastry Hari, Balakumar Sundaralingam, Jason Yik, Thierry Tambe, Charbel Sakr, Stephen W. Keckler, Vijay Janapa Reddi
2023	J	`jnl`	cuCatch: A Debugging Tool for Efficiently Catching Memory Safety Violations in CUDA Applications. Proc. ACM Program. Lang. Mohamed Tarek Ibn Ziad, Sana Damani, Aamer Jaleel, Stephen W. Keckler, Mark Stephenson
2022	—	`conf`	Augmenting Legacy Networks for Flexible Inference. ECCV Workshops (7) Jason Clemons, Iuri Frosio, Maying Shen, José M. Álvarez, Stephen W. Keckler
2022	J	`jnl`	Characterizing and Mitigating Soft Errors in GPU DRAM. IEEE Micro Michael B. Sullivan, Nirmal R. Saxena, Mike O'Connor, Donghyuk Lee, Paul Racunas, Saurabh Hukerikar, Timothy Tsai, Siva Kumar Sastry Hari, Stephen W. Keckler
2022	J	`jnl`	Enabling and Accelerating Dynamic Vision Transformer Inference for Real-Time Applications. CoRR Kavya Sreedhar, Jason Clemons, Rangharajan Venkatesan, Stephen W. Keckler, Mark Horowitz
2022	A	`conf`	Exploiting Temporal Data Diversity for Detecting Safety-critical Faults in AV Compute Systems. DSN Saurabh Jha, Shengkun Cui, Timothy Tsai, Siva Kumar Sastry Hari, Michael B. Sullivan, Zbigniew T. Kalbarczyk, Stephen W. Keckler, Ravishankar K. Iyer
2022	J	`jnl`	GPU Domain Specialization via Composable On-Package Architecture. ACM Trans. Archit. Code Optim. Yaosheng Fu, Evgeny Bolotin, Niladrish Chatterjee, David W. Nellans, Stephen W. Keckler
2022	A*	`conf`	GPU Subwarp Interleaving. HPCA Sana Damani, Mark Stephenson, Ram Rangan, Daniel R. Johnson, Rishkul Kulkami, Stephen W. Keckler
2022	J	`jnl`	Making Convolutions Resilient Via Algorithm-Based Error Detection Techniques. IEEE Trans. Dependable Secur. Comput. Siva Kumar Sastry Hari, Michael B. Sullivan, Timothy Tsai, Stephen W. Keckler
2022	A*	`conf`	Saving PAM4 Bus Energy with SMOREs: Sparse Multi-level Opportunistic Restricted Encodings. HPCA Mike O'Connor, Donghyuk Lee, Niladrish Chatterjee, Michael B. Sullivan, Stephen W. Keckler
2022	J	`jnl`	Zhuyi: Perception Processing Rate Estimation for Safety in Autonomous Vehicles. CoRR Yu-Shun Hsiao, Siva Kumar Sastry Hari, Michal Filipiuk, Timothy Tsai, Michael B. Sullivan, Vijay Janapa Reddi, Vasu Singh, Stephen W. Keckler
2022	A*	`conf`	Zhuyi: perception processing rate estimation for safety in autonomous vehicles. DAC Yu-Shun Hsiao, Siva Kumar Sastry Hari, Michal Filipiuk, Timothy Tsai, Michael B. Sullivan, Vijay Janapa Reddi, Vasu Singh, Stephen W. Keckler
2021	A*	`conf`	Characterizing and Mitigating Soft Errors in GPU DRAM. MICRO Michael B. Sullivan, Nirmal R. Saxena, Mike O'Connor, Donghyuk Lee, Paul Racunas, Saurabh Hukerikar, Timothy Tsai, Siva Kumar Sastry Hari, Stephen W. Keckler
2021	J	`jnl`	Cooperative Profile Guided Optimizations. Comput. Graph. Forum Mark Stephenson, Ram Rangan, Stephen W. Keckler
2021	J	`jnl`	Evolution of the Graphics Processing Unit (GPU). IEEE Micro William J. Dally, Stephen W. Keckler, David Blair Kirk
2021	J	`jnl`	GPU Domain Specialization via Composable On-Package Architecture. CoRR Yaosheng Fu, Evgeny Bolotin, Niladrish Chatterjee, David W. Nellans, Stephen W. Keckler
2021	C	`conf`	Generating and Characterizing Scenarios for Safety Testing of Autonomous Vehicles. IV Zahra Ghodsi, Siva Kumar Sastry Hari, Iuri Frosio, Timothy Tsai, Alejandro J. Troccoli, Stephen W. Keckler, Siddharth Garg, Anima Anandkumar
2021	J	`jnl`	Generating and Characterizing Scenarios for Safety Testing of Autonomous Vehicles. CoRR Zahra Ghodsi, Siva Kumar Sastry Hari, Iuri Frosio, Timothy Tsai, Alejandro J. Troccoli, Stephen W. Keckler, Siddharth Garg, Anima Anandkumar
2021	A	`conf`	NVBitFI: Dynamic Fault Injection for GPUs. DSN Timothy Tsai, Siva Kumar Sastry Hari, Michael B. Sullivan, Oreste Villa, Stephen W. Keckler
2021	A	`conf`	Optimizing Selective Protection for CNN Resilience. ISSRE Abdulrahman Mahmoud, Siva Kumar Sastry Hari, Christopher W. Fletcher, Sarita V. Adve, Charbel Sakr, Naresh R. Shanbhag, Pavlo Molchanov, Michael B. Sullivan, Timothy Tsai, Stephen W. Keckler
2021	J	`jnl`	SNAP: An Efficient Sparse Neural Acceleration Processor for Unstructured Sparse Deep Neural Network Inference. IEEE J. Solid State Circuits Jie-Fang Zhang, Ching-En Lee, Chester Liu, Yakun Sophia Shao, Stephen W. Keckler, Zhengya Zhang
2021	J	`jnl`	Simba: scaling deep-learning inference with chiplet-based architecture. Commun. ACM Yakun Sophia Shao, Jason Clemons, Rangharajan Venkatesan, Brian Zimmer, Matthew Fojtik, Nan Jiang, Ben Keller, Alicia Klinefelter, Nathaniel Ross Pinckney, Priyanka Raina, Stephen G. Tell, Yanqing Zhang, William J. Dally, Joel S. Emer, C. Thomas Gray, Brucek Khailany, Stephen W. Keckler
2021	A	`conf`	Suraksha: A Framework to Analyze the Safety Implications of Perception Design Choices in AVs. ISSRE Hengyu Zhao, Siva Kumar Sastry Hari, Timothy Tsai, Michael B. Sullivan, Stephen W. Keckler, Jishen Zhao
2021	—	`conf`	Suraksha: A Quantitative AV Safety Evaluation Framework to Analyze Safety Implications of Perception Design Choices. DSN Workshops Hengyu Zhao, Siva Kumar Sastry Hari, Timothy Tsai, Michael B. Sullivan, Stephen W. Keckler, Jishen Zhao
2020	J	`jnl`	A 0.32-128 TOPS, Scalable Multi-Chip-Module-Based Deep Neural Network Inference Accelerator With Ground-Referenced Signaling in 16 nm. IEEE J. Solid State Circuits Brian Zimmer, Rangharajan Venkatesan, Yakun Sophia Shao, Jason Clemons, Matthew Fojtik, Nan Jiang, Ben Keller, Alicia Klinefelter, Nathaniel Ross Pinckney, Priyanka Raina, Stephen G. Tell, Yanqing Zhang, William J. Dally, Joel S. Emer, C. Thomas Gray, Stephen W. Keckler, Brucek Khailany
2020	A*	`conf`	Buddy Compression: Enabling Larger Memory for Deep Learning and HPC Workloads on GPUs. ISCA Esha Choukse, Michael B. Sullivan, Mike O'Connor, Mattan Erez, Jeff Pool, David W. Nellans, Stephen W. Keckler
2020	J	`jnl`	Estimating Silent Data Corruption Rates Using a Two-Level Model. CoRR Siva Kumar Sastry Hari, Paolo Rech, Timothy Tsai, Mark Stephenson, Arslan Zulfiqar, Michael B. Sullivan, Philip P. Shirvani, Paul Racunas, Joel S. Emer, Stephen W. Keckler
2020	J	`jnl`	HarDNN: Feature Map Vulnerability Evaluation in CNNs. CoRR Abdulrahman Mahmoud, Siva Kumar Sastry Hari, Christopher W. Fletcher, Sarita V. Adve, Charbel Sakr, Naresh R. Shanbhag, Pavlo Molchanov, Michael B. Sullivan, Timothy Tsai, Stephen W. Keckler
2020	J	`jnl`	Making Convolutions Resilient via Algorithm-Based Error Detection Techniques. CoRR Siva Kumar Sastry Hari, Michael B. Sullivan, Timothy Tsai, Stephen W. Keckler
2020	A	`conf`	Speculative reconvergence for improved SIMT efficiency. CGO Sana Damani, Daniel R. Johnson, Mark Stephenson, Stephen W. Keckler, Eddie Q. Yan, Michael McKeown, Olivier Giroux
2019	—	`conf`	A 0.11 PJ/OP, 0.32-128 Tops, Scalable Multi-Chip-Module-Based Deep Neural Network Accelerator Designed with A High-Productivity vlsi Methodology. Hot Chips Symposium Rangharajan Venkatesan, Yakun Sophia Shao, Brian Zimmer, Jason Clemons, Matthew Fojtik, Nan Jiang, Ben Keller, Alicia Klinefelter, Nathaniel Ross Pinckney, Priyanka Raina, Stephen G. Tell, Yanqing Zhang, William J. Dally, Joel S. Emer, C. Thomas Gray, Stephen W. Keckler, Brucek Khailany
2019	—	`conf`	A 0.11 pJ/Op, 0.32-128 TOPS, Scalable Multi-Chip-Module-based Deep Neural Network Accelerator with Ground-Reference Signaling in 16nm. VLSI Circuits Brian Zimmer, Rangharajan Venkatesan, Yakun Sophia Shao, Jason Clemons, Matthew Fojtik, Nan Jiang, Ben Keller, Alicia Klinefelter, Nathaniel Ross Pinckney, Priyanka Raina, Stephen G. Tell, Yanqing Zhang, William J. Dally, Joel S. Emer, C. Thomas Gray, Stephen W. Keckler, Brucek Khailany
2019	J	`jnl`	Buddy Compression: Enabling Larger Memory for Deep Learning and HPC Workloads on GPUs. CoRR Esha Choukse, Michael B. Sullivan, Mike O'Connor, Mattan Erez, Jeff Pool, David W. Nellans, Stephen W. Keckler
2019	A*	`conf`	Buffets: An Efficient and Composable Storage Idiom for Explicit Decoupled Data Orchestration. ASPLOS Michael Pellauer, Yakun Sophia Shao, Jason Clemons, Neal Clayton Crago, Kartik Hegde, Rangharajan Venkatesan, Stephen W. Keckler, Christopher W. Fletcher, Joel S. Emer
2019	J	`jnl`	Exposing Memory Access Patterns to Improve Instruction and Memory Efficiency in GPUs. ACM Trans. Archit. Code Optim. Neal Clayton Crago, Mark Stephenson, Stephen W. Keckler
2019	A	`conf`	GPU snapshot: checkpoint offloading for GPU-dense systems. ICS Kyushick Lee, Michael B. Sullivan, Siva Kumar Sastry Hari, Timothy Tsai, Stephen W. Keckler, Mattan Erez
2019	J	`jnl`	Kayotee: A Fault Injection-based System to Assess the Safety and Reliability of Autonomous Vehicles to Faults and Errors. CoRR Saurabh Jha, Timothy Tsai, Siva Kumar Sastry Hari, Michael B. Sullivan, Zbigniew Kalbarczyk, Stephen W. Keckler, Ravishankar K. Iyer
2019	A	`conf`	MAGNet: A Modular Accelerator Generator for Neural Networks. ICCAD Rangharajan Venkatesan, Yakun Sophia Shao, Miaorong Wang, Jason Clemons, Steve Dai, Matthew Fojtik, Ben Keller, Alicia Klinefelter, Nathaniel Ross Pinckney, Priyanka Raina, Yanqing Zhang, Brian Zimmer, William J. Dally, Joel S. Emer, Stephen W. Keckler, Brucek Khailany
2019	A	`conf`	ML-Based Fault Injection for Autonomous Vehicles: A Case for Bayesian Fault Injection. DSN Saurabh Jha, Subho S. Banerjee, Timothy Tsai, Siva Kumar Sastry Hari, Michael B. Sullivan, Zbigniew T. Kalbarczyk, Stephen W. Keckler, Ravishankar K. Iyer
2019	J	`jnl`	ML-based Fault Injection for Autonomous Vehicles: A Case for Bayesian Fault Injection. CoRR Saurabh Jha, Subho S. Banerjee, Timothy Tsai, Siva Kumar Sastry Hari, Michael B. Sullivan, Zbigniew T. Kalbarczyk, Stephen W. Keckler, Ravishankar K. Iyer
2019	A*	`conf`	NVBit: A Dynamic Binary Instrumentation Framework for NVIDIA GPUs. MICRO Oreste Villa, Mark Stephenson, David W. Nellans, Stephen W. Keckler
2019	—	`conf`	On the Trend of Resilience for GPU-Dense Systems. DSN (Supplements) Kyushick Lee, Michael B. Sullivan, Siva Kumar Sastry Hari, Timothy Tsai, Stephen W. Keckler, Mattan Erez
2019	—	`conf`	SNAP: A 1.67 - 21.55TOPS/W Sparse Neural Acceleration Processor for Unstructured Sparse Deep Neural Network Inference in 16nm CMOS. VLSI Circuits Jie-Fang Zhang, Ching-En Lee, Chester Liu, Yakun Sophia Shao, Stephen W. Keckler, Zhengya Zhang
2019	A*	`conf`	Simba: Scaling Deep-Learning Inference with Multi-Chip-Module-Based Architecture. MICRO Yakun Sophia Shao, Jason Clemons, Rangharajan Venkatesan, Brian Zimmer, Matthew Fojtik, Nan Jiang, Ben Keller, Alicia Klinefelter, Nathaniel Ross Pinckney, Priyanka Raina, Stephen G. Tell, Yanqing Zhang, William J. Dally, Joel S. Emer, C. Thomas Gray, Brucek Khailany, Stephen W. Keckler
2019	B	`conf`	Timeloop: A Systematic Approach to DNN Accelerator Evaluation. ISPASS Angshuman Parashar, Priyanka Raina, Yakun Sophia Shao, Yu-Hsin Chen, Victor A. Ying, Anurag Mukkara, Rangharajan Venkatesan, Brucek Khailany, Stephen W. Keckler, Joel S. Emer
2018	A*	`conf`	Compressing DMA Engine: Leveraging Activation Sparsity for Training Deep Neural Networks. HPCA Minsoo Rhu, Mike O'Connor, Niladrish Chatterjee, Jeff Pool, Youngeun Kwon, Stephen W. Keckler
2018	A	`conf`	Optimizing software-directed instruction replication for GPU error detection. SC Abdulrahman Mahmoud, Siva Kumar Sastry Hari, Michael B. Sullivan, Timothy Tsai, Stephen W. Keckler
2018	J	`jnl`	Software-Directed Techniques for Improved GPU Register File Utilization. ACM Trans. Archit. Code Optim. Dani Voitsechov, Arslan Zulfiqar, Mark Stephenson, Mark Gebhart, Stephen W. Keckler
2018	J	`jnl`	Structurally Sparsified Backward Propagation for Faster Long Short-Term Memory Training. CoRR Maohua Zhu, Jason Clemons, Jeff Pool, Minsoo Rhu, Stephen W. Keckler, Yuan Xie
2018	A*	`conf`	SwapCodes: Error Codes for Hardware-Software Cooperative GPU Pipeline Error Detection. MICRO Michael B. Sullivan, Siva Kumar Sastry Hari, Brian Zimmer, Timothy Tsai, Stephen W. Keckler
2017	A*	`conf`	Architecting an Energy-Efficient DRAM System for GPUs. HPCA Niladrish Chatterjee, Mike O'Connor, Donghyuk Lee, Daniel R. Johnson, Stephen W. Keckler, Minsoo Rhu, William J. Dally
2017	J	`jnl`	Compressing DMA Engine: Leveraging Activation Sparsity for Training Deep Neural Networks. CoRR Minsoo Rhu, Mike O'Connor, Niladrish Chatterjee, Jeff Pool, Stephen W. Keckler
2017	A*	`conf`	Fine-grained DRAM: energy-efficient DRAM for extreme bandwidth systems. MICRO Mike O'Connor, Niladrish Chatterjee, Donghyuk Lee, John M. Wilson, Aditya Agrawal, Stephen W. Keckler, William J. Dally
2017	B	`conf`	SASSIFI: An architecture-level fault injection tool for GPU application resilience evaluation. ISPASS Siva Kumar Sastry Hari, Timothy Tsai, Mark Stephenson, Stephen W. Keckler, Joel S. Emer
2017	A*	`conf`	SCNN: An Accelerator for Compressed-sparse Convolutional Neural Networks. ISCA Angshuman Parashar, Minsoo Rhu, Anurag Mukkara, Antonio Puglielli, Rangharajan Venkatesan, Brucek Khailany, Joel S. Emer, Stephen W. Keckler, William J. Dally
2017	J	`jnl`	SCNN: An Accelerator for Compressed-sparse Convolutional Neural Networks. CoRR Angshuman Parashar, Minsoo Rhu, Anurag Mukkara, Antonio Puglielli, Rangharajan Venkatesan, Brucek Khailany, Joel S. Emer, Stephen W. Keckler, William J. Dally
2017	A	`conf`	Understanding error propagation in deep learning neural network (DNN) accelerators and applications. SC Guanpeng Li, Siva Kumar Sastry Hari, Michael B. Sullivan, Timothy Tsai, Karthik Pattabiraman, Joel S. Emer, Stephen W. Keckler
2016	A*	`conf`	A case for toggle-aware compression for GPU systems. HPCA Gennady Pekhimenko, Evgeny Bolotin, Nandita Vijaykumar, Onur Mutlu, Todd C. Mowry, Stephen W. Keckler
2016	A*	`conf`	A patch memory system for image processing and computer vision. MICRO Jason Clemons, Chih-Chi Cheng, Iuri Frosio, Daniel R. Johnson, Stephen W. Keckler
2016	A*	`conf`	A real-time energy-efficient superpixel hardware accelerator for mobile computer vision applications. DAC Injoon Hong, Jason Clemons, Rangharajan Venkatesan, Iuri Frosio, Brucek Khailany, Stephen W. Keckler
2016	—	`conf`	CLARA: Circular Linked-List Auto and Self Refresh Architecture. MEMSYS Aditya Agrawal, Mike O'Connor, Evgeny Bolotin, Niladrish Chatterjee, Joel S. Emer, Stephen W. Keckler
2016	A*	`conf`	Selective GPU caches to eliminate CPU-GPU HW cache coherence. HPCA Neha Agarwal, David W. Nellans, Eiman Ebrahimi, Thomas F. Wenisch, John Danskin, Stephen W. Keckler
2016	A*	`conf`	Towards high performance paged memory for GPUs. HPCA Tianhao Zheng, David W. Nellans, Arslan Zulfiqar, Mark Stephenson, Stephen W. Keckler
2016	A*	`conf`	Transparent Offloading and Mapping (TOM): Enabling Programmer-Transparent Near-Data Processing in GPU Systems. ISCA Kevin Hsieh, Eiman Ebrahimi, Gwangsun Kim, Niladrish Chatterjee, Mike O'Connor, Nandita Vijaykumar, Onur Mutlu, Stephen W. Keckler
2016	J	`jnl`	Virtualizing Deep Neural Networks for Memory-Efficient Neural Network Design. CoRR Minsoo Rhu, Natalia Gimelshein, Jason Clemons, Arslan Zulfiqar, Stephen W. Keckler
2016	A*	`conf`	vDNN: Virtualized deep neural networks for scalable, memory-efficient neural network design. MICRO Minsoo Rhu, Natalia Gimelshein, Jason Clemons, Arslan Zulfiqar, Stephen W. Keckler
2015	A*	`conf`	A variable warp size architecture. ISCA Timothy G. Rogers, Daniel R. Johnson, Mike O'Connor, Stephen W. Keckler
2015	—	`conf`	Anatomy of GPU Memory System for Multi-Application Execution. MEMSYS Adwait Jog, Onur Kayiran, Tuba Kesten, Ashutosh Pattnaik, Evgeny Bolotin, Niladrish Chatterjee, Stephen W. Keckler, Mahmut T. Kandemir, Chita R. Das
2015	J	`jnl`	Designing Efficient Heterogeneous Memory Architectures. IEEE Micro Evgeny Bolotin, David W. Nellans, Oreste Villa, Mike O'Connor, Alex Ramírez, Stephen W. Keckler
2015	A*	`conf`	Flexible software profiling of GPU architectures. ISCA Mark Stephenson, Siva Kumar Sastry Hari, Yunsup Lee, Eiman Ebrahimi, Daniel R. Johnson, David W. Nellans, Mike O'Connor, Stephen W. Keckler
2015	—	`conf`	GPU Computing Pipeline Inefficiencies and Optimization Opportunities in Heterogeneous CPU-GPU Processors. IISWC Joel Hestness, Stephen W. Keckler, David A. Wood
2015	J	`jnl`	Increasing Interconnection Network Throughput with Virtual Channels. Computer Stephen W. Keckler
2015	A*	`conf`	Page Placement Strategies for GPUs within Heterogeneous Memory Systems. ASPLOS Neha Agarwal, David W. Nellans, Mark Stephenson, Mike O'Connor, Stephen W. Keckler
2015	J	`jnl`	Toggle-Aware Compression for GPUs. IEEE Comput. Archit. Lett. Gennady Pekhimenko, Evgeny Bolotin, Mike O'Connor, Onur Mutlu, Todd C. Mowry, Stephen W. Keckler
2015	A*	`conf`	Unlocking bandwidth for GPUs in CC-NUMA systems. HPCA Neha Agarwal, David W. Nellans, Mike O'Connor, Stephen W. Keckler, Thomas F. Wenisch
2014	J	`jnl`	2014 International Symposium on Computer Architecture Influential Paper Award; 2014 Maurice Wilkes Award Given to Ravi Rajwar. IEEE Micro Stephen W. Keckler, Dean M. Tullsen
2014	—	`conf`	A comparative analysis of microarchitecture effects on CPU and GPU memory system behavior. IISWC Joel Hestness, Stephen W. Keckler, David A. Wood
2014	—	`conf`	Application-aware Memory System for Fair and Efficient Execution of Concurrent GPGPU Applications. GPGPU@ASPLOS Adwait Jog, Evgeny Bolotin, Zvika Guz, Mike Parker, Stephen W. Keckler, Mahmut T. Kandemir, Chita R. Das
2014	A*	`conf`	Arbitrary Modulus Indexing. MICRO Jeffrey R. Diamond, Donald S. Fussell, Stephen W. Keckler
2014	—	`conf`	Author retrospective for a NUCA substrate for flexible CMP cache sharing. ICS 25th Anniversary Jaehyuk Huh, Changkyu Kim, Hazim Shafi, Lixin Zhang, Doug Burger, Stephen W. Keckler
2014	A*	`conf`	Exploring the Design Space of SPMD Divergence Management on Data-Parallel Architectures. MICRO Yunsup Lee, Vinod Grover, Ronny Krashinsky, Mark Stephenson, Stephen W. Keckler, Krste Asanovic
2014	J	`jnl`	Rethinking caches for throughput processors: technical perspective. Commun. ACM Stephen W. Keckler
2014	J	`jnl`	Scaling Power and Performance viaProcessor Composability. IEEE Trans. Computers Madhu Saravana Sibi Govindan, Behnam Robatmili, Dong Li, Bertrand A. Maher, Aaron Smith, Stephen W. Keckler, Doug Burger
2014	A	`conf`	Scaling the Power Wall: A Path to Exascale. SC Oreste Villa, Daniel R. Johnson, Mike O'Connor, Evgeny Bolotin, David W. Nellans, Justin Luitjens, Nikolai Sakharnykh, Peng Wang, Paulius Micikevicius, Anthony Scudiero, Stephen W. Keckler, William J. Dally
2013	A*	`conf`	21st century digital design tools. DAC William J. Dally, Chris Malachowsky, Stephen W. Keckler
2013	A	`conf`	Convergence and scalarization for data-parallel architectures. CGO Yunsup Lee, Ronny Krashinsky, Vinod Grover, Stephen W. Keckler, Krste Asanovic
2013	A*	`conf`	How to implement effective prediction and forwarding for fusable dynamic multicore architectures. HPCA Behnam Robatmili, Dong Li, Hadi Esmaeilzadeh, Madhu Saravana Sibi Govindan, Aaron Smith, Andrew Putnam, Doug Burger, Stephen W. Keckler
2012	J	`jnl`	A Hierarchical Thread Scheduler and Register File for Energy-Efficient Throughput Processors. ACM Trans. Comput. Syst. Mark Gebhart, Daniel R. Johnson, David Tarjan, Stephen W. Keckler, William J. Dally, Erik Lindholm, Kevin Skadron
2012	J	`jnl`	A QoS-Enabled On-Die Interconnect Fabric for Kilo-Node Chips. IEEE Micro Boris Grot, Joel Hestness, Stephen W. Keckler, Onur Mutlu
2012	J	`jnl`	Charles R. (Chuck) Moore (1961 - 2012). IEEE Micro Doug Burger, Stephen W. Keckler, Mark Papermaster
2012	C	`conf`	Exploiting microarchitectural redundancy for defect tolerance. ICCD Premkishore Shivakumar, Stephen W. Keckler, Charles R. Moore, Doug Burger
2012	J	`jnl`	Massively Multithreaded Computing Systems. Computer Stephen W. Keckler, Steven K. Reinhardt
2012	A*	`conf`	Unifying Primary Cache, Scratch, and Register File Memories in a Throughput Processor. MICRO Mark Gebhart, Stephen W. Keckler, Brucek Khailany, Ronny Krashinsky, William J. Dally
2011	A*	`conf`	A compile-time managed multi-level register file hierarchy. MICRO Mark Gebhart, Stephen W. Keckler, William J. Dally
2011	A*	`conf`	Energy-efficient mechanisms for managing thread context in throughput processors. ISCA Mark Gebhart, Daniel R. Johnson, David Tarjan, Stephen W. Keckler, William J. Dally, Erik Lindholm, Kevin Skadron
2011	B	`conf`	Evaluation and optimization of multicore performance bottlenecks in supercomputing applications. ISPASS Jeffrey R. Diamond, Martin Burtscher, John D. McCalpin, Byoung-Do Kim, Stephen W. Keckler, James C. Browne
2011	A*	`conf`	Exploiting criticality to reduce bottlenecks in distributed uniprocessors. HPCA Behnam Robatmili, Madhu Saravana Sibi Govindan, Doug Burger, Stephen W. Keckler
2011	J	`jnl`	GPUs and the Future of Parallel Computing. IEEE Micro Stephen W. Keckler, William J. Dally, Brucek Khailany, Michael Garland, David Glasco
2011	A*	`conf`	Kilo-NOC: a heterogeneous network-on-chip architecture for scalability and service guarantees. ISCA Boris Grot, Joel Hestness, Stephen W. Keckler, Onur Mutlu
2010	—	`conf`	Netrace: dependency-driven trace-based network-on-chip simulation. NoCArc@MICRO Joel Hestness, Boris Grot, Stephen W. Keckler
2010	—	`conf`	Topology-Aware Quality-of-Service Support in Highly Integrated Chip Multiprocessors. ISCA Workshops Boris Grot, Stephen W. Keckler, Onur Mutlu
2009	A*	`ed.`	36th International Symposium on Computer Architecture (ISCA 2009), June 20-24, 2009, Austin, TX, USA ISCA Stephen W. Keckler, Luiz André Barroso
2009	A*	`conf`	An evaluation of the TRIPS computer system. ASPLOS Mark Gebhart, Bertrand A. Maher, Katherine E. Coons, Jeffrey R. Diamond, Paul Gratz, Mario Marino, Nitya Ranganathan, Behnam Robatmili, Aaron Smith, James H. Burrill, Stephen W. Keckler, Doug Burger, Kathryn S. McKinley
2009	B	`conf`	Analysis of the TRIPS prototype block predictor. ISPASS Nitya Ranganathan, Doug Burger, Stephen W. Keckler
2009	—	`ch.`	Composable Multicore Chips. Multicore Processors and Systems Doug Burger, Stephen W. Keckler, Simha Sethumadhavan
2009	A	`conf`	End-to-end validation of architectural power models. ISLPED Madhu Saravana Sibi Govindan, Stephen W. Keckler, Doug Burger
2009	A*	`conf`	Express Cube Topologies for on-Chip Interconnects. HPCA Boris Grot, Joel Hestness, Stephen W. Keckler, Onur Mutlu
2009	—	`book`	Multicore Processors and Systems Stephen W. Keckler, Kunle Olukotun, H. Peter Hofstee
2009	—	`ch.`	On-Chip Networks for Multicore Systems. Multicore Processors and Systems Li-Shiuan Peh, Stephen W. Keckler, Sriram R. Vangal
2009	A*	`conf`	Preemptive virtual clock: a flexible, efficient, and cost-effective QOS scheme for networks-on-chip. MICRO Boris Grot, Stephen W. Keckler, Onur Mutlu
2009	—	`conf`	Segment gating for static energy reduction in Networks-on-Chip. NoCArc@MICRO Kyle C. Hale, Boris Grot, Stephen W. Keckler
2008	A*	`conf`	Counting Dependence Predictors. ISCA Franziska Roesner, Doug Burger, Stephen W. Keckler
2008	B	`conf`	High performance dense linear algebra on a spatially distributed processor. PPoPP Jeffrey R. Diamond, Behnam Robatmili, Stephen W. Keckler, Robert A. van de Geijn, Kazushige Goto, Doug Burger
2008	J	`jnl`	Multitasking workload scheduling on flexible core chip multiprocessors. SIGARCH Comput. Archit. News Divya Gulati, Changkyu Kim, Simha Sethumadhavan, Stephen W. Keckler, Doug Burger
2008	B	`conf`	Multitasking workload scheduling on flexible-core chip multiprocessors. PACT Divya Gulati, Changkyu Kim, Simha Sethumadhavan, Stephen W. Keckler, Doug Burger
2008	A*	`conf`	Regional congestion awareness for load balance in networks-on-chip. HPCA Paul Gratz, Boris Grot, Stephen W. Keckler
2007	J	`jnl`	A NUCA Substrate for Flexible CMP Cache Sharing. IEEE Trans. Parallel Distributed Syst. Jaehyuk Huh, Changkyu Kim, Hazim Shafi, Lixin Zhang, Doug Burger, Stephen W. Keckler
2007	A*	`conf`	Composable Lightweight Processors. MICRO Changkyu Kim, Simha Sethumadhavan, M. S. Govindan, Nitya Ranganathan, Divya Gulati, Doug Burger, Stephen W. Keckler
2007	—	`conf`	Implementation and Evaluation of a Dynamically Routed Processor Operand Network. NOCS Paul Gratz, Karthikeyan Sankaralingam, Heather Hanson, Premkishore Shivakumar, Robert G. McDonald, Stephen W. Keckler, Doug Burger
2007	A*	`conf`	Late-binding: enabling unordered load-store queues. ISCA Simha Sethumadhavan, Franziska Roesner, Joel S. Emer, Doug Burger, Stephen W. Keckler
2007	J	`jnl`	On-Chip Interconnection Networks of the TRIPS Chip. IEEE Micro Paul Gratz, Changkyu Kim, Karthikeyan Sankaralingam, Heather Hanson, Premkishore Shivakumar, Stephen W. Keckler, Doug Burger
2007	A	`conf`	Power, Performance, and Thermal Management for High-Performance Systems. IPDPS Heather Hanson, Stephen W. Keckler, Karthick Rajamani, Soraya Ghiasi, Freeman L. Rawson III, Juan Rubio
2007	A*	`conf`	Reconciling performance and programmability in networking systems. SIGCOMM Jayaram Mudigonda, Harrick M. Vin, Stephen W. Keckler
2007	J	`jnl`	Research Challenges for On-Chip Interconnection Networks. IEEE Micro John D. Owens, William J. Dally, Ron Ho, Doddaballapur Narasimha-Murthy Jayasimha, Stephen W. Keckler, Li-Shiuan Peh
2007	C	`conf`	The future of multi-core technologies. CLUSTER Michael T. Clark, H. Peter Hofstee, Edward J. Barragy, Ian Buck, Stephen W. Keckler
2007	A	`conf`	Thermal response to DVFS: analysis with an Intel Pentium M. ISLPED Heather Hanson, Stephen W. Keckler, Soraya Ghiasi, Karthick Rajamani, Freeman L. Rawson III, Juan Rubio
2006	B	`conf`	Critical path analysis of the TRIPS architecture. ISPASS Ramadass Nagarajan, Xia Chen, Robert G. McDonald, Doug Burger, Stephen W. Keckler
2006	A*	`conf`	Dataflow Predication. MICRO Aaron Smith, Ramadass Nagarajan, Karthikeyan Sankaralingam, Robert G. McDonald, Doug Burger, Stephen W. Keckler, Kathryn S. McKinley
2006	C	`conf`	Decomposing memory performance: data structures and phases. ISMM Kartik K. Agaram, Stephen W. Keckler, Calvin Lin, Kathryn S. McKinley
2006	C	`conf`	Design and Implementation of the TRIPS Primary Memory System. ICCD Simha Sethumadhavan, Robert G. McDonald, Rajagopalan Desikan, Doug Burger, Stephen W. Keckler
2006	A*	`conf`	Distributed Microarchitectural Protocols in the TRIPS Prototype Processor. MICRO Karthikeyan Sankaralingam, Ramadass Nagarajan, Robert G. McDonald, Rajagopalan Desikan, Saurabh Drolia, M. S. Govindan, Paul Gratz, Divya Gulati, Heather Hanson, Changkyu Kim, Haiming Liu, Nitya Ranganathan, Simha Sethumadhavan, Sadia Sharif, Premkishore Shivakumar, Stephen W. Keckler, Doug Burger
2006	C	`conf`	Implementation and Evaluation of On-Chip Network Architectures. ICCD Paul Gratz, Changkyu Kim, Robert G. McDonald, Stephen W. Keckler, Doug Burger
2005	A	`conf`	A NUCA substrate for flexible CMP cache sharing. ICS Jaehyuk Huh, Changkyu Kim, Hazim Shafi, Lixin Zhang, Doug Burger, Stephen W. Keckler
2004	J	`jnl`	Recent extensions to the SimpleScalar tool suite. SIGMETRICS Perform. Evaluation Rev. Doug Burger, Todd M. Austin, Stephen W. Keckler
2004	J	`jnl`	Scalable Hardware Memory Disambiguation for High-ILP Processors. IEEE Micro Simha Sethumadhavan, Rajagopalan Desikan, Doug Burger, Charles R. Moore, Stephen W. Keckler
2004	A*	`conf`	Scalable selective re-execution for EDGE architectures. ASPLOS Rajagopalan Desikan, Simha Sethumadhavan, Doug Burger, Stephen W. Keckler
2004	J	`jnl`	Scaling to the End of Silicon with EDGE Architectures. Computer Doug Burger, Stephen W. Keckler, Kathryn S. McKinley, Michael Dahlin, Lizy Kurian John, Calvin Lin, Charles R. Moore, James H. Burrill, Robert G. McDonald, William Yode
2004	—	`conf`	Static Placement, Dynamic Issue (SPDI) Scheduling for EDGE Architectures. IEEE PACT Ramadass Nagarajan, Sundeep K. Kushwaha, Doug Burger, Kathryn S. McKinley, Calvin Lin, Stephen W. Keckler
2004	J	`jnl`	TRIPS: A polymorphous architecture for exploiting ILP, TLP, and DLP. ACM Trans. Archit. Code Optim. Karthikeyan Sankaralingam, Ramadass Nagarajan, Haiming Liu, Changkyu Kim, Jaehyuk Huh, Nitya Ranganathan, Doug Burger, Stephen W. Keckler, Robert G. McDonald, Charles R. Moore
2003	A*	`conf`	Exploiting ILP, TLP and DLP with the Polymorphous TRIPS Architecture. ISCA Karthikeyan Sankaralingam, Ramadass Nagarajan, Haiming Liu, Changkyu Kim, Jaehyuk Huh, Doug Burger, Stephen W. Keckler, Charles R. Moore
2003	J	`jnl`	Exploiting ILP, TLP, and DLP with the Polymorphous TRIPS Architecture. IEEE Micro Karthikeyan Sankaralingam, Ramadass Nagarajan, Haiming Liu, Changkyu Kim, Jaehyuk Huh, Doug Burger, Stephen W. Keckler, Charles R. Moore
2003	C	`conf`	Exploiting Microarchitectural Redundancy For Defect Tolerance. ICCD Premkishore Shivakumar, Stephen W. Keckler, Charles R. Moore, Doug Burger
2003	A	`conf`	Microprocessor pipeline energy analysis. ISLPED Karthik Natarajan, Heather Hanson, Stephen W. Keckler, Charles R. Moore, Doug Burger
2003	J	`jnl`	Nonuniform Cache Architectures for Wire-Delay Dominated On-Chip Caches. IEEE Micro Changkyu Kim, Doug Burger, Stephen W. Keckler
2003	C	`conf`	Routed Inter-ALU Networks for ILP Scalability and Performance. ICCD Karthikeyan Sankaralingam, Vincent Ajay Singh, Stephen W. Keckler, Doug Burger
2003	A*	`conf`	Scalable Hardware Memory Disambiguation for High ILP Processors. MICRO Simha Sethumadhavan, Rajagopalan Desikan, Doug Burger, Charles R. Moore, Stephen W. Keckler
2003	J	`jnl`	Static energy reduction techniques for microprocessor caches. IEEE Trans. Very Large Scale Integr. Syst. Heather Hanson, M. S. Hrishikesh, Vikas Agarwal, Stephen W. Keckler, Doug Burger
2003	A*	`conf`	Universal Mechanisms for Data-Parallel Architectures. MICRO Karthikeyan Sankaralingam, Stephen W. Keckler, William R. Mark, Doug Burger
2002	A*	`conf`	An adaptive, non-uniform cache structure for wire-delay dominated on-chip caches. ASPLOS Changkyu Kim, Doug Burger, Stephen W. Keckler
2002	J	`jnl`	Errata on "Measuring Experimental Error in Microprocessor Simulation". SIGARCH Comput. Archit. News Rajagopalan Desikan, Doug Burger, Stephen W. Keckler, José-Lorenzo Cruz, Fernando Latorre, Antonio González, Mateo Valero
2002	A	`conf`	Modeling the Effect of Technology Trends on the Soft Error Rate of Combinational Logic. DSN Premkishore Shivakumar, Michael Kistler, Stephen W. Keckler, Doug Burger, Lorenzo Alvisi
2002	A*	`conf`	The Optimal Logic Depth Per Pipeline Stage is 6 to 8 FO4 Inverter Delays. ISCA M. S. Hrishikesh, Doug Burger, Stephen W. Keckler, Premkishore Shivakumar, Norman P. Jouppi, Keith I. Farkas
2001	A*	`conf`	A design space evaluation of grid processor architectures. MICRO Ramadass Nagarajan, Karthikeyan Sankaralingam, Doug Burger, Stephen W. Keckler
2001	—	`conf`	Exploring the Design Space of Future CMPs. IEEE PACT Jaehyuk Huh, Doug Burger, Stephen W. Keckler
2001	A*	`conf`	Measuring Experimental Error in Microprocessor Simulation. ISCA Rajagopalan Desikan, Doug Burger, Stephen W. Keckler
2001	C	`conf`	Static Energy Reduction Techniques for Microprocessor Caches. ICCD Heather Hanson, M. S. Hrishikesh, Vikas Agarwal, Stephen W. Keckler, Doug Burger
2000	A*	`conf`	Clock rate versus IPC: the end of the road for conventional microarchitectures. ISCA Vikas Agarwal, M. S. Hrishikesh, Stephen W. Keckler, Doug Burger
2000	—	`conf`	Processor Mechanisms for Software Shared Memory. ISHPC Nicholas P. Carter, William J. Dally, Whay Sing Lee, Stephen W. Keckler, Andrew Chang
2000	A*	`conf`	The impact of delay on the design of branch predictors. MICRO Daniel A. Jiménez, Stephen W. Keckler, Calvin Lin
1999	J	`jnl`	Concurrent Event Handling through Multithreading. IEEE Trans. Computers Stephen W. Keckler, Andrew Chang, Whay Sing Lee, Sandeep Chatterjee, William J. Dally
1998	J	`jnl`	An Efficient, Protected Message Interface. Computer Whay Sing Lee, William J. Dally, Stephen W. Keckler, Nicholas P. Carter, Andrew Chang
1998	A*	`conf`	Exploiting Fine-grain Thread Level Parallelism on the MIT Multi-ALU Processor. ISCA Stephen W. Keckler, William J. Dally, Daniel Maskit, Nicholas P. Carter, Andrew Chang, Whay Sing Lee
1998	—	`—`	Fast thread communication and synchronization mechanisms for a scalable single chip multiprocessor. Stephen W. Keckler
1998	C	`conf`	The effects of explicitly parallel mechanisms on the multi-ALU processor cluster pipeline. ICCD Andrew Chang, William J. Dally, Stephen W. Keckler, Nicholas P. Carter, Whay Sing Lee
1997	J	`jnl`	The M-machine multicomputer. Int. J. Parallel Program. Marco Fillo, Stephen W. Keckler, William J. Dally, Nicholas P. Carter, Andrew Chang, Yevgeny Gurevich, Whay Sing Lee
1995	A*	`conf`	The M-Machine multicomputer. MICRO Marco Fillo, Stephen W. Keckler, William J. Dally, Nicholas P. Carter, Andrew Chang, Yevgeny Gurevich, Whay Sing Lee
1994	A*	`conf`	Hardware Support for Fast Capability-based Addressing. ASPLOS Nicholas P. Carter, Stephen W. Keckler, William J. Dally
1992	A*	`conf`	Processor Coupling: Integrating Compile Time and Runtime Scheduling for Parallelism. ISCA Stephen W. Keckler, William J. Dally