Stephen Richardson

33 papers A* 9A 2C 1Misc 1Journal 15Unranked 3
YearRankTypeTitle / Venue / Authors
2024 J jnl
Amber: A 16-nm System-on-Chip With a Coarse- Grained Reconfigurable Array for Flexible Acceleration of Dense Linear Algebra.
IEEE J. Solid State Circuits
Kathleen Feng, Taeyoung Kong, Kalhan Koul, Jackson Melchert, Alex Carsello, Qiaoyi Liu, Gedeon Nyengele, Maxwell Strange, Keyi Zhang, Ankita Nayak, Jeff Setter, James Thomas, Kavya Sreedhar, Po-Han Chen, Nikhil Bhagdikar, Zachary A. Myers, Brandon D'Agostino, Pranil Joshi, Stephen Richardson, Christopher Torng, Mark Horowitz, Priyanka Raina
2023 J jnl
AHA: An Agile Approach to the Design of Coarse-Grained Reconfigurable Accelerators and Compilers.
ACM Trans. Embed. Comput. Syst.
Kalhan Koul, Jackson Melchert, Kavya Sreedhar, Leonard Truong, Gedeon Nyengele, Keyi Zhang, Qiaoyi Liu, Jeff Setter, Po-Han Chen, Yuchen Mei, Maxwell Strange, Ross Daly, Caleb Donovick, Alex Carsello, Taeyoung Kong, Kathleen Feng, Dillon Huff, Ankita Nayak, Rajsekhar Setaluri, James Thomas, Nikhil Bhagdikar, David Durst, Zachary A. Myers, Nestan Tsiskaridze, Stephen Richardson, Rick Bahr, Kayvon Fatahalian, Pat Hanrahan, Clark W. Barrett, Mark Horowitz, Christopher Torng, Fredrik Kjolstad, Priyanka Raina
2023 J jnl
Improving Energy Efficiency of CGRAs with Low-Overhead Fine-Grained Power Domains.
ACM Trans. Reconfigurable Technol. Syst.
Ankita Nayak, Keyi Zhang, Rajsekhar Setaluri, Alex Carsello, Makai Mann, Christopher Torng, Stephen Richardson, Rick Bahr, Pat Hanrahan, Mark Horowitz, Priyanka Raina
2022 — conf
Amber: A 367 GOPS, 538 GOPS/W 16nm SoC with a Coarse-Grained Reconfigurable Array for Flexible Acceleration of Dense Linear Algebra.
VLSI Technology and Circuits
Alex Carsello, Kathleen Feng, Taeyoung Kong, Kalhan Koul, Qiaoyi Liu, Jackson Melchert, Gedeon Nyengele, Maxwell Strange, Keyi Zhang, Ankita Nayak, Jeff Setter, James Thomas, Kavya Sreedhar, Po-Han Chen, Nikhil Bhagdikar, Zachary A. Myers, Brandon D'Agostino, Pranil Joshi, Stephen Richardson, Rick Bahr, Christopher Torng, Mark Horowitz, Priyanka Raina
2022 — conf
Amber: Coarse-Grained Reconfigurable Array-Based SoC for Dense Linear Algebra Acceleration.
HCS
Kathleen Feng, Alex Carsello, Taeyoung Kong, Kalhan Koul, Qiaoyi Liu, Jackson Melchert, Gedeon Nyengele, Maxwell Strange, Keyi Zhang, Ankita Nayak, Jeff Setter, James Thomas, Kavya Sreedhar, Po-Han Chen, Nikhil Bhagdikar, Zachary A. Myers, Brandon D'Agostino, Pranil Joshi, Stephen Richardson, Rick Bahr, Christopher Torng, Mark Horowitz, Priyanka Raina
2022 Misc ed.
Proceedings of the 15th biennial conference of the Association for Machine Translation in the Americas (Volume 1: Research Track), AMTA 2022, Orlando, USA, September 12-16, 2022
AMTA
Kevin Duh, Francisco Guzmán, Stephen Richardson
2022 — conf
Visualizing Tacit Knowledge in Cardiac Operating Room: A Need-Finding Study.
HCI (21)
Soojin Kang, Cecilia Xi Wang, Tjorvi Perry, Stephen Richardson, Lisa Miller
2021 — ed.
Proceedings of the 18th Biennial Machine Translation Summit - Volume 1: Research Track, MTSummit 2021 Virtual, August 16-20, 2021
MTSummit (1)
Kevin Duh, Francisco Guzmán, Stephen Richardson
2020 A conf
A Framework for Adding Low-Overhead, Fine-Grained Power Domains to CGRAs.
DATE
Ankita Nayak, Keyi Zhang, Rajsekhar Setaluri, Alex Carsello, Makai Mann, Stephen Richardson, Rick Bahr, Pat Hanrahan, Mark Horowitz, Priyanka Raina
2020 A* conf
Creating an Agile Hardware Design Flow.
DAC
Rick Bahr, Clark W. Barrett, Nikhil Bhagdikar, Alex Carsello, Ross Daly, Caleb Donovick, David Durst, Kayvon Fatahalian, Kathleen Feng, Pat Hanrahan, Teguh Hofstee, Mark Horowitz, Dillon Huff, Fredrik Kjolstad, Taeyoung Kong, Qiaoyi Liu, Makai Mann, Jackson Melchert, Ankita Nayak, Aina Niemetz, Gedeon Nyengele, Priyanka Raina, Stephen Richardson, Rajsekhar Setaluri, Jeff Setter, Kavya Sreedhar, Maxwell Strange, James Thomas, Christopher Torng, Leonard Truong, Nestan Tsiskaridze, Keyi Zhang
2017 J jnl
Dark Memory and Accelerator-Rich System Optimization in the Dark Silicon Era.
IEEE Des. Test
Ardavan Pedram, Stephen Richardson, Mark Horowitz, Sameh Galal, Shahar Kvatinsky
2017 J jnl
Programming Heterogeneous Systems from an Image Processing DSL.
ACM Trans. Archit. Code Optim.
Jing Pu, Steven Bell, Xuan Yang, Jeff Setter, Stephen Richardson, Jonathan Ragan-Kelley, Mark Horowitz
2016 J jnl
A Systematic Approach to Blocking Convolutional Neural Networks.
CoRR
Xuan Yang, Jing Pu, Blaine Burton Rister, Nikhil Bhagdikar, Stephen Richardson, Shahar Kvatinsky, Jonathan Ragan-Kelley, Ardavan Pedram, Mark Horowitz
2016 J jnl
Dark Memory and Accelerator-Rich System Optimization in the Dark Silicon Era.
CoRR
Ardavan Pedram, Stephen Richardson, Sameh Galal, Shahar Kvatinsky, Mark Horowitz
2016 A* conf
Evaluating programmable architectures for imaging and vision applications.
MICRO
Artem Vasilyev, Nikhil Bhagdikar, Ardavan Pedram, Stephen Richardson, Shahar Kvatinsky, Mark Horowitz
2016 A* conf
Improving energy efficiency of DRAM by exploiting half page row access.
MICRO
Heonjae Ha, Ardavan Pedram, Stephen Richardson, Shahar Kvatinsky, Mark Horowitz
2016 J jnl
Programming Heterogeneous Systems from an Image Processing DSL.
CoRR
Jing Pu, Steven Bell, Xuan Yang, Jeff Setter, Stephen Richardson, Jonathan Ragan-Kelley, Mark Horowitz
2015 J jnl
Building Conflict-Free FFT Schedules.
IEEE Trans. Circuits Syst. I Regul. Pap.
Stephen Richardson, Dejan Markovic, Andrew Danowitz, John S. Brunhaver, Mark Horowitz
2013 C conf
An area-efficient minimum-time FFT schedule using single-ported memory.
VLSI-SoC
Stephen Richardson, Ofer Shacham, Dejan Markovic, Mark Horowitz
2012 A* conf
Avoiding game over: bringing design to the next level.
DAC
Ofer Shacham, Sameh Galal, Sabarish Sankaranarayanan, Megan Wachs, John S. Brunhaver, Artem Vassiliev, Mark Horowitz, Andrew Danowitz, Wajahat Qadeer, Stephen Richardson
2012 J jnl
Bringing up a chip on the cheap.
IEEE Des. Test
Megan Wachs, Ofer Shacham, Zain Asgar, Amin Firoozshahian, Stephen Richardson, Mark Horowitz
2012 A* conf
Removing overhead from high-level interfaces.
DAC
Kyle Kelley, Megan Wachs, John P. Stevenson, Stephen Richardson, Mark Horowitz
2011 A conf
Intermediate representations for controllers in chip generators.
DATE
Kyle Kelley, Megan Wachs, Andrew Danowitz, P. Stevenson, Stephen Richardson, Mark Horowitz
2011 J jnl
Understanding sources of ineffciency in general-purpose chips.
Commun. ACM
Rehan Hameed, Wajahat Qadeer, Megan Wachs, Omid Azizi, Alex Solomatnikov, Benjamin C. Lee, Stephen Richardson, Christos Kozyrakis, Mark Horowitz
2010 J jnl
Rethinking Digital Design: Why Design Must Change.
IEEE Micro
Ofer Shacham, Omid Azizi, Megan Wachs, Stephen Richardson, Mark Horowitz
2010 A* conf
Understanding sources of inefficiency in general-purpose chips.
ISCA
Rehan Hameed, Wajahat Qadeer, Megan Wachs, Omid Azizi, Alex Solomatnikov, Benjamin C. Lee, Stephen Richardson, Christos Kozyrakis, Mark Horowitz
2009 A* conf
A memory system design framework: creating smart memories.
ISCA
Amin Firoozshahian, Alex Solomatnikov, Ofer Shacham, Zain Asgar, Stephen Richardson, Christos Kozyrakis, Mark Horowitz
2009 A* conf
Using a configurable processor generator for computer architecture prototyping.
MICRO
Alex Solomatnikov, Amin Firoozshahian, Ofer Shacham, Zain Asgar, Megan Wachs, Wajahat Qadeer, Stephen Richardson, Mark Horowitz
2008 A* conf
Verification of chip multiprocessor memory systems using a relaxed scoreboard.
MICRO
Ofer Shacham, Megan Wachs, Alex Solomatnikov, Amin Firoozshahian, Stephen Richardson, Mark Horowitz
1993 — ch.
The Experience of Developing a Large-Scale Natural Language Processing System: Critique.
Natural Language Processing
Stephen Richardson, Lisa C. Braden-Harder
1989 J jnl
Code Optimization Across Procedures.
Computer
Stephen Richardson, Mahadevan Ganapathi
1989 J jnl
Interprocedural Optimization: Experimental Results.
Softw. Pract. Exp.
Stephen Richardson, Mahadevan Ganapathi
1989 J jnl
Interprocedural analysis vs. procedure integration.
Inf. Process. Lett.
Stephen Richardson, Mahadevan Ganapathi