Stephen Pateras

11 papers A* 1A 6C 1Journal 3
YearRankTypeTitle / Venue / Authors
2004 A conf
Security vs. Test Quality: Fully Embedded Test Approaches Are the Key to Having Both.
ITC
Stephen Pateras
2003 J jnl
Achieving At-Speed Structural Test.
IEEE Des. Test Comput.
Stephen Pateras
2002 A conf
Embedded Diagnosis IP.
DATE
Stephen Pateras
2002 J jnl
IP for Embedded Diagnosis.
IEEE Des. Test Comput.
Stephen Pateras
2000 A conf
Bridging the gap between embedded test and ATE.
ITC
Martin Bell, Givargis Danialy, Michael C. Howells, Stephen Pateras
1999 A conf
An embedded technique for at-speed interconnect testing.
ITC
Benoit Nadeau-Dostie, Jean-Francois Cote, Harry Hulvershorn, Stephen Pateras
1997 J jnl
Advanced microprocessor test strategy and methodology.
IBM J. Res. Dev.
William V. Huott, Timothy J. Koprowski, Bryan J. Robbins, Mary P. Kusko, Stephen Pateras, Dale E. Hoffman, Timothy G. McNamara, Thomas J. Snethen
1995 A conf
Avoiding Unknown States When Scanning Mutually Exclusive Latches.
ITC
Stephen Pateras, Martin S. Schmookler
1991 A conf
Cube-Contained Random Patterns and Their Applications to the Complete Testing of Synthesized Multi-Level Circuits.
ITC
Stephen Pateras, Janusz Rajski
1991 A* conf
Generation of Correlated Random Patterns for the Complete Testing of Synthesized Multi-level Circuits.
DAC
Stephen Pateras, Janusz Rajski
1988 C conf
A self-reconfiguration scheme for fault-tolerant VLSI processor arrays.
ICCD
Stephen Pateras, Janusz Rajski