Stephen K. Sunter

41 papers A* 1A 22B 2C 1Misc 5Journal 8Unranked 2

Year	Rank	Type	Title / Venue / Authors
2016	J	`jnl`	Streaming Access to ADCs and DACs for Mixed-Signal ATPG. IEEE Des. Test Stephen K. Sunter, Jean-Francois Cote, Jeff Rearick
2015	A	`conf`	Streaming fast access to ADCs and DACs for mixed-signal ATPG. ITC Stephen K. Sunter, Jean-Francois Cote, Jeff Rearick
2014	Misc	`conf`	Innovative practices session 4C: Disruptive solutions in the non-digital world. VTS Amitava Majumdar, Suriya Natarajan, Stephen K. Sunter, Prashant Goteti, Ke Huang
2014	Misc	`conf`	Innovative practices session 7C: Reduced pin-count testing - How low can we go? VTS Stephen K. Sunter, Steve Comen, Paul Berndt, Ram Rajamani
2013	—	`conf`	Mid-bond Interposer Wire Test. Asian Test Symposium Li-Ren Huang, Shi-Yu Huang, Kun-Han Tsai, Wu-Tung Cheng, Stephen K. Sunter
2013	J	`jnl`	Oscillation-Based Prebond TSV Test. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Li-Ren Huang, Shi-Yu Huang, Stephen K. Sunter, Kun-Han Tsai, Wu-Tung Cheng
2013	J	`jnl`	Parametric Delay Test of Post-Bond Through-Silicon Vias in 3-D ICs via Variable Output Thresholding Analysis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Yu-Hsiang Lin, Shi-Yu Huang, Kun-Han Tsai, Wu-Tung Cheng, Stephen K. Sunter, Yung-Fa Chou, Ding-Ming Kwai
2012	A	`conf`	A unified method for parametric fault characterization of post-bond TSVs. ITC Yu-Hsiang Lin, Shi-Yu Huang, Kun-Han Tsai, Wu-Tung Cheng, Stephen K. Sunter
2012	J	`jnl`	Contactless Test of IC Pads, Pins, and TSVs via Standard Boundary Scan. IEEE Des. Test Comput. Stephen K. Sunter, Aubin Roy
2012	A*	`conf`	Small delay testing for TSVs in 3-D ICs. DAC Shi-Yu Huang, Yu-Hsiang Lin, Kun-Han Tsai, Wu-Tung Cheng, Stephen K. Sunter, Yung-Fa Chou, Ding-Ming Kwai
2011	B	`conf`	A Mixed-Signal Test Bus and Analog BIST with 'Unlimited' Time and Voltage Resolution. ETS Stephen K. Sunter, Aubin Roy
2011	A	`conf`	Adaptive parametric BIST of high-speed parallel I/Os via standard boundary scan. ITC Stephen K. Sunter, Aubin Roy
2010	A	`conf`	BIST of I/O circuit parameters via standard boundary scan. ITC Stephen K. Sunter, Matthias Tilmann
2010	A	`conf`	Experiences with parametric BIST for production testing PLLs with picosecond precision. ITC Rakesh Kinger, Swetha Narasimhawsamy, Stephen K. Sunter
2008	J	`jnl`	Noise-Insensitive Digital BIST for any PLL or DLL. J. Electron. Test. Stephen K. Sunter, Aubin Roy
2007	A	`conf`	A selt-testing BOST for high-frequency PLLs, DLLs, and SerDes. ITC Stephen K. Sunter, Aubin Roy
2007	B	`conf`	Purely Digital BIST for Any PLL or DLL. ETS Stephen K. Sunter, Aubin Roy
2007	—	`conf`	Testing SerDes beyond 4 Gbps - changing priorities. CICC Stephen K. Sunter, Aubin Roy
2006	A	`conf`	Structural Tests for Jitter Tolerance in SerDes Receivers. ITC Stephen K. Sunter, Aubin Roy
2005	J	`jnl`	Analog and mixed signal test techniques for SOC development. Microelectron. J. Bozena Kaminska, Stephen K. Sunter, Salvador Mir
2005	A	`conf`	Correct by construction is guaranteed to fail. ITC Stephen K. Sunter
2005	A	`conf`	Structural tests for jitter tolerance in SerDes receivers. ITC Stephen K. Sunter, Aubin Roy
2004	A	`conf`	An Automated, Complete, Structural Test Solution for SERDES. ITC Stephen K. Sunter, Aubin Roy, Jean-Francois Cote
2004	J	`jnl`	On-Chip Digital Jitter Measurement, from Megahertz to Gigahertz. IEEE Des. Test Comput. Stephen K. Sunter, Aubin Roy
2004	A	`conf`	Status of IEEE Testability Standards 1149.4, 1532 and 1149.6. DATE Stephen K. Sunter, Adam Osseiran, Adam Cron, Neil G. Jacobson, Dave Bonnett, Bill Eklow, Carl Barnhart, Ben Bennetts
2003	A	`conf`	Testing High Frequency ADCs and DACs with a Low Frequency Analog Bus. ITC Stephen K. Sunter
2002	A	`conf`	Complete, Contactless I/O Testing - Reaching the Boundary in Minimizing Digital IC Testing Cost. ITC Stephen K. Sunter, Benoit Nadeau-Dostie
2002	A	`conf`	High Accuracy Stimulus Generation for A/D Converter BIST. ITC Aubin Roy, Stephen K. Sunter, Alessandra Fudoli, Davide Appello
2002	A	`conf`	IC Mixed-Signal BIST: Separating Facts from Fiction. ITC Stephen K. Sunter
2001	A	`conf`	A general purpose 1149.4 IC with HF analog test capabilities. ITC Stephen K. Sunter, Ken Filliter, Joe Woo, Pat McHugh
2001	A	`conf`	Contactless digital testing of IC pin leakage currents. ITC Stephen K. Sunter, Charles McDonald, Givargis Danialy
2000	Misc	`conf`	How Should Fault Coverage Be Defined? VTS Thomas W. Williams, Stephen K. Sunter
1999	J	`jnl`	Analog, digital, and mixed-signal people. IEEE Des. Test Comput. Stephen K. Sunter
1999	A	`conf`	BIST for phase-locked loops in digital applications. ITC Stephen K. Sunter, Aubin Roy
1999	Misc	`conf`	Test Metrics for Analog Parametric Faults. VTS Stephen K. Sunter, Naveena Nagi
1998	A	`conf`	BIST vs. ATE: need a different vehicle? ITC Stephen K. Sunter
1997	A	`conf`	A Simplified Polynomial-Fitting Algorithm for DAC and ADC BIST. ITC Stephen K. Sunter, Naveena Nagi
1997	A	`conf`	P1149.4-Problem or Solution for Mixed-Signal IC Design? ITC Stephen K. Sunter
1996	C	`conf`	Design for testability of integrated operational amplifiers using oscillation-test strategy. ICCD Karim Arabi, Bozena Kaminska, Stephen K. Sunter
1995	Misc	`conf`	A low cost 100 MHz analog test bus. VTS Stephen K. Sunter
1995	A	`conf`	The P1149.4 Mixed Signal Test Bus: Costs and Benefits. ITC Stephen K. Sunter