Stephan Niel - RankMe

13 papers C 1Unranked 12

Year	Rank	Type	Title / Venue / Authors
2025	—	`conf`	Polysilicon PIN diode characterization and scaling in low-cost 40nm technology for IoT applications. ICECS Wiame El Khayyari, Noemie Couzi, Jérémy Postel-Pellerin, Hassen Aziza, Abderrezak Marzaki, François Courbin, Alexandre Malherbe, Arnaud Régnier, Stephan Niel
2024	—	`conf`	Optimization of digital transistors for low-cost and low-power IoT applications in 40nm technology. DTTIS Noemie Couzi, Jérémy Postel-Pellerin, Hassen Aziza, Alexandre Malherbe, Abderrezak Marzaki, Stephan Niel
2023	—	`conf`	40nm SONOS Embedded Select in Trench Memory. ESSDERC Radouane Habhab, Vincenzo Della Marca, Pascal Masson, Nadia Miridi, Clement Pribat, Simon Jeannot, Thibault Kempf, Marc Mantelli, Philippe Lorenzini, Jean-Marc Voisin, Arnaud Régnier, Stephan Niel, Francesco La Rosa
2022	—	`conf`	A Schmitt trigger to benchmark the performance of a new zero-cost transistor. ICECS 2022 Paul Devoge, Hassen Aziza, Philippe Lorenzini, Pascal Masson, Alexandre Malherbe, Franck Julien, Abderrezak Marzaki, Arnaud Régnier, Stephan Niel
2022	C	`conf`	Digital-to-analog converters to benchmark the matching performance of a new zero-cost transistor. ISCAS Paul Devoge, Hassen Aziza, Philippe Lorenzini, Alexandre Malherbe, Franck Julien, Abderrezak Marzaki, Arnaud Régnier, Stephan Niel
2021	—	`conf`	Benchmarking and optimization of trench-based multi-gate transistors in a 40 nm non-volatile memory technology. DTIS Romeric Gay, Vincenzo Della Marca, Hassen Aziza, Arnaud Régnier, Stephan Niel, Abderrezak Marzaki
2021	—	`conf`	Circuit-level evaluation of a new zero-cost transistor in an embedded non-volatile memory CMOS technology. DTIS Paul Devoge, Hassen Aziza, Philippe Lorenzini, Franck Julien, Abderrezak Marzaki, Alexandre Malherbe, Marc Mantelli, Thomas Sardin, Sébastien Haendler, Arnaud Régnier, Stephan Niel
2021	—	`conf`	Hot Electron Source Side Injection Comprehension in 40nm eSTM™. IMW Franck Melul, Thibault Kempf, Vincenzo Della Marca, Marc Bocquet, Madjid Akbal, Frederique Trenteseaux, Marc Mantelli, Arnaud Régnier, Stephan Niel, Francesco La Rosa
2020	—	`conf`	AC stress reliability study of a new high voltage transistor for logic memory circuits. IRPS Jordan Locati, Vincenzo Della Marca, Christian Rivero, Arnaud Régnier, Stephan Niel, Karine Coulié
2018	—	`conf`	Threshold voltage bitmap analysis methodology: Application to a 512kB 40nm Flash memory test chip. IRPS Thibault Kempf, Vincenzo Della Marca, L. Baron, F. Maugain, Francesco La Rosa, Stephan Niel, Arnaud Régnier, Jean-Michel Portal, Pascal Masson
2015	—	`conf`	Dynamic current reduction of CMOS digital circuits through design and process optimization. PATMOS Jordan Innocenti, Loïc Welter, Nicolas Borrel, Franck Julien, Jean-Michel Portal, Jacques Sonzogni, Laurent Lopez, Pascal Masson, Stephan Niel, Philippe Dreux, Julia Castellan
2015	—	`conf`	Layout optimizations to decrease internal power and area in digital CMOS standard cells. MIPRO Jordan Innocenti, Franck Julien, Jean-Michel Portal, Laurent Lopez, Q. Hubert, Pascal Masson, Jacques Sonzogni, Stephan Niel, Arnaud Régnier
2014	—	`conf`	Dynamic power reduction through process and design optimizations on CMOS 80 nm embedded non-volatile memories technology. MWSCAS Jordan Innocenti, Loic Welter, Franck Julien, Laurent Lopez, Jacques Sonzogni, Stephan Niel, Arnaud Régnier, Emmanuel Paire, Karen Labory, Eric Denis, Jean-Michel Portal, Pascal Masson