Stefan Tertinek

23 papers A 1C 5Journal 11Unranked 6
YearRankTypeTitle / Venue / Authors
2025 A conf
Modeling the Impact of Wi-Fi 6E Traffic on Ultra-Wideband Communication Performance.
MSWiM
Michael Stocker, Alexander Bögl, Elisei Ember, Maximilian Schuh, Kay Römer, Carlo Alberto Boano, Stefan Tertinek, Pablo Corbalán Pelegrín
2024 J jnl
A Graph-Based Algorithm for Robust Sequential Localization Exploiting Multipath for Obstructed-LOS-Bias Mitigation.
IEEE Trans. Wirel. Commun.
Alexander Venus, Erik Leitinger, Stefan Tertinek, Klaus Witrisal
2024 — conf
Fusion of Active and Passive Measurements for Robust and Scalable Positioning.
JC&S
Hong Zhu, Alexander Venus, Erik Leitinger, Stefan Tertinek, Klaus Witrisal
2024 J jnl
Graph-Based Simultaneous Localization and Bias Tracking.
IEEE Trans. Wirel. Commun.
Alexander Venus, Erik Leitinger, Stefan Tertinek, Florian Meyer, Klaus Witrisal
2024 C conf
Performance Bounds of UWB TOA Estimation in Presence of Wi-Fi 6E Wideband Interference.
IPIN
Stefan Hechenberger, Stefan Tertinek, Holger Arthaber
2023 J jnl
Low-Complexity Wideband Interference Mitigation for UWB ToA Estimation.
Sensors
Stefan Hechenberger, Stefan Tertinek, Holger Arthaber
2022 — conf
Graph-based Simultaneous Localization and Bias Tracking for Robust Positioning in Obstructed LOS Situations.
IEEECONF
Alexander Venus, Erik Leitinger, Stefan Tertinek, Florian Meyer, Klaus Witrisal
2021 J jnl
A Message Passing based Adaptive PDA Algorithm for Robust Radio-based Localization and Tracking.
CoRR
Alexander Venus, Erik Leitinger, Stefan Tertinek, Klaus Witrisal
2021 — conf
Performance Evaluation of Detection-based UWB Ranging in Presence of Interference.
ACSCC
Stefan Hechenberger, Stefan Tertinek, Holger Arthaber
2020 J jnl
A Harmonic Rejection Strategy for 25% Duty-Cycle IQ-Mixers Using Digital-to-Time Converters.
IEEE Trans. Circuits Syst. II Express Briefs
Andreas Gebhard, Silvester Sadjina, Stefan Tertinek, Krzysztof Dufrene, Harald Pretl, Mario Huemer
2020 — conf
Reliability and Threshold-Region Performance of TOA Estimators in Dense Multipath Channels.
ICC Workshops
Alexander Venus, Erik Leitinger, Stefan Tertinek, Klaus Witrisal
2018 J jnl
A Novel Digital-Intensive Hybrid Polar-I/Q RF Transmitter Architecture.
IEEE Trans. Circuits Syst. I Regul. Pap.
Tobias Buckel, Peter Preyler, Alexander Klinkan, Damir Hamidovic, Christoph Preissl, Thomas Mayer, Stefan Tertinek, Siegfried Brandstaetter, Christian Wicpalek, Andreas Springer, Robert Weigel
2018 — conf
A Novel Hybrid Polar-I/Q Modulation Method relaxing RF Phase Modulator Design Requirements.
PRIME
Tobias Buckel, Peter Preyler, Ehrentraud Hager, Thomas Mayer, Stefan Tertinek, Andreas Springer, Robert Weigel
2016 C conf
Digitally controlled oscillator gain estimation for RF-DPLLs in 4G LTE polar transmitters.
ISCAS
Tobias Buckel, Stefan Tertinek, Ram Sunil Kanumalli, Thomas Mayer, Christian Wicpalek, Robert Weigel, Thomas Ussmueller
2014 C conf
An overall gain estimation algorithm for all digital phase locked loops.
ISCAS
Jing Li, Richard Hagelauer, Thomas Mayer, Stefan Tertinek, Christian Wicpalek, Burkhard Neurauter
2013 — conf
A DCO Gain Estimation Algorithm for Digital Phase Locked Loops.
EW
Jing Li, Richard Hagelauer, Thomas Mayer, Stefan Tertinek, Christian Wicpalek, Burkhard Neurauter
2011 J jnl
Output-Jitter Performance of Second-Order Digital Bang-Bang Phase-Locked Loops With Nonaccumulative Reference Clock Jitter.
IEEE Trans. Circuits Syst. II Express Briefs
Stefan Tertinek, Orla Feely
2010 J jnl
Binary Phase Detector Gain in Bang-Bang Phase-Locked Loops With DCO Jitter.
IEEE Trans. Circuits Syst. II Express Briefs
Stefan Tertinek, James P. Gleeson, Orla Feely
2010 J jnl
Statistical Analysis of First-Order Bang-Bang Phase-Locked Loops Using Sign-Dependent Random-Walk Theory.
IEEE Trans. Circuits Syst. I Regul. Pap.
Stefan Tertinek, James P. Gleeson, Orla Feely
2009 C conf
Combined Effect of Loop Delay and Reference Clock Jitter in First-order Digital Bang-bang Phase-locked Loops.
ISCAS
Stefan Tertinek, Orla Feely
2008 C conf
Phase jitter dynamics of first-order digital phase-locked loops with frequency-modulated input.
ISCAS
Stefan Tertinek, Alexey Teplinsky, Orla Feely
2008 J jnl
Reconstruction of Nonuniformly Sampled Bandlimited Signals Using a Differentiator-Multiplier Cascade.
IEEE Trans. Circuits Syst. I Regul. Pap.
Stefan Tertinek, Christian Vogel
2007 J jnl
Reconstruction of Two-Periodic Nonuniformly Sampled Band-Limited Signals Using a Discrete-Time Differentiator and a Time-Varying Multiplier.
IEEE Trans. Circuits Syst. II Express Briefs
Stefan Tertinek, Christian Vogel