Stefan Nikolic

13 papers A 7B 3Misc 1Journal 2

Year	Rank	Type	Title / Venue / Authors
2025	Misc	`conf`	Guaranteed Yet Hard to Find: Uncovering FPGA Routing Convergence Paradox. FCCM Shashwat Shrivastava, Stefan Nikolic, Sun Tanaka, Chirag Ravishankar, Dinesh Gaitonde, Mirjana Stojilovic
2024	J	`jnl`	Exploring FPGA Switch-Blocks without Explicitly Listing Connectivity Patterns. ACM Trans. Reconfigurable Technol. Syst. Stefan Nikolic, Paolo Ienne
2023	A	`conf`	IIBLAST: Speeding Up Commercial FPGA Routing by Decoupling and Mitigating the Intra-CLB Bottleneck. ICCAD Shashwat Shrivastava, Stefan Nikolic, Chirag Ravishankar, Dinesh Gaitonde, Mirjana Stojilovic
2023	A	`conf`	Mitigating the Last-Mile Bottleneck: A Two-Step Approach For Faster Commercial FPGA Routing. FPGA Shashwat Shrivastava, Stefan Nikolic, Chirag Ravishankar, Dinesh Gaitonde, Mirjana Stojilovic
2023	A	`conf`	Regularity Matters: Designing Practical FPGA Switch-Blocks. FPGA Stefan Nikolic, Paolo Ienne
2022	J	`jnl`	Detailed Placement for Dedicated LUT-Level FPGA Interconnect. ACM Trans. Reconfigurable Technol. Syst. Stefan Nikolic, Grace Zgheib, Paolo Ienne
2021	A	`conf`	Global Is the New Local: FPGA Architecture at 5nm and Beyond. FPGA Stefan Nikolic, Francky Catthoor, Zsolt Tokei, Paolo Ienne
2021	A	`conf`	NetCracker: A Peek into the Routing Architecture of Xilinx 7-Series FPGAs. FPGA Morten B. Petersen, Stefan Nikolic, Mirjana Stojilovic
2021	B	`conf`	Turning PathFinder Upside-Down: Exploring FPGA Switch-Blocks by Negotiating Switch Presence. FPL Stefan Nikolic, Paolo Ienne
2020	A	`conf`	Straight to the Point: Intra- and Intercluster LUT Connections to Mitigate the Delay of Programmable Routing. FPGA Stefan Nikolic, Grace Zgheib, Paolo Ienne
2020	B	`conf`	Timing-Driven Placement for FPGA Architectures with Dedicated Routing Paths. FPL Stefan Nikolic, Grace Zgheib, Paolo Ienne
2019	B	`conf`	Finding a Needle in the Haystack of Hardened Interconnect Patterns. FPL Stefan Nikolic, Grace Zgheib, Paolo Ienne
2019	A	`conf`	On Feasibility of FPGAs Without Dedicated Programmable Interconnect Structure. FPGA Anastasiia Kucherenko, Stefan Nikolic, Paolo Ienne