Stefan Hänzsche

26 papers A* 1C 6Journal 11Unranked 8

Year	Rank	Type	Title / Venue / Authors
2023	—	`conf`	A 12-ADC 25-Core Smart MPSoC Using ABB in 22FDX for 77GHz MIMO Radars at 52.6mW Average Power. CICC Hector A. Gonzalez, Bernhard Vogginger, Chen Liu, Marco Stolba, Florian Kelber, Heiner Bauer, Stefan Hänzsche, Stefan Scholze, Marc Berthel, Tim Rosmeisl, Liyuan Guo, Dennis Walter, Piash Das, Khaleelulla Khan Nazeer, Tilo Schubert, Sebastian Höppner, Christian Mayr
2023	—	`conf`	A 3.3V Saturation-Aware Neurostimulator with Reset Functionality in 22 nm FDSOI. NEWCAS Franz Marcus Schüffny, Stefan Hänzsche, Stephan Henker, Seyed Mohammad Ali Zeinolabedin, Stefan Scholze, Sebastian Höppner, Richard Miru George, Christian Mayr
2022	J	`jnl`	A 16-Channel Fully Configurable Neural SoC With 1.52 $\mu$W/Ch Signal Acquisition, 2.79 $\mu$W/Ch Real-Time Spike Classifier, and 1.79 TOPS/W Deep Neural Network Accelerator in 22 nm FDSOI. IEEE Trans. Biomed. Circuits Syst. Seyed Mohammad Ali Zeinolabedin, Franz Marcus Schüffny, Richard George, Florian Kelber, Heiner Bauer, Stefan Scholze, Stefan Hänzsche, Marco Stolba, Andreas Dixius, Georg Ellguth, Dennis Walter, Sebastian Höppner, Christian Mayr
2022	—	`conf`	A Single Battery Supply Power Concept for a Neuro Recording and Flexible Processing Chain in 22 nm. NorCAS Franz Marcus Schüffny, Stefan Hänzsche, Marc Berthel, Seyed Mohammad Ali Zeinolabedin, Stefan Scholze, Sebastian Höppner, Richard Miru George, Christian Mayr
2022	J	`jnl`	An Ultra-Low Area Digital-Assisted Neuro Recording System in 22nm FDSOI Technology. IEEE Trans. Circuits Syst. II Express Briefs Franz Marcus Schüffny, Sebastian Höppner, Stefan Hänzsche, Richard Miru George, Seyed Mohammad Ali Zeinolabedin, Christian Mayr
2021	C	`conf`	Ultra-High Compression of Twiddle Factor ROMs in Multi-Core DSP for FMCW Radars. ISCAS Hector A. Gonzalez, Florian Kelber, Marco Stolba, Chen Liu, Bernhard Vogginger, Stefan Hänzsche, Stefan Scholze, Sebastian Höppner, Christian Mayr
2020	J	`jnl`	Mean Field Approach for Configuring Population Dynamics on a Biohybrid Neuromorphic System. J. Signal Process. Syst. Johannes Partzsch, Christian Mayr, Massimiliano Giulioni, Marko Noack, Stefan Hänzsche, Stefan Scholze, Sebastian Höppner, Paolo Del Giudice, René Schüffny
2019	J	`jnl`	Mean Field Approach for Configuring Population Dynamics on a Biohybrid Neuromorphic System. CoRR Johannes Partzsch, Christian Mayr, Massimiliano Giulioni, Marko Noack, Stefan Hänzsche, Stefan Scholze, Sebastian Höppner, Paolo Del Giudice, René Schüffny
2019	C	`conf`	Performance Analysis of a Comparator Based Mixed-Signal Control Loop in 28 nm CMOS. VLSI-SoC Florian Protze, Martin Kreißig, Frank Ellinger, Sebastian Höppner, Stephan Hartmann, Stefan Hänzsche, Stefan Scholze, Georg Ellguth, Christian Mayr
2017	A*	`conf`	A Heterogeneous SDR MPSoC in 28 nm CMOS for Low-Latency Wireless Applications. DAC Sebastian Haas, Tobias Seifert, Benedikt Nöthen, Stefan Scholze, Sebastian Höppner, Andreas Dixius, Esther Pérez Adeva, Thomas R. Augustin, Friedrich Pauls, Sadia Moriam, Mattis Hasler, Erik Fischer, Yong Chen, Emil Matús, Georg Ellguth, Stephan Hartmann, Stefan Schiefer, Love Cederström, Dennis Walter, Stephan Henker, Stefan Hänzsche, Johannes Uhlig, Holger Eisenreich, Stefan Weithoffer, Norbert Wehn, René Schüffny, Christian Mayr, Gerhard P. Fettweis
2016	J	`jnl`	A Biological-Realtime Neuromorphic System in 28 nm CMOS Using Low-Leakage Switched Capacitor Circuits. IEEE Trans. Biomed. Circuits Syst. Christian Mayr, Johannes Partzsch, Marko Noack, Stefan Hänzsche, Stefan Scholze, Sebastian Höppner, Georg Ellguth, René Schüffny
2015	J	`jnl`	An Energy Efficient Multi-Gbit/s NoC Transceiver Architecture With Combined AC/DC Drivers and Stoppable Clocking in 65 nm and 28 nm CMOS. IEEE J. Solid State Circuits Sebastian Höppner, Dennis Walter, Thomas Hocker, Stephan Henker, Stefan Hänzsche, Daniel Sausner, Georg Ellguth, Jens-Uwe Schluessler, Holger Eisenreich, René Schüffny
2015	C	`conf`	An all-digital PWM generator with 62.5ps resolution in 28nm CMOS technology. ISCAS Sebastian Höppner, Stefan Hänzsche, Stefan Scholze, René Schüffny
2014	—	`conf`	A 10 bit 16 MS/s redundant SAR ADC with flexible window function for a digitally controlled DC-DC converter in 28 nm CMOS. NORCHIP Stefan Hänzsche, Sebastian Höppner, René Schüffny
2014	J	`jnl`	A 12-b 4-MS/s SAR ADC With Configurable Redundancy in 28-nm CMOS Technology. IEEE Trans. Circuits Syst. II Express Briefs Stefan Hänzsche, Sebastian Höppner, Georg Ellguth, René Schüffny
2014	J	`jnl`	A Biological-Realtime Neuromorphic System in 28 nm CMOS using Low-Leakage Switched Capacitor Circuits. CoRR Christian Mayr, Johannes Partzsch, Marko Noack, Stefan Hänzsche, Stefan Scholze, Sebastian Höppner, Georg Ellguth, René Schüffny
2014	C	`conf`	A compact on-chip IR-drop measurement system in 28 nm CMOS technology. ISCAS Sebastian Dietel, Sebastian Höppner, Holger Eisenreich, Georg Ellguth, Stefan Hänzsche, Stephan Henker, René Schüffny, Tim Brauninger, Ulrich Fiedler
2014	J	`jnl`	Switched-Capacitor Realization of Presynaptic Short-Term-Plasticity and Stop-Learning Synapses in 28 nm CMOS. CoRR Marko Noack, Johannes Partzsch, Christian Mayr, Stefan Hänzsche, Stefan Scholze, Sebastian Höppner, Georg Ellguth, René Schüffny
2013	J	`jnl`	A Fast-Locking ADPLL With Instantaneous Restart Capability in 28-nm CMOS Technology. IEEE Trans. Circuits Syst. II Express Briefs Sebastian Höppner, Stefan Hänzsche, Georg Ellguth, Dennis Walter, Holger Eisenreich, René Schüffny
2013	—	`conf`	Analysis of a charge redistribution SAR ADC with partially thermometer coded DAC. ECCTD Stefan Hänzsche, René Schüffny
2013	—	`conf`	Behavioral model of a continuous current integrator with time discrete feedback and sampling. ECCTD Johannes Gorner, Johannes Uhlig, Stefan Hänzsche, René Schüffny
2013	C	`conf`	Hybrid incremental-ΣΔ-ADC for ambient light sensing applications. ISCAS Johannes Uhlig, Stefan Hänzsche, Johannes Gorner, René Schüffny, Thomas Reichel, Lars Gopfert
2013	—	`conf`	Rapid prototyping of higher order incremental ΣΔ-ADC topologies and NTFs. ICECS Johannes Uhlig, Stefan Hänzsche, René Schüffny, Thomas Reichel, Lars Gopfert, Valeri Razhenikov
2012	C	`conf`	A 14 bit self-calibrating charge redistribution SAR ADC. ISCAS Stefan Hänzsche, Stephan Henker, René Schüffny, Thomas Reichel, Matthias Garzarolli
2012	J	`jnl`	A 32 GBit/s communication SoC for a waferscale neuromorphic system. Integr. Stefan Scholze, Holger Eisenreich, Sebastian Höppner, Georg Ellguth, Stephan Henker, Mario Ander, Stefan Hänzsche, Johannes Partzsch, Christian Mayr, René Schüffny
2012	—	`conf`	A source-synchronous 90Gb/s capacitively driven serial on-chip link over 6mm in 65nm CMOS. ISSCC Dennis Walter, Sebastian Höppner, Holger Eisenreich, Georg Ellguth, Stephan Henker, Stefan Hänzsche, René Schüffny, Markus Winter, Gerhard P. Fettweis