Stefan Frehse

20 papers A 2B 1C 4Journal 6Unranked 6
YearRankTypeTitle / Venue / Authors
2019 J jnl
Determining Application-Specific Knowledge for Improving Robustness of Sequential Circuits.
IEEE Trans. Very Large Scale Integr. Syst.
Sebastian Huhn, Stefan Frehse, Robert Wille, Rolf Drechsler
2017 — conf
Enhancing robustness of sequential circuits using application-specific knowledge and formal methods.
ASP-DAC
Sebastian Huhn, Stefan Frehse, Robert Wille, Rolf Drechsler
2017 J jnl
metaSMT: focus on your application and not on solver integration.
Int. J. Softw. Tools Technol. Transf.
Heinz Riener, Finn Haedicke, Stefan Frehse, Mathias Soeken, Daniel Große, Rolf Drechsler, Görschwin Fey
2013 A conf
Improving fault tolerance utilizing hardware-software-co-synthesis.
DATE
Heinz Riener, Stefan Frehse, Görschwin Fey
2013 — —
Quality and quantity in robustness checking using formal techniques.
Stefan Frehse
2012 B conf
Complete and effective robustness checking by means of interpolation.
FMCAD
Stefan Frehse, Görschwin Fey, Eli Arbel, Karen Yorav, Rolf Drechsler
2012 J jnl
RevKit: A Toolkit for Reversible Circuit Design.
J. Multiple Valued Log. Soft Comput.
Mathias Soeken, Stefan Frehse, Robert Wille, Rolf Drechsler
2011 J jnl
Debugging reversible circuits.
Integr.
Robert Wille, Daniel Große, Stefan Frehse, Gerhard W. Dueck, Rolf Drechsler
2011 — conf
Determining minimal testsets for reversible circuits using Boolean satisfiability.
AFRICON
Hongyan Zhang, Stefan Frehse, Robert Wille, Rolf Drechsler
2011 J jnl
Effective Robustness Analysis Using Bounded Model Checking Techniques.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Görschwin Fey, André Sülflow, Stefan Frehse, Rolf Drechsler
2011 C conf
RevKit: An Open Source Toolkit for the Design of Reversible Circuits.
RC
Mathias Soeken, Stefan Frehse, Robert Wille, Rolf Drechsler
2011 — conf
metaSMT: Focus on Your Application not on Solver Integration.
DIFTS@FMCAD
Finn Haedicke, Stefan Frehse, Görschwin Fey, Daniel Große, Rolf Drechsler
2010 C conf
A better-than-worst-case robustness measure.
DDECS
Stefan Frehse, Görschwin Fey, Rolf Drechsler
2010 J jnl
Automatische formale Verifikation der Fehlertoleranz von Schaltkreisen (Automated Formal Verification of Fault Tolerance for Circuits).
it Inf. Technol.
Görschwin Fey, André Sülflow, Stefan Frehse, Rolf Drechsler
2010 — conf
Efficient Simulation-Based Debugging of Reversible Logic.
ISMVL
Stefan Frehse, Robert Wille, Rolf Drechsler
2010 — conf
Enhancing debugging of multiple missing control errors in reversible logic.
ACM Great Lakes Symposium on VLSI
Jean Christoph Jung, Stefan Frehse, Robert Wille, Rolf Drechsler
2010 C conf
RobuCheck: A Robustness Checker for Digital Circuits.
DSD
Stefan Frehse, Görschwin Fey, André Sülflow, Rolf Drechsler
2010 — conf
RobuCheck: a robustness checker for digital circuits.
DYADEM-FTS@EDCC
Stefan Frehse, Görschwin Fey, André Sülflow, Rolf Drechsler
2009 A conf
Debugging of Toffoli networks.
DATE
Robert Wille, Daniel Große, Stefan Frehse, Gerhard W. Dueck, Rolf Drechsler
2009 C conf
Robustness Check for Multiple Faults Using Formal Techniques.
DSD
Stefan Frehse, Görschwin Fey, André Sülflow, Rolf Drechsler