Stefan Cosemans

48 papers A 6B 2C 3Journal 11Unranked 26

Year	Rank	Type	Title / Venue / Authors
2024	—	`conf`	11.3 Metis AIPU: A 12nm 15TOPS/W 209.6TOPS SoC for Cost- and Energy-Efficient Inference at the Edge. ISSCC Pascal Alexander Hager, Bert Moons, Stefan Cosemans, Ioannis A. Papistas, Bram Rooseleer, Jeroen Van Loon, Roel Uytterhoeven, Florian Zaruba, Spyridoula Koumousi, Milos Stanisavljevic, Stefan Mach, Sebastiaan Mutsaards, Riduan Khaddam Aljameh, Gua Hao Khov, Brecht Machiels, Cristian Olar, Anastasios Psarras, Sander Geursen, Jeroen Vermeeren, Yi Lu, Abhishek Maringanti, Deepak Ameta, Leonidas Katselas, Noah Hütter, Manuel Schmuck, Swetha Sivadas, Karishma Sharma, Manuel Oliveira, Ramon Aerne, Nitish Sharma, Timir Soni, Beatrice Bussolino, Djordje Pesut, Michele Pallaro, Andrei Podlesnii, Alexios Lyrakis, Yannick Ruffiner, Martino Dazzi, Johannes Thiele, Koen Goetschalckx, Nazareno Bruschi, Jonas Doevenspeck, Bram Verhoef, Stefan Linz, Giuseppe Garcea, Jonathan Ferguson, Ioannis Koltsidas, Evangelos Eleftheriou
2024	—	`conf`	Extremely Scaled Perpendicular SOT-MRAM Array Integration on 300mm Wafer. VLSI Technology and Circuits Farrukh Yasin, A. Palomino, Ankit Kumar, Valerio Pica, Simon Van Beek, Giacomo Talmelli, Van D. Nguyen, Stefan Cosemans, D. Crotti, Kurt Wostyn, Gouri Sankar Kar, Sebastien Couet
2023	—	`conf`	A 2Mbit Digital in-Memory Computing Matrix-Vector Multiplier for DNN Inference supporting flexible bit precision and matrix size achieving 612 binary TOPS/W. ESSCIRC Mohit Gupta, Stefan Cosemans, Peter Debacker, Wim Dehaene
2023	—	`conf`	Demonstration of multilevel multiply accumulate operations for AiMC using engineered a-IGZO transistors-based 2T1C gain cell arrays. IMW Subhali Subhechha, Stefan Cosemans, Attilio Belmonte, Nouredine Rassoul, Shamin Houshmand Sharifi, Peter Debacker, Diederik Verkest, Romain Delhougne, Gouri Sankar Kar
2023	C	`conf`	Evaluating the Effects of FeFET Device Variability on Charge Sharing Based AiMC Accelerator. ISCAS Swatilekha Majumdar, Stefan Cosemans, Arindam Mallik, Peter Debacker, Francky Catthoor, Jan Van Houdt
2022	J	`jnl`	Analog-to-Digital Converter Design Exploration for Compute-in-Memory Accelerators. IEEE Des. Test Hongwu Jiang, Wantong Li, Shanshi Huang, Stefan Cosemans, Francky Catthoor, Shimeng Yu
2022	—	`conf`	DIANA: An End-to-End Energy-Efficient Digital and ANAlog Hybrid Neural Network SoC. ISSCC Kodai Ueyoshi, Ioannis A. Papistas, Pouya Houshmand, Giuseppe Maria Sarda, Vikram Jain, Man Shi, Qilin Zheng, Juan Sebastian Piedrahita Giraldo, Peter Vrancx, Jonas Doevenspeck, Debjyoti Bhattacharjee, Stefan Cosemans, Arindam Mallik, Peter Debacker, Diederik Verkest, Marian Verhelst
2022	J	`jnl`	Dynamic Quantization Range Control for Analog-in-Memory Neural Networks Acceleration. ACM Trans. Design Autom. Electr. Syst. Nathan Laubeuf, Jonas Doevenspeck, Ioannis A. Papistas, Michele Caselli, Stefan Cosemans, Peter Vrancx, Debjyoti Bhattacharjee, Arindam Mallik, Peter Debacker, Diederik Verkest, Francky Catthoor, Rudy Lauwereins
2021	—	`conf`	A 22 nm, 1540 TOP/s/W, 12.1 TOP/s/mm CICC Ioannis A. Papistas, Stefan Cosemans, Bram Rooseleer, Jonas Doevenspeck, Myung Hee Na, Arindam Mallik, Peter Debacker, Diederik Verkest
2021	—	`conf`	Charge Sharing and Charge Injection A/D Converters for Analog In-Memory Computing. NEWCAS Michele Caselli, Ioannis A. Papistas, Stefan Cosemans, Arindam Mallik, Peter Debacker, Diederik Verkest
2021	C	`conf`	Design-Technology Space Exploration for Energy Efficient AiMC-Based Inference Acceleration. ISCAS Debjyoti Bhattacharjee, Nathan Laubeuf, Stefan Cosemans, Ioannis A. Papistas, Arindam Mallik, Peter Debacker, Myung Hee Na, Diederik Verkest
2021	—	`conf`	Edge-induced reliability & performance degradation in STT-MRAM: an etch engineering solution. IRPS Simon Van Beek, Siddharth Rao, Shreya Kundu, Woojin Kim, Barry J. O'Sullivan, Stefan Cosemans, Farrukh Yasin, Robert Carpenter, Sebastien Couet, Shamin H. Sharifi, Nico Jossart, Davide Crotti, Gouri Sankar Kar
2021	—	`conf`	STT-MRAM array performance improvement through optimization of Ion Beam Etch and MTJ for Last-Level Cache application. IMW Sidharth Rao, Woojin Kim, Simon Van Beek, Shreya Kundu, Manu Perumkunnil, Stefan Cosemans, Farrukh Yasin, Sebastien Couet, Robert Carpenter, Barry J. O'Sullivan, Shamin H. Sharifi, N. Jossart, Laurent Souriau, Ludovic Goux, Dimitri Crotti, Gouri Sankar Kar
2020	A	`conf`	Mitigation of Sense Amplifier Degradation Using Skewed Design. DATE Daniel Kraak, Mottaqiallah Taouil, Said Hamdioui, Pieter Weckx, Stefan Cosemans, Francky Catthoor
2020	—	`conf`	eSRAM Reliability: Why is it still not optimally solved? DTIS Daniël Kraak, Mottaqiallah Taouil, Said Hamdioui, Pieter Weckx, Stefan Cosemans, Francky Catthoor
2019	J	`jnl`	FQ-Conv: Fully Quantized Convolution for Efficient and Accurate Inference. CoRR Bram-Ernst Verhoef, Nathan Laubeuf, Stefan Cosemans, Peter Debacker, Ioannis A. Papistas, Arindam Mallik, Diederik Verkest
2019	B	`conf`	Hardware-Based Aging Mitigation Scheme for Memory Address Decoder. ETS Daniel Kraak, Innocent Agbo, Mottaqiallah Taouil, Said Hamdioui, Pieter Weckx, Stefan Cosemans, Francky Catthoor
2019	A	`conf`	Methodology for Application-Dependent Degradation Analysis of Memory Timing. DATE Daniel Kraak, Innocent Agbo, Mottaqiallah Taouil, Said Hamdioui, Pieter Weckx, Stefan Cosemans, Francky Catthoor
2019	J	`jnl`	Parametric and Functional Degradation Analysis of Complete 14-nm FinFET SRAM. IEEE Trans. Very Large Scale Integr. Syst. Daniel Kraak, Mottaqiallah Taouil, Innocent Agbo, Said Hamdioui, Pieter Weckx, Stefan Cosemans, Francky Catthoor
2018	—	`conf`	Analytic variability study of inference accuracy in RRAM arrays with a binary tree winner-take-all circuit for neuromorphic applications. ESSDERC Jonas Doevenspeck, Robin Degraeve, Stefan Cosemans, Philippe Roussel, Bram-Ernst Verhoef, Rudy Lauwereins, Wim Dehaene
2018	A	`conf`	Degradation analysis of high performance 14nm FinFET SRAM. DATE Daniel Kraak, Innocent Agbo, Mottaqiallah Taouil, Said Hamdioui, Pieter Weckx, Stefan Cosemans, Francky Catthoor
2018	J	`jnl`	Impact and mitigation of SRAM read path aging. Microelectron. Reliab. Innocent Agbo, Mottaqiallah Taouil, Daniel Kraak, Said Hamdioui, Pieter Weckx, Stefan Cosemans, Francky Catthoor, Wim Dehaene
2018	—	`conf`	Study of breakdown in STT-MRAM using ramped voltage stress and all-in-one maximum likelihood fit. ESSDERC Simon Van Beek, Philippe Roussel, Barry J. O'Sullivan, Robin Degraeve, Stefan Cosemans, Dimitri Linten, Gouri Sankar Kar
2017	—	`conf`	Dedicated technology threshold voltage tuning for 6T SRAM beyond N7. ICICDT Mohit Kumar Gupta, Pieter Weckx, Stefan Cosemans, Pieter Schuddinck, Rogier Baert, Doyoung Jang, Yasser Sherazi, Praveen Raghavan, Alessio Spessot, Anda Mocuta, Wim Dehaene
2017	—	`conf`	Device circuit and technology co-optimisation for FinFET based 6T SRAM cells beyond N7. ESSDERC Mohit Kumar Gupta, Pieter Weckx, Stefan Cosemans, Pieter Schuddinck, Rogier Baert, Dmitry Yakimets, Doyoung Jang, Yasser Sherazi, Praveen Raghavan, Alessio Spessot, Anda Mocuta, Wim Dehaene
2017	J	`jnl`	Impact and Mitigation of Sense Amplifier Aging Degradation Using Realistic Workloads. IEEE Trans. Very Large Scale Integr. Syst. Daniel Kraak, Mottaqiallah Taouil, Innocent Agbo, Said Hamdioui, Pieter Weckx, Stefan Cosemans, Francky Catthoor
2017	A	`conf`	Mitigation of sense amplifier degradation using input switching. DATE Daniel Kraak, Innocent Agbo, Mottaqiallah Taouil, Said Hamdioui, Pieter Weckx, Stefan Cosemans, Francky Catthoor, Wim Dehaene
2016	C	`conf`	Comparative BTI analysis for various sense amplifier designs. DDECS Innocent Agbo, Mottaqiallah Taouil, Said Hamdioui, Pieter Weckx, Stefan Cosemans, Praveen Raghavan, Francky Catthoor
2016	—	`conf`	Quantification of Sense Amplifier Offset Voltage Degradation due to Zero-and Run-Time Variability. ISVLSI Innocent Agbo, Mottaqiallah Taouil, Said Hamdioui, Pieter Weckx, Stefan Cosemans, Praveen Raghavan, Francky Catthoor, Wim Dehaene
2016	B	`conf`	Read path degradation analysis in SRAM. ETS Innocent Agbo, Mottaqiallah Taouil, Said Hamdioui, Pieter Weckx, Stefan Cosemans, Francky Catthoor, Wim Dehaene
2015	—	`conf`	BTI analysis of SRAM write driver. IDT Innocent Agbo, Mottaqiallah Taouil, Said Hamdioui, Pieter Weckx, Stefan Cosemans, Francky Catthoor
2015	—	`conf`	Comparative analysis of RD and Atomistic trap-based BTI models on SRAM Sense Amplifier. DTIS Innocent Agbo, Mottaqiallah Taouil, Said Hamdioui, Stefan Cosemans, Pieter Weckx, Praveen Raghavan, Francky Catthoor
2015	—	`conf`	NEMsCAM: A novel CAM cell based on nano-electro-mechanical switch and CMOS for energy efficient TLBs. NANOARCH Azam Seyedi, Vasileios Karakostas, Stefan Cosemans, Adrián Cristal, Mario Nemirovsky, Osman S. Unsal
2015	—	`conf`	STT-MRAM cell design with partial source line planes: improving the trade-off between area and series resistance. NVMSA Raf Appeltans, Stefan Cosemans, Praveen Raghavan, Diederik Verkest, Liesbet Van der Perre, Wim Dehaene
2012	J	`jnl`	A 65 nm, 850 MHz, 256 kbit, 4.3 pJ/access, Ultra Low Leakage Power Memory Using Dynamic Cell Stability and a Dual Swing Data Link. IEEE J. Solid State Circuits Bram Rooseleer, Stefan Cosemans, Wim Dehaene
2012	—	`conf`	Analysis of the effect of cell parameters on the maximum RRAM array size considering both read and write. ESSDERC Leqi Zhang, Stefan Cosemans, Dirk J. Wouters, Guido Groeseneken, Malgorzata Jurczak
2012	J	`jnl`	Ultra Low-Energy SRAM Design for Smart Ubiquitous Sensors. IEEE Micro Vibhu Sharma, Stefan Cosemans, Maryam Ashouei, Jos Huisken, Francky Catthoor, Wim Dehaene
2012	A	`conf`	Ultra low power litho friendly local assist circuitry for variability resilient 8T SRAM. DATE Vibhu Sharma, Stefan Cosemans, Maryam Ashouei, Jos Huisken, Francky Catthoor, Wim Dehaene
2011	—	`conf`	8T SRAM with Mimicked Negative Bit-lines and Charge Limited Sequential sense amplifier for wireless sensor nodes. ESSCIRC Vibhu Sharma, Stefan Cosemans, Maryam Ashouei, Jos Huisken, Francky Catthoor, Wim Dehaene
2011	J	`jnl`	A 4.4 pJ/Access 80 MHz, 128 kbit Variability Resilient SRAM With Multi-Sized Sense Amplifier Redundancy. IEEE J. Solid State Circuits Vibhu Sharma, Stefan Cosemans, Maryam Ashouei, Jos Huisken, Francky Catthoor, Wim Dehaene
2011	—	`conf`	A 65 nm, 850 MHz, 256 kbit, 4.3 pJ/access, ultra low leakage power memory using dynamic cell stability and a dual swing data link. ESSCIRC Bram Rooseleer, Stefan Cosemans, Wim Dehaene
2011	—	`conf`	A low leakage 500MHz 2T embedded dynamic memory with integrated semi-transparent refresh. ESSCIRC Anselme Vignon, Stefan Cosemans, Wim Dehaene
2010	—	`conf`	A 4.4pJ/access 80MHz, 2K word } 64b memory with write masking feature and variability resilient multi-sized sense amplifier redundancy for wireless sensor nodes applications. ESSCIRC Vibhu Sharma, Stefan Cosemans, Maryam Ashouei, Jos Huisken, Francky Catthoor, Wim Dehaene
2009	J	`jnl`	A 3.6 pJ/Access 480 MHz, 128 kb On-Chip SRAM With 850 MHz Boost Mode in 90 nm CMOS With Tunable Sense Amplifiers. IEEE J. Solid State Circuits Stefan Cosemans, Wim Dehaene, Francky Catthoor
2009	A	`conf`	A novel DRAM architecture as a low leakage alternative for SRAM caches in a 3D interconnect context. DATE Anselme Vignon, Stefan Cosemans, Wim Dehaene, Pol Marchal, Marco Facchini
2008	—	`conf`	A 3.6pJ/access 480MHz, 128Kbit on-Chip SRAM with 850MHz boost mode in 90nm CMOS with tunable sense amplifiers to cope with variability. ESSCIRC Stefan Cosemans, Wim Dehaene, Francky Catthoor
2007	J	`jnl`	A Low-Power Embedded SRAM for Wireless Applications. IEEE J. Solid State Circuits Stefan Cosemans, Wim Dehaene, Francky Catthoor
2007	—	`conf`	Embedded SRAM design in deep deep submicron technologies. ESSCIRC Wim Dehaene, Stefan Cosemans, Anselme Vignon, F. Catthoora, Peter Geens