Stanislav Sedukhin

34 papers A 2C 6Misc 6Journal 7Unranked 12

Year	Rank	Type	Title / Venue / Authors
2025	—	`conf`	Design and Power-Efficiency Analysis of FPGA-Based Dot and Outer Product Units. MCSoC Kyoji Awaki, Yoichi Tomioka, Yuichi Okuyama, Hiroshi Saito, Shogo Semba, Stanislav Sedukhin, Yuta Takahashi, Sumio Morioka
2025	—	`conf`	System and Method for Accelerating Multilinear Tensor Transformations Using an Isomorphic Architecture and Efficient Sparse Processing. MCSoC Stanislav Sedukhin, Yoichi Tomioka, Kazuya Matsumoto, Yuichi Okuyama
2025	J	`jnl`	TriADA: Massively Parallel Trilinear Matrix-by-Tensor Multiply-Add Algorithm and Device Architecture for the Acceleration of 3D Discrete Transformations. CoRR Stanislav Sedukhin, Yoichi Tomioka, Kazuya Matsumoto, Yuichi Okuyama
2022	—	`conf`	High Performance Software Systolic Array Computing of Multi-channel Convolution on a GPU. ICCSA (1) Kazuya Matsumoto, Yoichi Tomioka, Stanislav Sedukhin
2022	J	`jnl`	In Search of the Performance- and Energy-Efficient CNN Accelerators. IEICE Trans. Electron. Stanislav Sedukhin, Yoichi Tomioka, Kohei Yamamoto
2021	—	`conf`	In Search of the Performance- and Energy-Efficient CNN Accelerators. COOL CHIPS Stanislav Sedukhin, Yoichi Tomioka, Kohei Yamamoto
2019	—	`conf`	Brain-inspired Co-design of Algorithm/Architecture for CNN Accelerators. IIAI-AAI Stanislav Sedukhin, Kazuya Matsumoto, Yoichi Tomioka
2018	J	`jnl`	Evaluations of OpenCL-written tsunami simulation on FPGA and comparison with GPU implementation. J. Supercomput. Fumiya Kono, Naohito Nakasato, Kensaku Hayashi, Alexander Vazhenin, Stanislav Sedukhin
2015	J	`jnl`	Stream Computation of Shallow Water Equation Solver for FPGA-based 1D Tsunami Simulation. SIGARCH Comput. Archit. News Kentaro Sano, Fumiya Kono, Naohito Nakasato, Alexander Vazhenin, Stanislav Sedukhin
2014	J	`jnl`	Image scrambling on a "mesh-of-tori" architecture. Scalable Comput. Pract. Exp. Maria Ganzha, Marcin Paprzycki, Stanislav Sedukhin
2014	C	`conf`	Performance analysis of scalable algorithms for 3D linear transforms. FedCSIS Ivan Lirkov, Marcin Paprzycki, Maria Ganzha, Stanislav Sedukhin, Pawel Gepner
2013	C	`conf`	Library for Matrix Multiplication-based Data Manipulation on a "Mesh-of-Tori" Architecture. FedCSIS Maria Ganzha, Marcin Paprzycki, Stanislav Sedukhin
2011	C	`conf`	Object Oriented Model of Generalized Matrix Multipication. FedCSIS Maria Ganzha, Stanislav Sedukhin, Marcin Paprzycki
2005	C	`conf`	A Matrix Processor for Math-intensive Applications. CAINE Stanislav Sedukhin, Mostafa I. Soliman
2005	C	`conf`	Parallel Blocked Algorithm for Solving the Algebraic Path Problem on a Matrix Processor. HPCC Akihito Takahashi, Stanislav Sedukhin
2005	J	`jnl`	Performance Evaluation of Blas on the Trident Processor. Parallel Process. Lett. Mostafa I. Soliman, Stanislav Sedukhin
2003	—	`ed.`	Advances in Computer Systems Architecture, 8th Asia-Pacific Conference, ACSAC 2003, Aizu-Wakamatsu, Japan, September 23-26, 2003, Proceedings Asia-Pacific Computer Systems Architecture Conference Amos Omondi, Stanislav Sedukhin
2003	Misc	`conf`	BLAS on the Trident Processor: Implementation and Performance Evaluation. CATA Mostafa I. Soliman, Stanislav Sedukhin
2003	A	`conf`	Matrix Bidiagonalization on the Trident Processor. IPDPS Mostafa I. Soliman, Stanislav Sedukhin
2003	—	`conf`	Parallel LU-decomposition on Pentium Streaming SIMD Extensions. ISHPC Akihito Takahashi, Mostafa I. Soliman, Stanislav Sedukhin
2003	A	`conf`	Trident: Technology-Scalable Architecture for Data Parallel Application. IPDPS Stanislav Sedukhin, Mostafa I. Soliman
2002	Misc	`conf`	A Multi-level ISA Processor for Accelerating Data Parallel Applications. PDPTA Mostafa I. Soliman, Stanislav Sedukhin
2002	C	`conf`	Performance Analysis of SVD Algorithm on the Trident Processor. CW Mostafa I. Soliman, Stanislav Sedukhin
2001	—	`conf`	Pattern Dependent Reconstruction of Raster Digital Elevation Models from Contour Maps. VIIP Vladimir V. Savchenko, Stanislav Sedukhin
2000	—	`conf`	Design of Multi-dimensional DCT Array Processors for Video Applications. Euro-Par Shietung Peng, Stanislav Sedukhin
2000	Misc	`conf`	Performance Evaluation of the Clustered Web Server. PDPTA T. Takigahira, Stanislav Sedukhin
1999	—	`conf`	A new scalable array processor for two-dimensional discrete Fourier transform. PARCO Shietung Peng, Stanislav Sedukhin, Hiroshi Nagata
1999	Misc	`conf`	Design Of I/O Efficient, Scalable Array Processors for Multi-dimensional DFT. PDPTA Shietung Peng, Stanislav Sedukhin, Hiroshi Nagata
1997	Misc	`conf`	An Interactive Graphic Tool for Systematic Design and Analysis of VLSI Array Processors. PDPTA Stanislav Sedukhin, Igor S. Sedukhin
1996	J	`jnl`	Array Processors Design for Division-free Linear System Solving. Comput. J. Shietung Peng, Stanislav Sedukhin
1996	—	`conf`	Parallel Algorithm And Architecture For Two-Step Division-Free Gaussian Elimination. ASAP Shietung Peng, Stanislav Sedukhin, Igor S. Sedukhin
1996	Misc	`conf`	Parallel Rendering with the Network Linda System. PDPTA Stanislav Sedukhin, Igor S. Sedukhin
1994	—	`conf`	Systematic Approach and Software Tool for Systolic Design. CONPAR Stanislav Sedukhin, Igor S. Sedukhin
1990	—	`conf`	Systolic Array Architecture for Two-Dimensional Discrete Fourier Transform. CONPAR Stanislav Sedukhin