Srinivasan Murali

73 papers A* 8A 12B 1C 4Misc 3Journal 22Unranked 20

Year	Rank	Type	Title / Venue / Authors
2026	J	`jnl`	Adversarial Robustness of Deep Learning Models for Inland Water Body Segmentation From SAR Images. IEEE Access Siddharth Kothari, Srinivasan Murali, Sankalp Kothari, Ujjwal Verma, Jaya Sreevalsan-Nair
2025	J	`jnl`	Adversarial Robustness of Deep Learning Models for Inland Water Body Segmentation from SAR Images. CoRR Siddharth Kothari, Srinivasan Murali, Sankalp Kothari, Ujjwal Verma, Jaya Sreevalsan-Nair
2025	B	`conf`	Continuous User Authentication for Extended Reality Using Pupil Reflexive Mechanisms as a Biometric. MobiHoc Shuaikang Hou, Muyao Tang, Srinivasan Murali, Huadi Zhu
2025	A	`conf`	SnoopDog: Detecting USB Bus Sniffers Using Responsive EMR. ACSAC Srinivasan Murali, YoungTak Cho, Huadi Zhu, Pan Li, Ming Li
2023	A	`conf`	Continuous Authentication Using Human-Induced Electric Potential. ACSAC Srinivasan Murali, Wenqiang Jin, Vighnesh Sivaraman, Huadi Zhu, Tianxi Ji, Pan Li, Ming Li
2022	J	`jnl`	EyeQoE: A Novel QoE Assessment Model for 360-degree Videos Using Ocular Behaviors. Proc. ACM Interact. Mob. Wearable Ubiquitous Technol. Huadi Zhu, Tianhao Li, Chaowei Wang, Wenqiang Jin, Srinivasan Murali, Mingyan Xiao, Dongqing Ye, Ming Li
2021	J	`jnl`	CycleGuard: A Smartphone-based Assistive Tool for Cyclist Safety Using Acoustic Ranging. Proc. ACM Interact. Mob. Wearable Ubiquitous Technol. Wenqiang Jin, Srinivasan Murali, YoungTak Cho, Huadi Zhu, Tianhao Li, Rachael Thompson Panik, Anika Rimu, Shuchisnigdha Deb, Kari E. Watkins, Xu Yuan, Ming Li
2021	A*	`conf`	Periscope: A Keystroke Inference Attack Using Human Coupled Electromagnetic Emanations. CCS Wenqiang Jin, Srinivasan Murali, Huadi Zhu, Ming Li
2020	J	`jnl`	BlinKey: A Two-Factor User Authentication Method for Virtual Reality Devices. Proc. ACM Interact. Mob. Wearable Ubiquitous Technol. Huadi Zhu, Wenqiang Jin, Mingyan Xiao, Srinivasan Murali, Ming Li
2020	A*	`conf`	Harnessing the Ambient Radio Frequency Noise for Wearable Device Pairing. CCS Wenqiang Jin, Ming Li, Srinivasan Murali, Linke Guo
2020	A*	`conf`	Towards 3D human pose construction using wifi. MobiCom Wenjun Jiang, Hongfei Xue, Chenglin Miao, Shiyang Wang, Sen Lin, Chong Tian, Srinivasan Murali, Haochen Hu, Zhi Sun, Lu Su
2018	J	`jnl`	Online Obstructive Sleep Apnea Detection on Medical Wearable Sensors. IEEE Trans. Biomed. Circuits Syst. Grégoire Surrel, Amir Aminifar, Francisco J. Rincón, Srinivasan Murali, David Atienza
2016	—	`conf`	Low-Power Wearable System for Real-Time Screening of Obstructive Sleep Apnea. ISVLSI Grégoire Surrel, Francisco J. Rincón, Srinivasan Murali, David Atienza
2016	J	`jnl`	Methods for reliable estimation of pulse transit time and blood pressure variations using smartphone sensors. Microprocess. Microsystems Alair Dias Junior, Srinivasan Murali, Francisco J. Rincón, David Atienza
2016	A	`conf`	Touch-based system for beat-to-beat impedance cardiogram acquisition and hemodynamic parameters estimation. DATE Dionisije Sopic, Srinivasan Murali, Francisco J. Rincón, David Atienza
2016	C	`conf`	Ultra-Low Power Estimation of Heart Rate Under Physical Activity Using a Wearable Photoplethysmographic System. DSD Elisabetta De Giovanni, Srinivasan Murali, Francisco J. Rincón, David Atienza
2015	—	`conf`	A Wearable Device for Physical and Emotional Health Monitoring. CinC Srinivasan Murali, Francisco J. Rincón, David Atienza
2015	—	`conf`	Design of ultra-low-power smart wearable systems. LATS Grégoire Surrel, Francisco J. Rincón, Srinivasan Murali, David Atienza
2015	—	`conf`	Energy-aware embedded classifier design for real-time emotion analysis. EMBC Manoj Padmanabhan, Srinivasan Murali, Francisco J. Rincón, David Atienza
2015	C	`conf`	Estimation of Blood Pressure and Pulse Transit Time Using Your Smartphone. DSD Alair Dias Junior, Srinivasan Murali, Francisco J. Rincón, David Atienza
2015	—	`conf`	Real-Time Probabilistic Heart-Beat Classification and Correction for Embedded Systems. CinC Grégoire Surrel, Francisco J. Rincón, Srinivasan Murali, David Atienza
2014	A*	`conf`	Ultra-Low Power Design of Wearable Cardiac Monitoring Systems. DAC Rubén Braojos, Hossein Mamaghanian, Alair Dias Junior, Giovanni Ansaloni, David Atienza, Francisco J. Rincón, Srinivasan Murali
2013	J	`jnl`	Computing Accurate Performance Bounds for Best Effort Networks-on-Chip. IEEE Trans. Computers Dara Rahmati, Srinivasan Murali, Luca Benini, Federico Angiolini, Giovanni De Micheli, Hamid Sarbazi-Azad
2013	J	`jnl`	Designing best effort networks-on-chip to meet hard latency constraints. ACM Trans. Embed. Comput. Syst. Ciprian Seiculescu, Dara Rahmati, Srinivasan Murali, Hamid Sarbazi-Azad, Luca Benini, Giovanni De Micheli
2012	J	`jnl`	A Buffer-Sizing Algorithm for Network-on-Chips with Multiple Voltage-Frequency Islands. J. Electr. Comput. Eng. Anish S. Kumar, M. Pawan Kumar, Srinivasan Murali, V. Kamakoti, Luca Benini, Giovanni De Micheli
2011	—	`ch.`	3D Network on Chip Topology Synthesis: Designing Custom Topologies for Chip Stacks. 3D Integration for NoC-based SoC Architectures Ciprian Seiculescu, Srinivasan Murali, Luca Benini, Giovanni De Micheli
2011	—	`conf`	A DRAM Centric NoC Architecture and Topology Design Approach. ISVLSI Ciprian Seiculescu, Srinivasan Murali, Luca Benini, Giovanni De Micheli
2011	—	`conf`	A Method for Integrating Network-on-Chip Topologies with 3D ICs. ISVLSI M. Pawan Kumar, Anish S. Kumar, Srinivasan Murali, Luca Benini, Kamakoti Veezhinathan
2011	—	`conf`	A Simulation Based Buffer Sizing Algorithm for Network on Chips. ISVLSI Anish S. Kumar, M. Pawan Kumar, Srinivasan Murali, V. Kamakoti, Luca Benini, Giovanni De Micheli
2011	—	`ch.`	Design and Analysis of NoCs for Low-Power 2D and 3D SoCs. Low Power Networks-on-Chip Ciprian Seiculescu, Srinivasan Murali, Luca Benini, Giovanni De Micheli
2010	A	`conf`	A method to remove deadlocks in Networks-on-Chips with Wormhole flow control. DATE Ciprian Seiculescu, Srinivasan Murali, Luca Benini, Giovanni De Micheli
2010	J	`jnl`	Comparative Analysis of NoCs for Two-Dimensional Versus Three-Dimensional SoCs Supporting Multiple Voltage and Frequency Islands. IEEE Trans. Circuits Syst. II Express Briefs Ciprian Seiculescu, Srinivasan Murali, Luca Benini, Giovanni De Micheli
2010	—	`conf`	Design of networks on chips for 3D ICs. ASP-DAC Srinivasan Murali, Luca Benini, Giovanni De Micheli
2010	A*	`conf`	Networks on Chips: from research to products. DAC Giovanni De Micheli, Ciprian Seiculescu, Srinivasan Murali, Luca Benini, Federico Angiolini, Antonio Pullini
2010	J	`jnl`	SunFloor 3D: A Tool for Networks on Chip Topology Synthesis for 3-D Systems on Chips. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Ciprian Seiculescu, Srinivasan Murali, Luca Benini, Giovanni De Micheli
2009	—	`conf`	A floorplan-aware interactive tool flow for NoC design and synthesis. SoCC Mohammad Reza Kakoee, Federico Angiolini, Srinivasan Murali, Antonio Pullini, Ciprian Seiculescu, Luca Benini
2009	A	`conf`	A method for calculating hard QoS guarantees for Networks-on-Chip. ICCAD Dara Rahmati, Srinivasan Murali, Luca Benini, Federico Angiolini, Giovanni De Micheli, Hamid Sarbazi-Azad
2009	—	`book`	Designing Reliable and Efficient Networks on Chips Srinivasan Murali
2009	Misc	`conf`	Minimization of the reconfiguration latency for the mapping of applications on FPGA-based systems. CODES+ISSS Vincenzo Rana, Srinivasan Murali, David Atienza, Marco D. Santambrogio, Luca Benini, Donatella Sciuto
2009	A*	`conf`	NoC topology synthesis for supporting shutdown of voltage islands in SoCs. DAC Ciprian Seiculescu, Srinivasan Murali, Luca Benini, Giovanni De Micheli
2009	J	`jnl`	Processor Speed Control With Thermal Constraints. IEEE Trans. Circuits Syst. I Regul. Pap. Almir Mutapcic, Stephen P. Boyd, Srinivasan Murali, David Atienza, Giovanni De Micheli, Rajesh Gupta
2009	A	`conf`	SunFloor 3D: A tool for Networks On Chip topology synthesis for 3D systems on chips. DATE Ciprian Seiculescu, Srinivasan Murali, Luca Benini, Giovanni De Micheli
2009	—	`conf`	Synthesis of networks on chips for 3D systems on chips. ASP-DAC Srinivasan Murali, Ciprian Seiculescu, Luca Benini, Giovanni De Micheli
2008	J	`jnl`	Network-on-Chip design and synthesis outlook. Integr. David Atienza, Federico Angiolini, Srinivasan Murali, Antonio Pullini, Luca Benini, Giovanni De Micheli
2008	A	`conf`	Temperature Control of High-Performance Multi-core Platforms Using Convex Optimization. DATE Srinivasan Murali, Almir Mutapcic, David Atienza, Rajesh Gupta, Stephen P. Boyd, Luca Benini, Giovanni De Micheli
2007	J	`jnl`	A Method for Routing Packets Across Multiple Paths in NoCs with In-Order Delivery and Fault-Tolerance Gaurantees. VLSI Design Srinivasan Murali, David Atienza, Luca Benini, Giovanni De Micheli
2007	J	`jnl`	An Application-Specific Design Methodology for On-Chip Crossbar Generation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Srinivasan Murali, Luca Benini, Giovanni De Micheli
2007	J	`jnl`	An Application-Specific Design Methodology for STbus Crossbar Generation CoRR Srinivasan Murali, Giovanni De Micheli
2007	J	`jnl`	Bringing NoCs to 65 nm. IEEE Micro Antonio Pullini, Federico Angiolini, Srinivasan Murali, David Atienza, Giovanni De Micheli, Luca Benini
2007	—	`conf`	Early wire characterization for predictable network-on-chip global interconnects. SLIP Ilhan Hatirnaz, Stéphane Badel, Nuria Pazos, Yusuf Leblebici, Srinivasan Murali, David Atienza, Giovanni De Micheli
2007	—	`conf`	NoC Design and Implementation in 65nm Technology. NOCS Antonio Pullini, Federico Angiolini, Paolo Meloni, David Atienza, Srinivasan Murali, Luigi Raffo, Giovanni De Micheli, Luca Benini
2007	J	`jnl`	Synthesis of Predictable Networks-on-Chip-Based Interconnect Architectures for Chip Multiprocessors. IEEE Trans. Very Large Scale Integr. Syst. Srinivasan Murali, David Atienza, Paolo Meloni, Salvatore Carta, Luca Benini, Giovanni De Micheli, Luigi Raffo
2007	Misc	`conf`	Temperature-aware processor frequency assignment for MPSoCs using convex optimization. CODES+ISSS Srinivasan Murali, Almir Mutapcic, David Atienza, Rajesh Gupta, Stephen P. Boyd, Giovanni De Micheli
2007	J	`jnl`	Timing-Error-Tolerant Network-on-Chip Design Methodology. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Rutuparna Tamhankar, Srinivasan Murali, Stergios Stergiou, Antonio Pullini, Federico Angiolini, Luca Benini, Giovanni De Micheli
2006	Misc	`conf`	A buffer-sizing algorithm for networks on chip using TDMA and credit-based end-to-end flow control. CODES+ISSS Martijn Coenen, Srinivasan Murali, Andrei Radulescu, Kees Goossens, Giovanni De Micheli
2006	A	`conf`	A methodology for mapping multiple use-cases onto networks on chips. DATE Srinivasan Murali, Martijn Coenen, Andrei Radulescu, Kees Goossens, Giovanni De Micheli
2006	A*	`conf`	A multi-path routing strategy with guaranteed in-order packet delivery and fault-tolerance for networks on chip. DAC Srinivasan Murali, David Atienza, Luca Benini, Giovanni De Micheli
2006	—	`conf`	Comparison of a Timing-Error Tolerant Scheme with a Traditional Re-transmission Mechanism for Networks on Chips. SoC Srinivasan Murali, Rutuparna Tamhankar, Federico Angiolini, Antonio Pullini, David Atienza, Luca Benini, Giovanni De Micheli
2006	C	`conf`	Designing Message-Dependent Deadlock Free Networks on Chips for Application-Specific Systems on Chips. VLSI-SoC Srinivasan Murali, Paolo Meloni, Federico Angiolini, David Atienza, Salvatore Carta, Luca Benini, Giovanni De Micheli, Luigi Raffo
2006	—	`conf`	Designing Routing and Message-Dependent Deadlock Free Networks on Chips. VLSI-SoC (Selected Papers) Srinivasan Murali, Paolo Meloni, Federico Angiolini, David Atienza, Salvatore Carta, Luca Benini, Giovanni De Micheli, Luigi Raffo
2006	A	`conf`	Designing application-specific networks on chips with floorplan information. ICCAD Srinivasan Murali, Paolo Meloni, Federico Angiolini, David Atienza, Salvatore Carta, Luca Benini, Giovanni De Micheli, Luigi Raffo
2006	—	`conf`	Mapping and configuration methods for multi-use-case networks on chips. ASP-DAC Srinivasan Murali, Martijn Coenen, Andrei Radulescu, Kees Goossens, Giovanni De Micheli
2006	C	`conf`	Reliability Support for On-Chip Memories Using Networks-on-Chip. ICCD Federico Angiolini, David Atienza, Srinivasan Murali, Luca Benini, Giovanni De Micheli
2006	—	`conf`	Routing Aware Switch Hardware Customization for Networks on Chips. Nano-Net Paolo Meloni, Srinivasan Murali, Salvatore Carta, Massimo Camplani, Luigi Raffo, Giovanni De Micheli
2005	A	`conf`	An Application-Specific Design Methodology for STbus Crossbar Generation. DATE Srinivasan Murali, Giovanni De Micheli
2005	J	`jnl`	Analysis of Error Recovery Schemes for Networks on Chips. IEEE Des. Test Comput. Srinivasan Murali, Theo Theocharides, Narayanan Vijaykrishnan, Mary Jane Irwin, Luca Benini, Giovanni De Micheli
2005	—	`conf`	Design Methodologies and CAD Tool Flows for Networks on Chips. SoC Srinivasan Murali
2005	—	`conf`	Mapping and physical planning of networks-on-chip architectures with quality-of-service guarantees. ASP-DAC Srinivasan Murali, Luca Benini, Giovanni De Micheli
2005	J	`jnl`	NoC Synthesis Flow for Customized Domain Specific Multiprocessor Systems-on-Chip. IEEE Trans. Parallel Distributed Syst. Davide Bertozzi, Antoine Jalabert, Srinivasan Murali, Rutuparna Tamhankar, Stergios Stergiou, Luca Benini, Giovanni De Micheli
2005	—	`conf`	Performance driven reliable link design for networks on chips. ASP-DAC Rutuparna Tamhankar, Srinivasan Murali, Giovanni De Micheli
2004	A	`conf`	Bandwidth-Constrained Mapping of Cores onto NoC Architectures. DATE Srinivasan Murali, Giovanni De Micheli
2004	A*	`conf`	SUNMAP: a tool for automatic topology selection and generation for NoCs. DAC Srinivasan Murali, Giovanni De Micheli
2004	A	`conf`	×pipesCompiler: A Tool for Instantiating Application Specific Networks on Chip. DATE Antoine Jalabert, Srinivasan Murali, Luca Benini, Giovanni De Micheli