Srinivasa R. Sridhara

12 papers A* 1A 1C 1Misc 1Journal 5Unranked 2
YearRankTypeTitle / Venue / Authors
2011 J jnl
Microwatt Embedded Processor Platform for Medical System-on-Chip Applications.
IEEE J. Solid State Circuits
Srinivasa R. Sridhara, Michael DiRenzo, Srinivas Lingam, Seok-Jun Lee, Ra Blazquez, Jay Maxey, Samer Ghanem, Yu-Hung Lee, Rami A. Abdallah, Prashant Singh, Manish Goel
2011 — conf
Ultra-low power microcontrollers for portable, wearable, and implantable medical electronics.
ASP-DAC
Srinivasa R. Sridhara
2008 J jnl
Joint Equalization and Coding for On-Chip Bus Communication.
IEEE Trans. Very Large Scale Integr. Syst.
Srinivasa R. Sridhara, Ganesh Balamurugan, Naresh R. Shanbhag
2007 J jnl
Coding for Reliable On-Chip Buses: A Class of Fundamental Bounds and Practical Codes.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Srinivasa R. Sridhara, Naresh R. Shanbhag
2006 — —
Communication-Inspired Design of on -Chip Buses
Srinivasa R. Sridhara
2005 A conf
A low-power bus design using joint repeater insertion and coding.
ISLPED
Srinivasa R. Sridhara, Naresh R. Shanbhag
2005 Misc conf
Coding for Reliable On-Chip Buses: Fundamental Limits and Practical Codes.
VLSI Design
Srinivasa R. Sridhara, Naresh R. Shanbhag
2005 J jnl
Coding for system-on-chip networks: a unified framework.
IEEE Trans. Very Large Scale Integr. Syst.
Srinivasa R. Sridhara, Naresh R. Shanbhag
2005 — conf
Joint Equalization and Coding for On-Chip Bus Communication.
ISQED
Srinivasa R. Sridhara, Naresh R. Shanbhag, Ganesh Balamurugan
2004 C conf
Area and Energy-Efficient Crosstalk Avoidance Codes for On-Chip Buses.
ICCD
Srinivasa R. Sridhara, Arshad Ahmed, Naresh R. Shanbhag
2004 A* conf
Coding for system-on-chip networks: a unified framework.
DAC
Srinivasa R. Sridhara, Naresh R. Shanbhag
2004 J jnl
Reliable low-power digital signal processing via reduced precision redundancy.
IEEE Trans. Very Large Scale Integr. Syst.
Byonghyo Shim, Srinivasa R. Sridhara, Naresh R. Shanbhag