Srinivas Devadas

396 papers A* 75A 50B 11C 13Misc 11Journal 184Unranked 50

Year	Rank	Type	Title / Venue / Authors
2026	J	`jnl`	Making Sense of Private Advertising: A Principled Approach to a Complex Ecosystem. Proc. Priv. Enhancing Technol. Kyle Hogan, Alishah Chator, Gabriel Kaptchuk, Mayank Varia, Srinivas Devadas
2026	J	`jnl`	PAC-Private Databases. IACR Cryptol. ePrint Arch. Mayuri Sridhar, Michael A. Noguera, Chaitanyasuma Jain, Kevin Kristensen, Srinivas Devadas, Hanshen Xiao, Xiangyao Yu
2026	J	`jnl`	PAC-Private Responses with Adversarial Composition. CoRR Xiaochen Zhu, Mayuri Sridhar, Srinivas Devadas
2026	J	`jnl`	VROOM: Accelerating (Almost All) Number-Theoretic Cryptography Using Vectorization and the Residue Number System. IACR Cryptol. ePrint Arch. Simon Langowski, Kaiwen He, Srinivas Devadas
2025	J	`jnl`	Concretely-Efficient Multi-Key Homomorphic Secret Sharing and Applications. IACR Cryptol. ePrint Arch. Kaiwen He, Sacha Servan-Schreiber, Geoffroy Couteau, Srinivas Devadas
2025	J	`jnl`	Expected Constant Round Byzantine Broadcast under Dishonest Majority. J. ACM Jun Wan, Hanshen Xiao, Elaine Shi, Srinivas Devadas
2025	J	`jnl`	Making Sense of Private Advertising: A Principled Approach to a Complex Ecosystem. CoRR Kyle Hogan, Alishah Chator, Gabriel Kaptchuk, Mayank Varia, Srinivas Devadas
2025	J	`jnl`	Making Sense of Private Advertising: A Principled Approach to a Complex Ecosystem. IACR Cryptol. ePrint Arch. Kyle Hogan, Alishah Chator, Gabriel Kaptchuk, Mayank Varia, Srinivas Devadas
2025	A*	`conf`	One-Sided Bounded Noise: Theory, Optimization Algorithms and Applications. CCS Hanshen Xiao, Jun Wan, Elaine Shi, Srinivas Devadas
2025	J	`jnl`	PAC Privacy and Black-Box Privatization. IEEE Secur. Priv. Hanshen Xiao, Srinivas Devadas
2025	A*	`conf`	PAC-Private Algorithms. SP Mayuri Sridhar, Hanshen Xiao, Srinivas Devadas
2025	—	`conf`	Pseudorandom Correlation Functions for Garbled Circuits. TCC (2) Geoffroy Couteau, Srinivas Devadas, Alexander Koch, Sacha Servan-Schreiber
2025	J	`jnl`	Pseudorandom Correlation Functions for Garbled Circuits. IACR Cryptol. ePrint Arch. Geoffroy Couteau, Srinivas Devadas, Alexander Koch, Sacha Servan-Schreiber
2025	Misc	`conf`	Remote Direct Code Execution. HotNets Yibo Huang, Yiming Qiu, Daqian Ding, Patrick Tser Jern Kon, Yiwen Zhang, Yuzhou Mao, Archit Bhatnagar, Mosharaf Chowdhury, Srinivas Devadas, Jiarong Xing, Ang Chen
2025	J	`jnl`	Toward a Universal Cryptographic Accelerator. Computer Srinivas Devadas, Daniel Sánchez
2024	J	`jnl`	A Tensor Compiler with Automatic Data Packing for Simple and Efficient Fully Homomorphic Encryption. Proc. ACM Program. Lang. Aleksandar Krastev, Nikola Samardzic, Simon Langowski, Srinivas Devadas, Daniel Sánchez
2024	A*	`conf`	Accelerating Zero-Knowledge Proofs Through Hardware-Algorithm Co-Design. MICRO Nikola Samardzic, Simon Langowski, Srinivas Devadas, Daniel Sánchez
2024	A*	`conf`	Formal Privacy Proof of Data Encoding: The Possibility and Impossibility of Learnable Encryption. CCS Hanshen Xiao, G. Edward Suh, Srinivas Devadas
2024	J	`jnl`	PAC-Private Algorithms. IACR Cryptol. ePrint Arch. Mayuri Sridhar, Hanshen Xiao, Srinivas Devadas
2024	—	`conf`	QuietOT: Lightweight Oblivious Transfer with a Public-Key Setup. ASIACRYPT (2) Geoffroy Couteau, Lalita Devadas, Srinivas Devadas, Alexander Koch, Sacha Servan-Schreiber
2024	J	`jnl`	QuietOT: Lightweight Oblivious Transfer with a Public-Key Setup. IACR Cryptol. ePrint Arch. Geoffroy Couteau, Lalita Devadas, Srinivas Devadas, Alexander Koch, Sacha Servan-Schreiber
2023	A*	`conf`	A Theory to Instruct Differentially-Private Learning via Clipping Bias Reduction. SP Hanshen Xiao, Zihang Xiang, Di Wang, Srinivas Devadas
2023	J	`jnl`	Citadel: Side-Channel-Resistant Enclaves with Secure Shared Memory on a Speculative Out-of-Order Processor. CoRR Jules Drean, Miguel Gomez-Garcia, Thomas Bourgeat, Srinivas Devadas
2023	A*	`conf`	Geometry of Sensitivity: Twice Sampling and Hybrid Clipping in Differential Privacy with Optimal Gaussian Noise and Application to Deep Learning. CCS Hanshen Xiao, Jun Wan, Srinivas Devadas
2023	J	`jnl`	Geometry of Sensitivity: Twice Sampling and Hybrid Clipping in Differential Privacy with Optimal Gaussian Noise and Application to Deep Learning. CoRR Hanshen Xiao, Jun Wan, Srinivas Devadas
2023	—	`conf`	PAC Privacy: Automatic Privacy Measurement and Control of Data Processing. CRYPTO (2) Hanshen Xiao, Srinivas Devadas
2023	A*	`conf`	Remote Direct Memory Introspection. USENIX Security Symposium Hongyi Liu, Jiarong Xing, Yibo Huang, Danyang Zhuo, Srinivas Devadas, Ang Chen
2023	J	`jnl`	Robust Near-Optimal Arm Identification With Strongly-Adaptive Adversaries. IEEE Trans. Signal Process. Mayuri Sridhar, Srinivas Devadas
2023	A*	`conf`	Trellis: Robust and Scalable Metadata-private Anonymous Broadcast. NDSS Simon Langowski, Sacha Servan-Schreiber, Srinivas Devadas
2022	J	`jnl`	An Architecture to Accelerate Computation on Encrypted Data. IEEE Micro Axel Feldmann, Nikola Samardzic, Aleksandar Krastev, Srinivas Devadas, Ronald G. Dreslinski, Chris Peikert, Daniel Sánchez
2022	A*	`conf`	CraterLake: a hardware accelerator for efficient unbounded computation on encrypted data. ISCA Nikola Samardzic, Axel Feldmann, Aleksandar Krastev, Nathan Manohar, Nicholas Genise, Srinivas Devadas, Karim Eldefrawy, Chris Peikert, Daniel Sánchez
2022	A*	`conf`	Designing Hardware for Cryptography and Cryptography for Hardware. CCS Srinivas Devadas, Simon Langowski, Nikola Samardzic, Sacha Servan-Schreiber, Daniel Sánchez
2022	J	`jnl`	Differentially Private Deep Learning with ModelMix. CoRR Hanshen Xiao, Jun Wan, Srinivas Devadas
2022	—	`conf`	Litmus: Towards a Practical Database Management System with Verifiable ACID Properties and Transaction Correctness. SIGMOD Conference Yu Xia, Xiangyao Yu, Matthew Butrovich, Andrew Pavlo, Srinivas Devadas
2022	J	`jnl`	PAC Security: Automatic Privacy Measurement and Control of Data Processing. CoRR Hanshen Xiao, Srinivas Devadas
2022	A*	`conf`	Private Approximate Nearest Neighbor Search with Sublinear Communication. SP Sacha Servan-Schreiber, Simon Langowski, Srinivas Devadas
2022	J	`jnl`	Shanrang: Fully Asynchronous Proactive Secret Sharing with Dynamic Committees. IACR Cryptol. ePrint Arch. Yunzhou Yan, Yu Xia, Srinivas Devadas
2022	A*	`conf`	ShorTor: Improving Tor Network Latency via Multi-hop Overlay Routing. SP Kyle Hogan, Sacha Servan-Schreiber, Zachary Newman, Ben Weintraub, Cristina Nita-Rotaru, Srinivas Devadas
2022	J	`jnl`	ShorTor: Improving Tor Network Latency via Multi-hop Overlay Routing. CoRR Kyle Hogan, Sacha Servan-Schreiber, Zachary Newman, Ben Weintraub, Cristina Nita-Rotaru, Srinivas Devadas
2022	Misc	`conf`	Spectrum: High-bandwidth Anonymous Broadcast. NSDI Zachary Newman, Sacha Servan-Schreiber, Srinivas Devadas
2022	J	`jnl`	Trellis: Robust and Scalable Metadata-private Anonymous Broadcast. IACR Cryptol. ePrint Arch. Simon Langowski, Sacha Servan-Schreiber, Srinivas Devadas
2021	J	`jnl`	Accelerating Robot Dynamics Gradients on a CPU, GPU, and FPGA. IEEE Robotics Autom. Lett. Brian Plancher, Sabrina M. Neuman, Thomas Bourgeat, Scott Kuindersma, Srinivas Devadas, Vijay Janapa Reddi
2021	J	`jnl`	AdVeil: A Private Targeted-Advertising Ecosystem. IACR Cryptol. ePrint Arch. Sacha Servan-Schreiber, Kyle Hogan, Srinivas Devadas
2021	J	`jnl`	DAUnTLeSS: Data Augmentation and Uniform Transformation for Learning with Scalability and Security. IACR Cryptol. ePrint Arch. Hanshen Xiao, Srinivas Devadas
2021	A*	`conf`	F1: A Fast and Programmable Accelerator for Fully Homomorphic Encryption. MICRO Nikola Samardzic, Axel Feldmann, Aleksandar Krastev, Srinivas Devadas, Ronald G. Dreslinski, Christopher Peikert, Daniel Sánchez
2021	J	`jnl`	Lightweight Private Similarity Search. IACR Cryptol. ePrint Arch. Sacha Servan-Schreiber, Simon Langowski, Srinivas Devadas
2021	A*	`conf`	Robomorphic computing: a design methodology for domain-specific accelerators parameterized by robot morphology. ASPLOS Sabrina M. Neuman, Brian Plancher, Thomas Bourgeat, Thierry Tambe, Srinivas Devadas, Vijay Janapa Reddi
2021	J	`jnl`	Spectrum: High-Bandwidth Anonymous Broadcast with Malicious Security. IACR Cryptol. ePrint Arch. Zachary Newman, Sacha Servan-Schreiber, Srinivas Devadas
2021	J	`jnl`	The Art of Labeling: Task Augmentation for Private(Collaborative) Learning on Transformed Data. IACR Cryptol. ePrint Arch. Hanshen Xiao, Srinivas Devadas
2021	J	`jnl`	Towards Understanding Practical Randomness Beyond Noise: Differential Privacy and Mixup. IACR Cryptol. ePrint Arch. Hanshen Xiao, Srinivas Devadas
2020	J	`jnl`	A Retrospective on Path ORAM. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Emil Stefanov, Marten van Dijk, Elaine Shi, Christopher W. Fletcher, Ling Ren, Xiangyao Yu, Srinivas Devadas
2020	—	`conf`	Expected Constant Round Byzantine Broadcast Under Dishonest Majority. TCC (1) Jun Wan, Hanshen Xiao, Elaine Shi, Srinivas Devadas
2020	J	`jnl`	Expected Constant Round Byzantine Broadcast under Dishonest Majority. IACR Cryptol. ePrint Arch. Jun Wan, Hanshen Xiao, Elaine Shi, Srinivas Devadas
2020	A*	`conf`	On Differentially Private Stochastic Convex Optimization with Heavy-tailed Data. ICML Di Wang, Hanshen Xiao, Srinivas Devadas, Jinhui Xu
2020	—	`conf`	Round-Efficient Byzantine Broadcast Under Strongly Adaptive and Majority Corruptions. TCC (1) Jun Wan, Hanshen Xiao, Srinivas Devadas, Elaine Shi
2020	J	`jnl`	Round-Efficient Byzantine Broadcast under Strongly Adaptive and Majority Corruptions. IACR Cryptol. ePrint Arch. Jun Wan, Hanshen Xiao, Srinivas Devadas, Elaine Shi
2020	J	`jnl`	Taurus: Lightweight Parallel Logging for In-Memory Database Management Systems (Extended Version). CoRR Yu Xia, Xiangyao Yu, Andrew Pavlo, Srinivas Devadas
2020	J	`jnl`	Taurus: Lightweight Parallel Logging for In-Memory Database Management Systems. Proc. VLDB Endow. Yu Xia, Xiangyao Yu, Andrew Pavlo, Srinivas Devadas
2020	A*	`conf`	Towards Scalable Threshold Cryptosystems. SP Alin Tomescu, Robert Chen, Yiming Zheng, Ittai Abraham, Benny Pinkas, Guy Golan-Gueta, Srinivas Devadas
2020	Misc	`conf`	XRD: Scalable Messaging System with Cryptographic Privacy. NSDI Albert Kwon, David Lu, Srinivas Devadas
2019	A	`conf`	Benchmarking and Workload Analysis of Robot Dynamics Algorithms. IROS Sabrina M. Neuman, Twan Koolen, Jules Drean, Jason E. Miller, Srinivas Devadas
2019	J	`jnl`	Design and Implementation of the Ascend Secure Processor. IEEE Trans. Dependable Secur. Comput. Ling Ren, Christopher W. Fletcher, Albert Kwon, Marten van Dijk, Srinivas Devadas
2019	—	`conf`	LiTM: A Lightweight Deterministic Software Transactional Memory System. PMAM@PPoPP Yu Xia, Xiangyao Yu, William S. Moses, Julian Shun, Srinivas Devadas
2019	A*	`conf`	MI6: Secure Enclaves in a Speculative Out-of-Order Processor. MICRO Thomas Bourgeat, Ilia A. Lebedev, Andrew Wright, Sizhuo Zhang, Arvind, Srinivas Devadas
2019	A	`conf`	Sanctorum: A lightweight security monitor for secure enclaves. DATE Ilia A. Lebedev, Kyle Hogan, Jules Drean, David Kohlbrenner, Dayeol Lee, Krste Asanovic, Dawn Song, Srinivas Devadas
2019	J	`jnl`	Sanctorum: A lightweight security monitor for secure enclaves. IACR Cryptol. ePrint Arch. Ilia A. Lebedev, Kyle Hogan, Jules Drean, David Kohlbrenner, Dayeol Lee, Krste Asanovic, Dawn Song, Srinivas Devadas
2019	—	`conf`	Synchronous Byzantine Agreement with Expected O(1) Rounds, Expected O(n Financial Cryptography Ittai Abraham, Srinivas Devadas, Danny Dolev, Kartik Nayak, Ling Ren
2019	A*	`conf`	Transparency Logs via Append-Only Authenticated Dictionaries. CCS Alin Tomescu, Vivek Bhupatiraju, Dimitrios Papadopoulos, Charalampos Papamanthou, Nikos Triandopoulos, Srinivas Devadas
2019	J	`jnl`	Var-CNN: A Data-Efficient Website Fingerprinting Attack Based on Deep Learning. Proc. Priv. Enhancing Technol. Sanjit Bhat, David Lu, Albert Kwon, Srinivas Devadas
2019	J	`jnl`	XRD: Scalable Messaging System with Cryptographic Privacy. CoRR Albert Kwon, David Lu, Srinivas Devadas
2018	A*	`conf`	DAWG: A Defense Against Cache Timing Attacks in Speculative Execution Processors. MICRO Vladimir Kiriansky, Ilia A. Lebedev, Saman P. Amarasinghe, Srinivas Devadas, Joel S. Emer
2018	J	`jnl`	DAWG: A Defense Against Cache Timing Attacks in Speculative Execution Processors. IACR Cryptol. ePrint Arch. Vladimir Kiriansky, Ilia A. Lebedev, Saman P. Amarasinghe, Srinivas Devadas, Joel S. Emer
2018	—	`conf`	DynaFlow: An Efficient Website Fingerprinting Defense Based on Dynamically-Adjusting Flows. WPES@CCS David Lu, Sanjit Bhat, Albert Kwon, Srinivas Devadas
2018	A	`conf`	Invited Paper: Secure Boot and Remote Attestation in the Sanctum Processor. CSF Ilia Lebedev, Kyle Hogan, Srinivas Devadas
2018	J	`jnl`	MI6: Secure Enclaves in a Speculative Out-of-Order Processor. CoRR Thomas Bourgeat, Ilia A. Lebedev, Andrew Wright, Sizhuo Zhang, Arvind, Srinivas Devadas
2018	—	`conf`	Mission Assurance: Beyond Secure Processing. QRS Companion Michael Vai, David Whelihan, Jacob Leemaster, Haley Whitman, Willahelm Wan, Yunsi Fei, Roger Khazan, Ilia A. Lebedev, Kyle Hogan, Srinivas Devadas
2018	J	`jnl`	Path ORAM: An Extremely Simple Oblivious RAM Protocol. J. ACM Emil Stefanov, Marten van Dijk, Elaine Shi, T.-H. Hubert Chan, Christopher W. Fletcher, Ling Ren, Xiangyao Yu, Srinivas Devadas
2018	J	`jnl`	Sanctorum: A lightweight security monitor for secure enclaves. CoRR Ilia A. Lebedev, Kyle Hogan, Jules Drean, David Kohlbrenner, Dayeol Lee, Krste Asanovic, Dawn Song, Srinivas Devadas
2018	J	`jnl`	Secure Boot and Remote Attestation in the Sanctum Processor. IACR Cryptol. ePrint Arch. Ilia A. Lebedev, Kyle Hogan, Srinivas Devadas
2018	J	`jnl`	Sundial: Harmonizing Concurrency Control and Caching in a Distributed OLTP Database Management System. Proc. VLDB Endow. Xiangyao Yu, Yu Xia, Andrew Pavlo, Daniel Sánchez, Larry Rudolph, Srinivas Devadas
2018	J	`jnl`	Synchronous Byzantine Agreement with Expected O(1) Rounds, Expected O(n IACR Cryptol. ePrint Arch. Ittai Abraham, Srinivas Devadas, Danny Dolev, Kartik Nayak, Ling Ren
2018	J	`jnl`	Transparency Logs via Append-only Authenticated Dictionaries. IACR Cryptol. ePrint Arch. Alin Tomescu, Vivek Bhupatiraju, Dimitrios Papadopoulos, Charalampos Papamanthou, Nikos Triandopoulos, Srinivas Devadas
2018	J	`jnl`	Var-CNN and DynaFlow: Improved Attacks and Defenses for Website Fingerprinting. CoRR Sanjit Bhat, David Lu, Albert Kwon, Srinivas Devadas
2017	A*	`conf`	A Formal Foundation for Secure Remote Execution of Enclaves. CCS Pramod Subramanyan, Rohit Sinha, Ilia A. Lebedev, Srinivas Devadas, Sanjit A. Seshia
2017	J	`jnl`	A Formal Foundation for Secure Remote Execution of Enclaves. IACR Cryptol. ePrint Arch. Pramod Subramanyan, Rohit Sinha, Ilia A. Lebedev, Srinivas Devadas, Sanjit A. Seshia
2017	A*	`conf`	Atom: Horizontally Scaling Strong Anonymity. SOSP Albert Kwon, Henry Corrigan-Gibbs, Srinivas Devadas, Bryan Ford
2017	—	`conf`	Bandwidth Hard Functions for ASIC Resistance. TCC (1) Ling Ren, Srinivas Devadas
2017	J	`jnl`	Bandwidth Hard Functions for ASIC Resistance. IACR Cryptol. ePrint Arch. Ling Ren, Srinivas Devadas
2017	J	`jnl`	Banshee: Bandwidth-Efficient DRAM Caching Via Software/Hardware Cooperation. CoRR Xiangyao Yu, Christopher J. Hughes, Nadathur Satish, Onur Mutlu, Srinivas Devadas
2017	A*	`conf`	Banshee: bandwidth-efficient DRAM caching via software/hardware cooperation. MICRO Xiangyao Yu, Christopher J. Hughes, Nadathur Satish, Onur Mutlu, Srinivas Devadas
2017	A	`conf`	Brief Announcement: Practical Synchronous Byzantine Consensus. DISC Ittai Abraham, Srinivas Devadas, Kartik Nayak, Ling Ren
2017	A*	`conf`	Catena: Efficient Non-equivocation via Bitcoin. IEEE Symposium on Security and Privacy Alin Tomescu, Srinivas Devadas
2017	J	`jnl`	FPGA Implementation of a Cryptographically-Secure PUF Based on Learning Parity with Noise. Cryptogr. Chenglu Jin, Charles Herder, Ling Ren, Phuong Ha Nguyen, Benjamin Fuller, Srinivas Devadas, Marten van Dijk
2017	C	`conf`	Leveraging Hardware Isolation for Process Level Access Control & Authentication. SACMAT Syed Kamran Haider, Hamza Omar, Ilia A. Lebedev, Srinivas Devadas, Marten van Dijk
2017	—	`conf`	On Iterative Collision Search for LPN and Subset Sum. TCC (2) Srinivas Devadas, Ling Ren, Hanshen Xiao
2017	J	`jnl`	On Iterative Collision Search for LPN and Subset Sum. IACR Cryptol. ePrint Arch. Srinivas Devadas, Ling Ren, Hanshen Xiao
2017	J	`jnl`	Pervasive, dynamic authentication of physical items. Commun. ACM Meng-Day (Mandel) Yu, Srinivas Devadas
2017	J	`jnl`	Practical Synchronous Byzantine Consensus. CoRR Ling Ren, Kartik Nayak, Ittai Abraham, Srinivas Devadas
2017	J	`jnl`	Practical Synchronous Byzantine Consensus. IACR Cryptol. ePrint Arch. Ling Ren, Kartik Nayak, Ittai Abraham, Srinivas Devadas
2017	J	`jnl`	PriviPK: Certificate-less and secure email communication. Comput. Secur. Mashael AlSabah, Alin Tomescu, Ilia A. Lebedev, Dimitrios N. Serpanos, Srinivas Devadas
2017	J	`jnl`	Public Key Cryptosystems with Noisy Secret Keys. IACR Cryptol. ePrint Arch. Charles Herder, Benjamin Fuller, Marten van Dijk, Srinivas Devadas
2017	—	`conf`	Secure Hardware and Cryptography: Contrasts, Synergies and Challenges. ASHES@CCS Srinivas Devadas
2017	J	`jnl`	Secure Processors Part I: Background, Taxonomy for Secure Enclaves and Intel SGX Architecture. Found. Trends Electron. Des. Autom. Victor Costan, Ilia A. Lebedev, Srinivas Devadas
2017	J	`jnl`	Secure Processors Part II: Intel SGX Security Analysis and MIT Sanctum Architecture. Found. Trends Electron. Des. Autom. Victor Costan, Ilia A. Lebedev, Srinivas Devadas
2017	J	`jnl`	Trapdoor Computational Fuzzy Extractors and Stateless Cryptographically-Secure Physical Unclonable Functions. IEEE Trans. Dependable Secur. Comput. Charles Herder, Ling Ren, Marten van Dijk, Meng-Day (Mandel) Yu, Srinivas Devadas
2017	C	`conf`	Using Application-Level Thread Progress Information to Manage Power and Performance. ICCD Sabrina M. Neuman, Jason E. Miller, Daniel Sánchez, Srinivas Devadas
2016	J	`jnl`	A Lockdown Technique to Prevent Machine Learning on PUFs for Lightweight Authentication. IEEE Trans. Multi Scale Comput. Syst. Meng-Day (Mandel) Yu, Matthias Hiller, Jeroen Delvaux, Richard Sowell, Srinivas Devadas, Ingrid Verbauwhede
2016	J	`jnl`	Atom: Scalable Anonymity Resistant to Traffic Analysis. CoRR Albert Kwon, Henry Corrigan-Gibbs, Srinivas Devadas, Bryan Ford
2016	J	`jnl`	Beaver: A Decentralized Anonymous Marketplace with Secure Reputation. IACR Cryptol. ePrint Arch. Kyle Soska, Albert Kwon, Nicolas Christin, Srinivas Devadas
2016	J	`jnl`	Catena: Preventing Lies with Bitcoin. IACR Cryptol. ePrint Arch. Alin Tomescu, Srinivas Devadas
2016	J	`jnl`	Intel SGX Explained. IACR Cryptol. ePrint Arch. Victor Costan, Srinivas Devadas
2016	J	`jnl`	LDAC: Locality-Aware Data Access Control for Large-Scale Multicore Cache Hierarchies. ACM Trans. Archit. Code Optim. Qingchuan Shi, George Kurian, Farrukh Hijaz, Srinivas Devadas, Omer Khan
2016	J	`jnl`	Locality-aware data replication in the last-level cache for large scale multicores. J. Supercomput. Farrukh Hijaz, Qingchuan Shi, George Kurian, Srinivas Devadas, Omer Khan
2016	—	`conf`	Onion ORAM: A Constant Bandwidth Blowup Oblivious RAM. TCC (A2) Srinivas Devadas, Marten van Dijk, Christopher W. Fletcher, Ling Ren, Elaine Shi, Daniel Wichs
2016	J	`jnl`	Pervasive, Dynamic Authentication of Physical Items. ACM Queue Meng-Day (Mandel) Yu, Srinivas Devadas
2016	J	`jnl`	Proof of Space from Stacked Bipartite Graphs. IACR Cryptol. ePrint Arch. Ling Ren, Srinivas Devadas
2016	—	`conf`	Proof of Space from Stacked Expanders. TCC (B1) Ling Ren, Srinivas Devadas
2016	J	`jnl`	Riffle: An Efficient Communication System With Strong Anonymity. Proc. Priv. Enhancing Technol. Albert Kwon, David Lazar, Srinivas Devadas, Bryan Ford
2016	A*	`conf`	Sanctum: Minimal Hardware Extensions for Strong Software Isolation. USENIX Security Symposium Victor Costan, Ilia A. Lebedev, Srinivas Devadas
2016	B	`conf`	Tardis 2.0: Optimized Time Traveling Coherence for Relaxed Consistency Models. PACT Xiangyao Yu, Hongzhe Liu, Ethan Zou, Srinivas Devadas
2016	—	`conf`	TicToc: Time Traveling Optimistic Concurrency Control. SIGMOD Conference Xiangyao Yu, Andrew Pavlo, Daniel Sánchez, Srinivas Devadas
2015	Misc	`conf`	A Low-Latency, Low-Area Hardware Oblivious RAM Controller. FCCM Christopher W. Fletcher, Ling Ren, Albert Kwon, Marten van Dijk, Emil Stefanov, Dimitrios N. Serpanos, Srinivas Devadas
2015	J	`jnl`	A Proof of Correctness for the Tardis Cache Coherence Protocol. CoRR Xiangyao Yu, Muralidaran Vijayaraghavan, Srinivas Devadas
2015	A*	`conf`	Circuit Fingerprinting Attacks: Passive Deanonymization of Tor Hidden Services. USENIX Security Symposium Albert Kwon, Mashael AlSabah, David Lazar, Marc Dacier, Srinivas Devadas
2015	A*	`conf`	Constants Count: Practical Improvements to Oblivious RAM. USENIX Security Symposium Ling Ren, Christopher W. Fletcher, Albert Kwon, Emil Stefanov, Elaine Shi, Marten van Dijk, Srinivas Devadas
2015	A*	`conf`	Freecursive ORAM: [Nearly] Free Recursion and Integrity Verification for Position-based Oblivious RAM. ASPLOS Christopher W. Fletcher, Ling Ren, Albert Kwon, Marten van Dijk, Srinivas Devadas
2015	A*	`conf`	IMP: indirect memory prefetcher. MICRO Xiangyao Yu, Christopher J. Hughes, Nadathur Satish, Srinivas Devadas
2015	—	`conf`	Maximum-likelihood decoding of device-specific multi-bit symbols for reliable key generation. HOST Meng-Day (Mandel) Yu, Matthias Hiller, Srinivas Devadas
2015	B	`conf`	OSPREY: Implementation of Memory Consistency Models for Cache Coherence Protocols involving Invalidation-Free Data Access. PACT George Kurian, Qingchuan Shi, Srinivas Devadas, Omer Khan
2015	J	`jnl`	Onion ORAM: A Constant Bandwidth and Constant Client Storage ORAM (without FHE or SWHE). IACR Cryptol. ePrint Arch. Srinivas Devadas, Marten van Dijk, Christopher W. Fletcher, Ling Ren
2015	A*	`conf`	PrORAM: dynamic prefetcher for oblivious RAM. ISCA Xiangyao Yu, Syed Kamran Haider, Ling Ren, Christopher W. Fletcher, Albert Kwon, Marten van Dijk, Srinivas Devadas
2015	J	`jnl`	Sanctum: Minimal RISC Extensions for Isolated Execution. IACR Cryptol. ePrint Arch. Victor Costan, Ilia A. Lebedev, Srinivas Devadas
2015	J	`jnl`	TARDIS: Timestamp based Coherence Algorithm for Distributed Shared Memory. CoRR Xiangyao Yu, Srinivas Devadas
2015	J	`jnl`	Tardis 2.0: An Optimized Time Traveling Coherence Protocol. CoRR Xiangyao Yu, Srinivas Devadas
2015	B	`conf`	Tardis: Time Traveling Coherence Algorithm for Distributed Shared Memory. PACT Xiangyao Yu, Srinivas Devadas
2015	J	`jnl`	The Execution Migration Machine: Directoryless Shared-Memory Architecture. Computer Keun Sup Shim, Mieszko Lis, Omer Khan, Srinivas Devadas
2014	—	`conf`	A noise bifurcation architecture for linear additive physical functions. HOST Meng-Day (Mandel) Yu, David M'Raïhi, Ingrid Verbauwhede, Srinivas Devadas
2014	—	`conf`	A self-aware processor SoC using energy monitors integrated into power converters for self-adaptation. VLSIC Yildiz Sinangil, Sabrina M. Neuman, Mahmut E. Sinangil, Nathan Ickes, George Bezerra, Eric Lau, Jason E. Miller, Henry Hoffmann, Srinivas Devadas, Anantha P. Chandrakasan
2014	—	`conf`	Algorithms for scheduling task-based applications onto heterogeneous many-core architectures. HPEC Michel A. Kinsy, Srinivas Devadas
2014	—	`conf`	Author retrospective AEGIS: architecture for tamper-evident and tamper-resistant processing. ICS 25th Anniversary G. Edward Suh, Christopher W. Fletcher, Dwaine E. Clarke, Blaise Gassend, Marten van Dijk, Srinivas Devadas
2014	—	`conf`	Author retrospective for analytical cache models with applications to cache partitioning. ICS 25th Anniversary G. Edward Suh, George Kurian, Srinivas Devadas, Larry Rudolph
2014	J	`jnl`	Automated Design, Implementation, and Evaluation of Arbiter-based PUF on FPGA using Programmable Delay Lines. IACR Cryptol. ePrint Arch. Mehrdad Majzoobi, Akshat Kharaya, Farinaz Koushanfar, Srinivas Devadas
2014	J	`jnl`	Enhancing Oblivious RAM Performance Using Dynamic Prefetching. IACR Cryptol. ePrint Arch. Xiangyao Yu, Ling Ren, Christopher W. Fletcher, Albert Kwon, Marten van Dijk, Srinivas Devadas
2014	A*	`conf`	Locality-aware data replication in the Last-Level Cache. HPCA George Kurian, Srinivas Devadas, Omer Khan
2014	—	`conf`	Low-overhead hard real-time aware interconnect network router. HPEC Michel A. Kinsy, Srinivas Devadas
2014	J	`jnl`	Physical Unclonable Functions and Applications: A Tutorial. Proc. IEEE Charles Herder, Meng-Day (Mandel) Yu, Farinaz Koushanfar, Srinivas Devadas
2014	B	`conf`	Power modeling and other new features in the Graphite simulator. ISPASS George Kurian, Sabrina M. Neuman, George Bezerra, Anthony Giovinazzo, Srinivas Devadas, Jason E. Miller
2014	J	`jnl`	RAW Path ORAM: A Low-Latency, Low-Area Hardware ORAM Controller with Integrity Verification. IACR Cryptol. ePrint Arch. Christopher W. Fletcher, Ling Ren, Albert Kwon, Marten van Dijk, Emil Stefanov, Srinivas Devadas
2014	J	`jnl`	Ring ORAM: Closing the Gap Between Small and Large Client Storage Oblivious RAM. IACR Cryptol. ePrint Arch. Ling Ren, Christopher W. Fletcher, Albert Kwon, Emil Stefanov, Elaine Shi, Marten van Dijk, Srinivas Devadas
2014	J	`jnl`	Robust and Reverse-Engineering Resilient PUF Authentication and Key-Exchange by Substring Matching. IEEE Trans. Emerg. Top. Comput. Masoud Rostami, Mehrdad Majzoobi, Farinaz Koushanfar, Dan S. Wallach, Srinivas Devadas
2014	J	`jnl`	Simultaneous Alignment and Folding of Protein Sequences. J. Comput. Biol. Jérôme Waldispühl, Charles W. O'Donnell, Sebastian Will, Srinivas Devadas, Rolf Backofen, Bonnie Berger
2014	J	`jnl`	Staring into the Abyss: An Evaluation of Concurrency Control with One Thousand Cores. Proc. VLDB Endow. Xiangyao Yu, George Bezerra, Andrew Pavlo, Srinivas Devadas, Michael Stonebraker
2014	A*	`conf`	Suppressing the Oblivious RAM timing channel while making information leakage and program efficiency trade-offs. HPCA Christopher W. Fletcher, Ling Ren, Xiangyao Yu, Marten van Dijk, Omer Khan, Srinivas Devadas
2014	J	`jnl`	Thread Migration Prediction for Distributed Shared Caches. IEEE Comput. Archit. Lett. Keun Sup Shim, Mieszko Lis, Omer Khan, Srinivas Devadas
2014	J	`jnl`	Trapdoor Computational Fuzzy Extractors. IACR Cryptol. ePrint Arch. Charles Herder, Ling Ren, Marten van Dijk, Meng-Day (Mandel) Yu, Srinivas Devadas
2014	J	`jnl`	Unified Oblivious-RAM: Improving Recursive ORAM with Locality and Pseudorandomness. IACR Cryptol. ePrint Arch. Ling Ren, Christopher W. Fletcher, Xiangyao Yu, Albert Kwon, Marten van Dijk, Srinivas Devadas
2013	C	`conf`	A framework to accelerate sequential programs on homogeneous multicores. VLSI-SoC Christopher W. Fletcher, Rachael Harding, Omer Khan, Srinivas Devadas
2013	—	`conf`	Authenticated storage using small trusted hardware. CCSW Hsin-Jung Yang, Victor Costan, Nickolai Zeldovich, Srinivas Devadas
2013	J	`jnl`	Design Space Exploration and Optimization of Path Oblivious RAM in Secure Processors. IACR Cryptol. ePrint Arch. Ling Ren, Xiangyao Yu, Christopher W. Fletcher, Marten van Dijk, Srinivas Devadas
2013	A*	`conf`	Design space exploration and optimization of path oblivious RAM in secure processors. ISCA Ling Ren, Xiangyao Yu, Christopher W. Fletcher, Marten van Dijk, Srinivas Devadas
2013	C	`conf`	Design tradeoffs for simplicity and efficient verification in the Execution Migration Machine. ICCD Keun Sup Shim, Mieszko Lis, Myong Hyon Cho, Ilia A. Lebedev, Srinivas Devadas
2013	—	`conf`	Generalized external interaction with tamper-resistant hardware with bounded information leakage. CCSW Xiangyao Yu, Christopher W. Fletcher, Ling Ren, Marten van Dijk, Srinivas Devadas
2013	—	`conf`	Hardware-level thread migration in a 110-core shared-memory multiprocessor. Hot Chips Symposium Mieszko Lis, Keun Sup Shim, Brandon Cho, Ilia A. Lebedev, Srinivas Devadas
2013	A	`conf`	Heracles: a tool for fast RTL-based design space exploration of multicore processors. FPGA Michel A. Kinsy, Michael Pellauer, Srinivas Devadas
2013	—	`conf`	Integrity verification for path Oblivious-RAM. HPEC Ling Ren, Christopher W. Fletcher, Xiangyao Yu, Marten van Dijk, Srinivas Devadas
2013	A	`conf`	MARTHA: architecture for control and emulation of power electronics and smart grid systems. DATE Michel A. Kinsy, Ivan Celanovic, Omer Khan, Srinivas Devadas
2013	J	`jnl`	Optimal and Heuristic Application-Aware Oblivious Routing. IEEE Trans. Computers Michel A. Kinsy, Myong Hyon Cho, Keun Sup Shim, Mieszko Lis, G. Edward Suh, Srinivas Devadas
2013	J	`jnl`	PUF Modeling Attacks on Simulated and Silicon Data. IACR Cryptol. ePrint Arch. Ulrich Rührmair, Jan Sölter, Frank Sehnke, Xiaolin Xu, Ahmed Mahmoud, Vera Stoyanova, Gideon Dror, Jürgen Schmidhuber, Wayne P. Burleson, Srinivas Devadas
2013	J	`jnl`	PUF Modeling Attacks on Simulated and Silicon Data. IEEE Trans. Inf. Forensics Secur. Ulrich Rührmair, Jan Sölter, Frank Sehnke, Xiaolin Xu, Ahmed Mahmoud, Vera Stoyanova, Gideon Dror, Jürgen Schmidhuber, Wayne P. Burleson, Srinivas Devadas
2013	J	`jnl`	Path ORAM: An Extremely Simple Oblivious RAM Protocol. IACR Cryptol. ePrint Arch. Emil Stefanov, Marten van Dijk, Elaine Shi, Christopher W. Fletcher, Ling Ren, Xiangyao Yu, Srinivas Devadas
2013	A*	`conf`	Path ORAM: an extremely simple oblivious RAM protocol. CCS Emil Stefanov, Marten van Dijk, Elaine Shi, Christopher W. Fletcher, Ling Ren, Xiangyao Yu, Srinivas Devadas
2013	A*	`conf`	The locality-aware adaptive cache coherence protocol. ISCA George Kurian, Omer Khan, Srinivas Devadas
2013	J	`jnl`	Toward a Coherent Multicore Memory Model. Computer Srinivas Devadas
2012	B	`conf`	A low-overhead dynamic optimization framework for multicores. PACT Christopher W. Fletcher, Rachael Harding, Omer Khan, Srinivas Devadas
2012	J	`jnl`	Compilation Techniques for Efficient Encrypted Computation. IACR Cryptol. ePrint Arch. Christopher W. Fletcher, Marten van Dijk, Srinivas Devadas
2012	J	`jnl`	HORNET: A Cycle-Level Multicore Simulator. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Pengju Ren, Mieszko Lis, Myong Hyon Cho, Keun Sup Shim, Christopher W. Fletcher, Omer Khan, Nanning Zheng, Srinivas Devadas
2012	A	`conf`	Lynx: A Programmatic SAT Solver for the RNA-Folding Problem. SAT Vijay Ganesh, Charles W. O'Donnell, Mate Soos, Srinivas Devadas, Martin C. Rinard, Armando Solar-Lezama
2012	—	`conf`	Performance metrics and empirical results of a PUF cryptographic key generation ASIC. HOST Meng-Day (Mandel) Yu, Richard Sowell, Alok Singh, David M'Raïhi, Srinivas Devadas
2012	J	`jnl`	Selecting Spatiotemporal Patterns for Development of Parallel Applications. IEEE Trans. Parallel Distributed Syst. Henry Hoffmann, Anant Agarwal, Srinivas Devadas
2012	A*	`conf`	Self-aware computing in the Angstrom processor. DAC Henry Hoffmann, Jim Holt, George Kurian, Eric Lau, Martina Maggio, Jason E. Miller, Sabrina M. Neuman, Mahmut E. Sinangil, Yildiz Sinangil, Anant Agarwal, Anantha P. Chandrakasan, Srinivas Devadas
2012	—	`conf`	Slender PUF Protocol: A Lightweight, Robust, and Secure Authentication by Substring Matching. IEEE Symposium on Security and Privacy Workshops Mehrdad Majzoobi, Masoud Rostami, Farinaz Koushanfar, Dan S. Wallach, Srinivas Devadas
2012	—	`conf`	Towards an interpreter for efficient encrypted computation. CCSW Christopher W. Fletcher, Marten van Dijk, Srinivas Devadas
2011	J	`jnl`	A method for probing the mutational landscape of amyloid structure. Bioinform. Charles W. O'Donnell, Jérôme Waldispühl, Mieszko Lis, Randal Halfmann, Srinivas Devadas, Susan Lindquist, Bonnie Berger
2011	C	`conf`	ARCc: A case for an architecturally redundant cache-coherence architecture for large multicores. ICCD Omer Khan, Henry Hoffmann, Mieszko Lis, Farrukh Hijaz, Anant Agarwal, Srinivas Devadas
2011	B	`conf`	Brief announcement: distributed shared memory based on computation migration. SPAA Mieszko Lis, Keun Sup Shim, Myong Hyon Cho, Christopher W. Fletcher, Michel A. Kinsy, Ilia A. Lebedev, Omer Khan, Srinivas Devadas
2011	J	`jnl`	DCC: A Dependable Cache Coherence Multicore Architecture. IEEE Comput. Archit. Lett. Omer Khan, Mieszko Lis, Yildiz Sinangil, Srinivas Devadas
2011	—	`conf`	Deadlock-free fine-grained thread migration. NOCS Myong Hyon Cho, Keun Sup Shim, Mieszko Lis, Omer Khan, Srinivas Devadas
2011	B	`conf`	Efficient Traversal of Beta-Sheet Protein Folding Pathways Using Ensemble Models. RECOMB Solomon Shenker, Charles W. O'Donnell, Srinivas Devadas, Bonnie Berger, Jérôme Waldispühl
2011	J	`jnl`	Efficient Traversal of Beta-Sheet Protein Folding Pathways Using Ensemble Models. J. Comput. Biol. Solomon Shenker, Charles W. O'Donnell, Srinivas Devadas, Bonnie Berger, Jérôme Waldispühl
2011	A	`conf`	FPGA-Based True Random Number Generation Using Circuit Metastability with Adaptive Feedback Control. CHES Mehrdad Majzoobi, Farinaz Koushanfar, Srinivas Devadas
2011	B	`conf`	Heracles: Fully Synthesizable Parameterized MIPS-Based Multicore System. FPL Michel A. Kinsy, Michael Pellauer, Srinivas Devadas
2011	A	`conf`	Lightweight and Secure PUF Key Storage Using Limits of Machine Learning. CHES Meng-Day (Mandel) Yu, David M'Raïhi, Richard Sowell, Srinivas Devadas
2011	C	`conf`	Memory coherence in the age of multicores. ICCD Mieszko Lis, Keun Sup Shim, Myong Hyon Cho, Srinivas Devadas
2011	—	`conf`	Reliable and efficient PUF-based key generation using pattern matching. HOST Zdenek Sid Paral, Srinivas Devadas
2011	B	`conf`	Scalable, accurate multicore simulation in the 1000-core era. ISPASS Mieszko Lis, Pengju Ren, Myong Hyon Cho, Keun Sup Shim, Christopher W. Fletcher, Omer Khan, Srinivas Devadas
2011	—	`conf`	Security challenges and opportunities in adaptive and reconfigurable hardware. HOST Victor Costan, Srinivas Devadas
2011	A	`conf`	Time-Predictable Computer Architecture for Cyber-Physical Systems: Digital Emulation of Power Electronics Systems. RTSS Michel A. Kinsy, Omer Khan, Ivan Celanovic, Dusan Majstorovic, Nikola L. Celanovic, Srinivas Devadas
2010	—	`conf`	FPGA PUF using programmable delay lines. WIFS Mehrdad Majzoobi, Farinaz Koushanfar, Srinivas Devadas
2010	J	`jnl`	Modeling Attacks on Physical Unclonable Functions. IACR Cryptol. ePrint Arch. Ulrich Rührmair, Frank Sehnke, Jan Sölter, Gideon Dror, Srinivas Devadas, Jürgen Schmidhuber
2010	A*	`conf`	Modeling attacks on physical unclonable functions. CCS Ulrich Rührmair, Frank Sehnke, Jan Sölter, Gideon Dror, Srinivas Devadas, Jürgen Schmidhuber
2010	J	`jnl`	Secure and Robust Error Correction for Physical Unclonable Functions. IEEE Des. Test Comput. Meng-Day (Mandel) Yu, Srinivas Devadas
2009	A*	`conf`	Application-aware deadlock-free oblivious routing. ISCA Michel A. Kinsy, Myong Hyon Cho, Tina Wen, G. Edward Suh, Marten van Dijk, Srinivas Devadas
2009	J	`jnl`	Efficient stochastic simulation of reaction-diffusion processes via direct compilation. Bioinform. Mieszko Lis, Maxim N. Artyomov, Srinivas Devadas, Arup K. Chakraborty
2009	B	`conf`	Oblivious Routing in On-Chip Bandwidth-Adaptive Networks. PACT Myong Hyon Cho, Mieszko Lis, Keun Sup Shim, Michel A. Kinsy, Tina Wen, Srinivas Devadas
2009	—	`conf`	Path-based, randomized, oblivious, minimal routing. NoCArc@MICRO Myong Hyon Cho, Mieszko Lis, Keun Sup Shim, Michel A. Kinsy, Srinivas Devadas
2009	J	`jnl`	RNAmutants: a web server to explore the mutational landscape of RNA secondary structures. Nucleic Acids Res. Jérôme Waldispühl, Srinivas Devadas, Bonnie Berger, Peter Clote
2009	B	`conf`	Simultaneous Alignment and Folding of Protein Sequences. RECOMB Jérôme Waldispühl, Charles W. O'Donnell, Sebastian Will, Srinivas Devadas, Rolf Backofen, Bonnie Berger
2009	—	`conf`	Static virtual channel allocation in oblivious routing. NOCS Keun Sup Shim, Myong Hyon Cho, Michel A. Kinsy, Tina Wen, Mieszko Lis, G. Edward Suh, Srinivas Devadas
2008	J	`jnl`	Controlled physical random functions and applications. ACM Trans. Inf. Syst. Secur. Blaise Gassend, Marten van Dijk, Dwaine E. Clarke, Emina Torlak, Srinivas Devadas, Pim Tuyls
2008	A	`conf`	Diastolic arrays: throughput-driven reconfigurable computing. ICCAD Myong Hyon Cho, Chih-Chi Cheng, Michel A. Kinsy, G. Edward Suh, Srinivas Devadas
2008	J	`jnl`	Efficient Algorithms for Probing the RNA Mutation Landscape. PLoS Comput. Biol. Jérôme Waldispühl, Srinivas Devadas, Bonnie Berger, Peter Clote
2008	Misc	`conf`	Offline count-limited certificates. SAC Luis F. G. Sarmenta, Marten van Dijk, Jonathan Rhodes, Srinivas Devadas
2008	C	`conf`	The Trusted Execution Module: Commodity General-Purpose Trusted Computing. CARDIS Victor Costan, Luis F. G. Sarmenta, Marten van Dijk, Srinivas Devadas
2007	J	`jnl`	Aegis: A Single-Chip Secure Processor. IEEE Des. Test Comput. G. Edward Suh, Charles W. O'Donnell, Srinivas Devadas
2007	J	`jnl`	Learning biophysically-motivated parameters for alpha helix prediction. BMC Bioinform. Blaise Gassend, Charles W. O'Donnell, William Thies, Andrew Lee, Marten van Dijk, Srinivas Devadas
2007	—	`conf`	Offline untrusted storage with immediate detection of forking and replay attacks. STC Marten van Dijk, Jonathan Rhodes, Luis F. G. Sarmenta, Srinivas Devadas
2007	A*	`conf`	Physical Unclonable Functions for Device Authentication and Secret Key Generation. DAC G. Edward Suh, Srinivas Devadas
2006	J	`jnl`	A Generalized Two-Phase Analysis of Knowledge Flows in Security Protocols CoRR Marten van Dijk, Emina Torlak, Blaise Gassend, Srinivas Devadas
2006	J	`jnl`	Knowledge Flow Analysis for Security Protocols CoRR Emina Torlak, Marten van Dijk, Blaise Gassend, Daniel Jackson, Srinivas Devadas
2006	—	`conf`	Predicting Secondary Structure of All-Helical Proteins Using Hidden Markov Support Vector Machines. PRIB Blaise Gassend, Charles W. O'Donnell, William Thies, Andrew Lee, Marten van Dijk, Srinivas Devadas
2006	J	`jnl`	Speeding up Exponentiation using an Untrusted Computational Resource. Des. Codes Cryptogr. Marten van Dijk, Dwaine E. Clarke, Blaise Gassend, G. Edward Suh, Srinivas Devadas
2006	—	`conf`	Virtual monotonic counters and count-limited objects using a TPM without a trusted OS. STC Luis F. G. Sarmenta, Marten van Dijk, Charles W. O'Donnell, Jonathan Rhodes, Srinivas Devadas
2005	J	`jnl`	AEGIS: A single-chip secure processor. Inf. Secur. Tech. Rep. G. Edward Suh, Charles W. O'Donnell, Srinivas Devadas
2005	A*	`conf`	Design and Implementation of the AEGIS Single-Chip Secure Processor Using Physical Random Functions. ISCA G. Edward Suh, Charles W. O'Donnell, Ishan Sachdev, Srinivas Devadas
2005	J	`jnl`	Extracting secret keys from integrated circuits. IEEE Trans. Very Large Scale Integr. Syst. Daihyun Lim, Jae W. Lee, Blaise Gassend, G. Edward Suh, Marten van Dijk, Srinivas Devadas
2005	—	`conf`	Towards Constant Bandwidth Overhead Integrity Checking of Untrusted Data. S&P Dwaine E. Clarke, G. Edward Suh, Blaise Gassend, Ajay Sudan, Marten van Dijk, Srinivas Devadas
2004	J	`jnl`	Access-controlled resource discovery in pervasive networks. Concurr. Pract. Exp. Sanjay Raman, Dwaine E. Clarke, Matt Burnside, Srinivas Devadas, Ronald L. Rivest
2004	J	`jnl`	Dynamic Partitioning of Shared Cache Memory. J. Supercomput. G. Edward Suh, Larry Rudolph, Srinivas Devadas
2004	J	`jnl`	Identification and authentication of integrated circuits. Concurr. Pract. Exp. Blaise Gassend, Daihyun Lim, Dwaine E. Clarke, Marten van Dijk, Srinivas Devadas
2004	J	`jnl`	Power Estimation Using Probability Polynomials. Des. Autom. Embed. Syst. José C. Costa, Luís Miguel Silveira, Srinivas Devadas, José Monteiro
2004	A*	`conf`	Rate Guarantees and Overload Protection in Input-Queued Switches. INFOCOM Hari Balakrishnan, Srinivas Devadas, Douglas Ehlert, Arvind
2004	A*	`conf`	Secure program execution via dynamic information flow tracking. ASPLOS G. Edward Suh, Jae W. Lee, David Zhang, Srinivas Devadas
2003	A	`conf`	AEGIS: architecture for tamper-evident and tamper-resistant processing. ICS G. Edward Suh, Dwaine E. Clarke, Blaise Gassend, Marten van Dijk, Srinivas Devadas
2003	Misc	`conf`	Access-Controlled Resource Discovery for Pervasive Networks. SAC Sanjay Raman, Dwaine E. Clarke, Matt Burnside, Srinivas Devadas, Ronald L. Rivest
2003	A*	`conf`	Caches and Hash Trees for Efficient Memory Integrity Verification. HPCA Blaise Gassend, G. Edward Suh, Dwaine E. Clarke, Marten van Dijk, Srinivas Devadas
2003	Misc	`conf`	Delay-Based Circuit Authentication and Applications. SAC Blaise Gassend, Dwaine E. Clarke, Marten van Dijk, Srinivas Devadas
2003	A*	`conf`	Efficient Memory Integrity Verification and Encryption for Secure Processors. MICRO G. Edward Suh, Dwaine E. Clarke, Blaise Gassend, Marten van Dijk, Srinivas Devadas
2003	A*	`conf`	Embedded intelligent SRAM. DAC Prabhat Jain, G. Edward Suh, Srinivas Devadas
2003	A	`conf`	Incremental Multiset Hash Functions and Their Application to Memory Integrity Checking. ASIACRYPT Dwaine E. Clarke, Srinivas Devadas, Marten van Dijk, Blaise Gassend, G. Edward Suh
2003	J	`jnl`	Techniques for accurate performance evaluation in architecture exploration. IEEE Trans. Very Large Scale Integr. Syst. George Hadjiyiannis, Srinivas Devadas
2002	A*	`conf`	A New Memory Monitoring Scheme for Memory-Aware Scheduling and Partitioning. HPCA G. Edward Suh, Srinivas Devadas, Larry Rudolph
2002	A	`conf`	Controlled Physical Random Functions. ACSAC Blaise Gassend, Dwaine E. Clarke, Marten van Dijk, Srinivas Devadas
2002	J	`jnl`	Functional vector generation for sequential HDL models under an observability-based code coverage metric. IEEE Trans. Very Large Scale Integr. Syst. Farzan Fallah, Pranav Ashar, Srinivas Devadas
2002	—	`ed.`	Proceedings of the 2002 Joint Conference on Languages, Compilers, and Tools for Embedded Systems & Software and Compilers for Embedded Systems (LCTES'02-SCOPES'02), Berlin, Germany, 19-21 June 2002 LCTES-SCOPES Peter Marwedel, Srinivas Devadas
2002	Misc	`conf`	Proxy-based security protocols in networked mobile devices. SAC Matt Burnside, Dwaine E. Clarke, Todd Mills, Andrew Maywah, Srinivas Devadas, Ronald L. Rivest
2002	A*	`conf`	Silicon physical random functions. CCS Blaise Gassend, Dwaine E. Clarke, Marten van Dijk, Srinivas Devadas
2002	—	`conf`	The Untrusted Computer Problem and Camera-Based Authentication. Pervasive Dwaine E. Clarke, Blaise Gassend, Thomas Kotwal, Matt Burnside, Marten van Dijk, Srinivas Devadas, Ronald L. Rivest
2001	A	`conf`	Analytical cache models with applications to cache partitioning. ICS G. Edward Suh, Srinivas Devadas, Larry Rudolph
2001	C	`conf`	Effects of Memory Performance on Parallel Job Scheduling. JSSPP G. Edward Suh, Larry Rudolph, Srinivas Devadas
2001	J	`jnl`	Functional vector generation for HDL models using linearprogramming and Boolean satisfiability. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Farzan Fallah, Srinivas Devadas, Kurt Keutzer
2001	J	`jnl`	OCCOM-efficient computation of observability-based code coveragemetrics for functional verification. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Farzan Fallah, Srinivas Devadas, Kurt Keutzer
2001	A	`conf`	Software-Assisted Cache Replacement Mechanisms for Embedded Systems. ICCAD Prabhat Jain, Srinivas Devadas, Daniel W. Engels, Larry Rudolph
2000	—	`conf`	A New Approach to Solving the Hardware-Software Partitioning Problem in Embedded System Design. SBCCI Daniel W. Engels, Srinivas Devadas
2000	A*	`conf`	Application-specific memory management for embedded systems using software-controlled caches. DAC Derek Chiou, Prabhat Jain, Larry Rudolph, Srinivas Devadas
2000	J	`jnl`	ISDL: An Instruction Set Description Language for Retargetability and Architecture Exploration. Des. Autom. Embed. Syst. George Hadjiyiannis, Silvina Hanono, Srinivas Devadas
2000	A	`conf`	Observability Analysis of Embedded Software for Coverage-Directed Validation. ICCAD José C. Costa, Srinivas Devadas, José Monteiro
2000	J	`jnl`	Solving covering problems using LPR-based lower bounds. IEEE Trans. Very Large Scale Integr. Syst. Farzan Fallah, Stan Y. Liao, Srinivas Devadas
2000	—	`ed.`	VLSI: Systems on a Chip, IFIP TC10/WG10.5 Tenth International Conference on Very Large Scale Integration (VLSI '99), December 1-4, 1999, Lisbon, Portugal VLSI L. Miguel Silveira, Srinivas Devadas, Ricardo Augusto da Luz Reis
1999	A*	`conf`	A Methodology for Accurate Performance Evaluation in Architecture Exploration. DAC George Hadjiyiannis, Pietro Russo, Srinivas Devadas
1999	—	`conf`	A probabilistic approach for RT-level power modeling. ICECS José C. Costa, José Monteiro, L. Miguel Silveira, Srinivas Devadas
1999	J	`jnl`	A text-compression-based method for code size minimization in embedded systems. ACM Trans. Design Autom. Electr. Syst. Stan Y. Liao, Srinivas Devadas, Kurt Keutzer
1999	J	`jnl`	Analysis and Evaluation of Address Arithmetic Capabilities in Custom DSP Architectures. Des. Autom. Embed. Syst. Ashok Sudarsanam, Stan Y. Liao, Srinivas Devadas
1999	—	`conf`	Automatic architecture evaluation for hardware/software codesign. ICECS George Hadjiyiannis, Pietro Russo, Srinivas Devadas
1999	Misc	`conf`	CAD Techniques for Embedded System Design. VLSI Design Srinivas Devadas, Sharad Malik, José Monteiro, Luciano Lavagno
1999	A*	`conf`	Simulation Vector Generation from HDL Descriptions for Observability-Enhanced Statement Coverage. DAC Farzan Fallah, Pranav Ashar, Srinivas Devadas
1998	J	`jnl`	A low power, low bandwidth protocol for remote wireless terminals. Wirel. Networks George Hadjiyiannis, Anantha P. Chandrakasan, Srinivas Devadas
1998	J	`jnl`	A new viewpoint on code generation for directed acyclic graphs. ACM Trans. Design Autom. Electr. Syst. Stan Y. Liao, Kurt Keutzer, Steven W. K. Tjiang, Srinivas Devadas
1998	A	`conf`	An algorithmic approach to optimizing fault coverage for BIST logic synthesis. ITC Srinivas Devadas, Kurt Keutzer
1998	J	`jnl`	BDD-based synthesis of extended burst-mode controllers. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Kenneth Y. Yun, Bill Lin, David L. Dill, Srinivas Devadas
1998	J	`jnl`	Code Optimization Techniques in Embedded DSP Microprocessors. Des. Autom. Embed. Syst. Stan Y. Liao, Srinivas Devadas, Kurt Keutzer, Steven W. K. Tjiang, Albert R. Wang
1998	J	`jnl`	Code density optimization for embedded DSP processors using data compression techniques. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Stan Y. Liao, Srinivas Devadas, Kurt Keutzer
1998	A*	`conf`	Functional Vector Generation for HDL Models Using Linear Programming and 3-Satisfiability. DAC Farzan Fallah, Srinivas Devadas, Kurt Keutzer
1998	A*	`conf`	Instruction Selection, Resource Allocation, and Scheduling in the AVIV Retargetable Code Generator. DAC Silvina Hanono, Srinivas Devadas
1998	A*	`conf`	OCCOM: Efficient Computation of Observability-Based Code Coverage Metrics for Functional Verification. DAC Farzan Fallah, Srinivas Devadas, Kurt Keutzer
1998	J	`jnl`	Power Estimation Under User-Specified Input Sequences and Programs. Integr. Comput. Aided Eng. José Monteiro, Srinivas Devadas
1998	J	`jnl`	Sequential logic optimization for low power using input-disabling precomputation architectures. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. José Monteiro, Srinivas Devadas, Abhijit Ghosh
1997	A*	`conf`	Analysis and Evaluation of Address Arithmetic Capabilities in Custom DSP Architectures. DAC Ashok Sudarsanam, Stan Y. Liao, Srinivas Devadas
1997	J	`jnl`	Estimation of average switching activity in combinational logic circuits using symbolic simulation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. José Monteiro, Srinivas Devadas, Abhijit Ghosh, Kurt Keutzer, Jacob K. White
1997	A*	`conf`	ISDL: An Instruction Set Description Language for Retargetability. DAC George Hadjiyiannis, Silvina Hanono, Srinivas Devadas
1997	A*	`conf`	Solving Covering Problems Using LPR-Based Lower Bounds. DAC Stan Y. Liao, Srinivas Devadas
1997	A	`conf`	Switching activity estimation using limited depth reconvergent path analysis. ISLPED José C. Costa, José C. Monteiro, Srinivas Devadas
1996	J	`jnl`	Addendum to "Synthesis of robust delay-fault testable circuits: Theory". IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Srinivas Devadas, Kurt Keutzer
1996	A	`conf`	An observability-based code coverage metric for functional simulation. ICCAD Srinivas Devadas, Abhijit Ghosh, Kurt Keutzer
1996	J	`jnl`	Correction to "Power Estimation Methods for Sequential Logic Circuits" [Correspondence]. IEEE Trans. Very Large Scale Integr. Syst. Chi-Ying Tsui, José Monteiro, Massoud Pedram, Srinivas Devadas, Alvin M. Despain, Bill Lin
1996	A*	`conf`	Scheduling Techniques to Enable Power Management. DAC José Monteiro, Srinivas Devadas, Pranav Ashar, Ashutosh Mauskar
1996	J	`jnl`	Storage Assignment to Decrease Code Size. ACM Trans. Program. Lang. Syst. Stan Y. Liao, Srinivas Devadas, Kurt Keutzer, Steven W. K. Tjiang, Albert R. Wang
1996	J	`jnl`	Techniques for power estimation and optimization at the logic level: A survey. J. VLSI Signal Process. José Monteiro, Srinivas Devadas
1995	A*	`conf`	A Survey of Optimization Techniques Targeting Low Power VLSI Circuits. DAC Srinivas Devadas, Sharad Malik
1995	A*	`conf`	Code Optimization Techniques for Embedded DSP Microprocessors. DAC Stan Y. Liao, Srinivas Devadas, Kurt Keutzer, Steven W. K. Tjiang, Albert R. Wang
1995	—	`conf`	Code density optimization for embedded DSP processors using data compression techniques. ARVLSI Stan Y. Liao, Srinivas Devadas, Kurt Keutzer
1995	A	`conf`	Instruction selection using binate covering for code size optimization. ICCAD Stan Y. Liao, Srinivas Devadas, Kurt Keutzer, Steven W. K. Tjiang
1995	—	`conf`	Optimization of combinational and sequential logic circuits for low power using precomputation. ARVLSI José Monteiro, John Rinderknecht, Srinivas Devadas, Abhijit Ghosh
1995	J	`jnl`	Power estimation methods for sequential logic circuits. IEEE Trans. Very Large Scale Integr. Syst. Chi-Ying Tsui, José Monteiro, Massoud Pedram, Srinivas Devadas, Alvin M. Despain, Bill Lin
1995	J	`jnl`	Probabilistic manipulation of Boolean functions using free Boolean diagrams. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Amelia Shen, Srinivas Devadas, Abhijit Ghosh
1995	A*	`conf`	Storage Assignment to Decrease Code Size. PLDI Stan Y. Liao, Srinivas Devadas, Kurt Keutzer, Steven W. K. Tjiang, Albert R. Wang
1995	J	`jnl`	Synthesis of hazard-free multilevel logic under multiple-input changes from binary decision diagrams. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Bill Lin, Srinivas Devadas
1995	—	`conf`	Techniques for the power estimation of sequential logic circuits under user-specified input sequences and programs. ISLPD José Monteiro, Srinivas Devadas
1994	A*	`conf`	A Methodology for Efficient Estimation of Switching Activity in Sequential Logic Circuits. DAC José Monteiro, Srinivas Devadas, Bill Lin
1994	A*	`conf`	Automatic Verification of Pipelined Microprocessors. DAC Vishal Bhagwati, Srinivas Devadas
1994	Misc	`conf`	Bitwise Encoding of Finite State Machines. VLSI Design José Monteiro, James H. Kukula, Srinivas Devadas, Horácio C. Neto
1994	J	`jnl`	Certified timing verification and the transition delay of a logic circuit. IEEE Trans. Very Large Scale Integr. Syst. Srinivas Devadas, Kurt Keutzer, Sharad Malik, Albert R. Wang
1994	—	`conf`	Challenges in code generation for embedded processors. Code Generation for Embedded Processors Guido Araujo, Srinivas Devadas, Kurt Keutzer, Stan Y. Liao, Sharad Malik, Ashok Sudarsanam, Steven W. K. Tjiang, Albert R. Wang
1994	J	`jnl`	Event suppression: improving the efficiency of timing simulation for synchronous digital circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Srinivas Devadas, Kurt Keutzer, Sharad Malik, Albert R. Wang
1994	J	`jnl`	Event-based verification of synchronous, globally controlled, logic designs against signal flow graphs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Filip Van Aelten, Jonathan Allen, Srinivas Devadas
1994	A	`conf`	Performance-driven synthesis of asynchronous controllers. ICCAD Kenneth Y. Yun, Bill Lin, David L. Dill, Srinivas Devadas
1994	A	`conf`	Precomputation-based sequential logic optimization for low power. ICCAD Mazhar Alidina, José Monteiro, Srinivas Devadas, Abhijit Ghosh, Marios C. Papaefthymiou
1994	J	`jnl`	Precomputation-based sequential logic optimization for low power. IEEE Trans. Very Large Scale Integr. Syst. Mazhar Alidina, José Monteiro, Srinivas Devadas, Abhijit Ghosh, Marios C. Papaefthymiou
1994	A	`conf`	Synthesis of hazard-free multi-level logic under multiple-input changes from binary decision diagrams. ICCAD Bill Lin, Srinivas Devadas
1994	J	`jnl`	Verification of asynchronous interface circuits with bounded wire delays. J. VLSI Signal Process. Srinivas Devadas, Kurt Keutzer, Sharad Malik, Albert R. Wang
1993	J	`jnl`	A synthesis-based test generation and compaction algorithm for multifaults. J. Electron. Test. Srinivas Devadas, Kurt Keutzer, Sharad Malik
1993	J	`jnl`	Analysis and Design of Regular Structures for Robust Dynamic Fault Testability. VLSI Design Michael J. Bryan, Srinivas Devadas, Kurt Keutzer
1993	A	`conf`	Boolean factorization using multiple-valued minimization. ICCAD Stan Y. Liao, Srinivas Devadas, Abhijit Ghosh
1993	J	`jnl`	Comparing two-level and ordered binary decision diagram representations of logic functions. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Srinivas Devadas
1993	J	`jnl`	Computation of floating mode delay in combinational circuits: practice and implementation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Srinivas Devadas, Kurt Keutzer, Sharad Malik, Albert R. Wang
1993	J	`jnl`	Computation of floating mode delay in combinational circuits: theory and algorithms. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Srinivas Devadas, Kurt Keutzer, Sharad Malik
1993	J	`jnl`	Delay-fault test generation and synthesis for testability under a standard scan design methodology. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Kwang-Ting Cheng, Srinivas Devadas, Kurt Keutzer
1993	J	`jnl`	Gate-Delay-Fault Testability Properties of Multiplexor-Based Networks. Formal Methods Syst. Des. Pranav Ashar, Srinivas Devadas, Kurt Keutzer
1993	J	`jnl`	Guest editorial. J. Electron. Test. Srinivas Devadas, Petra Michel
1993	J	`jnl`	Path-delay-fault testability properties of multiplexor-based networks. Integr. Pranav Ashar, Srinivas Devadas, Kurt Keutzer
1993	A	`conf`	Probabilistic construction and manipulation of free Boolean diagrams. ICCAD Amelia Shen, Srinivas Devadas, Abhijit Ghosh
1993	A	`conf`	Retiming sequential circuits for low power. ICCAD José Monteiro, Srinivas Devadas, Abhijit Ghosh
1993	J	`jnl`	Sequential test generation and synthesis for testability at the register-transfer and logic levels. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Abhijit Ghosh, Srinivas Devadas, A. Richard Newton
1993	J	`jnl`	Statistical timing analysis of combinational logic circuits. IEEE Trans. Very Large Scale Integr. Syst. Horng-Fei Jyu, Sharad Malik, Srinivas Devadas, Kurt Keutzer
1993	J	`jnl`	Verification of relations between synchronous machines. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Filip Van Aelten, Jonathan Allen, Srinivas Devadas
1992	A	`conf`	Automatic generation and verification of sufficient correctness properties for synchronous processors. ICCAD Filip Van Aelten, Stan Y. Liao, Jonathan Allen, Srinivas Devadas
1992	J	`jnl`	Boolean satisfiability and equivalence checking using general Binary Decision Diagrams. Integr. Pranav Ashar, Abhijit Ghosh, Srinivas Devadas
1992	A*	`conf`	Certified Timing Verification and the Transition Delay of a Logic Circuit. DAC Srinivas Devadas, Kurt Keutzer, Sharad Malik, Albert R. Wang
1992	A*	`conf`	Estimation of Average Switching Activity in Combinational and Sequential Circuits. DAC Abhijit Ghosh, Srinivas Devadas, Kurt Keutzer, Jacob K. White
1992	J	`jnl`	Estimation of power dissipation in CMOS combinational circuits using Boolean function manipulation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Srinivas Devadas, Kurt Keutzer, Jacob K. White
1992	J	`jnl`	Heuristic minimization of Boolean relations using testing techniques. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Abhijit Ghosh, Srinivas Devadas, A. Richard Newton
1992	J	`jnl`	Necessary and sufficient conditions for hazard-free robust transistor stuck-open-fault testability in multilevel networks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Michael J. Bryan, Srinivas Devadas, Kurt Keutzer
1992	A	`conf`	On average power dissipation and random pattern testability of CMOS combinational logic networks. ICCAD Amelia Shen, Abhijit Ghosh, Srinivas Devadas, Kurt Keutzer
1992	C	`conf`	Statistical Timing Analysis of Combinational Circuits. ICCD Srinivas Devadas, Horng-Fei Jyu, Kurt Keutzer, Sharad Malik
1992	J	`jnl`	Synthesis of robust delay-fault-testable circuits: practice. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Srinivas Devadas, Kurt Keutzer
1992	J	`jnl`	Synthesis of robust delay-fault-testable circuits: theory. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Srinivas Devadas, Kurt Keutzer
1992	J	`jnl`	Validatable nonrobust delay-fault testable circuits via logic synthesis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Srinivas Devadas, Kurt Keutzer
1992	A	`conf`	Verification of asynchronous interface circuits with bounded wire delays. ICCAD Srinivas Devadas, Kurt Keutzer, Sharad Malik, Albert R. Wang
1991	A	`conf`	A Partial Enhanced-Scan Approach to Robust Delay-Fault Test Generation for Sequential Circuits. ITC Kwang-Ting Cheng, Srinivas Devadas, Kurt Keutzer
1991	A*	`conf`	A Synthesis-Based Test Generation and Compaction Algorithm for Multifaults. DAC Srinivas Devadas, Kurt Keutzer, Sharad Malik
1991	J	`jnl`	A unified approach to the synthesis of fully testable sequential machines. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Srinivas Devadas, Kurt Keutzer
1991	J	`jnl`	An automata-theoretic approach to behavioral equivalence. Integr. Srinivas Devadas, Kurt Keutzer
1991	C	`conf`	Boolean Satisfiability and Equivalence Checking Using General Binary Decision Diagrams. ICCD Pranav Ashar, Abhijit Ghosh, Srinivas Devadas
1991	A	`conf`	Delay Computation in Combinational Logic Circuits: Theory and Algorithms. ICCAD Srinivas Devadas, Kurt Keutzer, Sharad Malik
1991	C	`conf`	Design Verfication and Reachability Analysis Using Algebraic Manipulation. ICCD Srinivas Devadas, Kurt Keutzer, A. S. Krishnakumar
1991	J	`jnl`	Exact algorithms for output encoding, state assignment, and four-level Boolean minimization. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Srinivas Devadas, A. Richard Newton
1991	A	`conf`	Finite State Machine Decomposition by Transition Pairing. ICCAD James H. Kukula, Srinivas Devadas
1991	A	`conf`	Gate-Delay-Fault Testability Properties of Multiplexor-Based Networks. ITC Pranav Ashar, Srinivas Devadas, Kurt Keutzer
1991	J	`jnl`	Irredundant interacting sequential machines via optimal logic synthesis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Pranav Ashar, Srinivas Devadas, A. Richard Newton
1991	J	`jnl`	Optimizing interacting finite state machines using sequential don't cares. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Srinivas Devadas
1991	J	`jnl`	Optimum and heuristic algorithms for an approach to finite state machine decomposition. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Pranav Ashar, Srinivas Devadas, A. Richard Newton
1991	Misc	`conf`	Recent progress in synthesis for testability. VTS Srinivas Devadas, Kurt Keutzer, Abhijit Ghosh
1991	A*	`conf`	Robust Delay-Fault Test Generation and Synthesis for Testability Under A Standard Scan Design Methodology. DAC Kwang-Ting Cheng, Srinivas Devadas, Kurt Keutzer
1991	J	`jnl`	Test generation and verification for highly sequential circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Abhijit Ghosh, Srinivas Devadas, A. Richard Newton
1991	A	`conf`	Verification of Relations Between Synchronous Machines. ICCAD Filip Van Aelten, Jonathan Allen, Srinivas Devadas
1990	A*	`conf`	A Unified Approach to the Decomposition and Re-Decomposition of Sequential Machines. DAC Pranav Ashar, Srinivas Devadas, A. Richard Newton
1990	A	`conf`	An Automata-Theoretic Approach to Behavioral Equivalence. ICCAD Srinivas Devadas, Kurt Keutzer
1990	A	`conf`	Design of integrated circuits fully testable for delay-faults and multifaults. ITC Srinivas Devadas, Kurt Keutzer
1990	J	`jnl`	Easily testable PLA-based finite state machines. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Srinivas Devadas, Hi-Keung Tony Ma
1990	C	`conf`	Heuristic minimization of Boolean relations using testing techniques. ICCD Abhijit Ghosh, Srinivas Devadas, A. Richard Newton
1990	A	`conf`	Implicit State Transition Graphs: Applications to Sequential Logic Synthesis and Test. ICCAD Pranav Ashar, Abhijit Ghosh, Srinivas Devadas, A. Richard Newton
1990	J	`jnl`	Irredundant sequential machines via optimal logic synthesis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Srinivas Devadas, Hi-Keung Tony Ma, A. Richard Newton, Alberto L. Sangiovanni-Vincentelli
1990	—	`conf`	Minimization of Functions with Multiple-Valued Outputs: Theory and Applications. ISMVL Srinivas Devadas
1990	J	`jnl`	Redundancies and don't cares in sequential logic synthesis. J. Electron. Test. Srinivas Devadas, Hi-Keung Tony Ma, A. Richard Newton
1990	A*	`conf`	Sequential Test Generation at the Register-Transfer and Logic Levels. DAC Abhijit Ghosh, Srinivas Devadas, A. Richard Newton
1990	A	`conf`	Sequential logic synthesis for testability using register-transfer level descriptions. ITC Abhijit Ghosh, Srinivas Devadas, A. Richard Newton
1990	A*	`conf`	Synthesis and Optimization Procedures for Robustly Delay-Fault Testable Combinational Logic Circuits. DAC Srinivas Devadas, Kurt Keutzer
1990	C	`conf`	Testability driven synthesis of interacting finite state machines. ICCD Pranav Ashar, Srinivas Devadas, A. Richard Newton
1990	A	`conf`	Testability-Preserving Circuit Transformations. ICCAD Michael J. Bryan, Srinivas Devadas, Kurt Keutzer
1990	A*	`conf`	Verification of Interacting Sequential Circuits. DAC Abhijit Ghosh, Srinivas Devadas, A. Richard Newton
1989	J	`jnl`	A synthesis and optimization procedure for fully and easily testable sequential machines. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Srinivas Devadas, Hi-Keung Tony Ma, A. Richard Newton, Alberto L. Sangiovanni-Vincentelli
1989	J	`jnl`	Algorithms for hardware allocation in data path synthesis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Srinivas Devadas, A. Richard Newton
1989	A*	`conf`	Approaches to Multi-level Sequential Logic Synthesis. DAC Srinivas Devadas
1989	J	`jnl`	Boolean decomposition in multilevel logic optimization. IEEE J. Solid State Circuits Srinivas Devadas, Albert R. Wang, A. Richard Newton, Alberto L. Sangiovanni-Vincentelli
1989	A	`conf`	Boolean minimization and algebraic factorization procedures for fully testable sequential machines. ICCAD Srinivas Devadas, Kurt Keutzer
1989	J	`jnl`	Decomposition and factorization of sequential finite state machines. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Srinivas Devadas, A. Richard Newton
1989	A	`conf`	Delay Test Generation for Synchronous Sequential Circuits. ITC Srinivas Devadas
1989	—	`conf`	Easily testable PLA-based finite state machines. FTCS Srinivas Devadas, Hi-Keung Tony Ma, A. Richard Newton
1989	A*	`conf`	General Decomposition of Sequential Machines: Relationships to State Assignment. DAC Srinivas Devadas
1989	J	`jnl`	Logic verification algorithms and their parallel implementation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Hi-Keung Tony Ma, Srinivas Devadas, Ruey-Sing Wei, Alberto L. Sangiovanni-Vincentelli
1989	A	`conf`	Optimal layout via Boolean satisfiability. ICCAD Srinivas Devadas
1989	A	`conf`	Optimum and heuristic algorithms for finite state machine decomposition and partitioning. ICCAD Pranav Ashar, Srinivas Devadas, A. Richard Newton
1989	A	`conf`	Redundancies and Don't Cares in Sequential Logic Synthesis. ITC Srinivas Devadas, Hi-Keung Tony Ma, A. Richard Newton
1989	A	`conf`	Test generation for highly sequential circuits. ICCAD Abhijit Ghosh, Srinivas Devadas, A. Richard Newton
1988	A	`conf`	An Incomplete Scan Design Approach to Test Generation for Sequential Machines. ITC Hi-Keung Tony Ma, A. Richard Newton, Srinivas Devadas, Alberto L. Sangiovanni-Vincentelli
1988	A	`conf`	Boolean decomposition in multi-level logic optimization. ICCAD Srinivas Devadas, Albert R. Wang, A. Richard Newton, Alberto L. Sangiovanni-Vincentelli
1988	A	`conf`	Decomposition and factorization of sequential finite state machines. ICCAD Srinivas Devadas, A. Richard Newton
1988	J	`jnl`	MUSTANG: state assignment of finite state machines targeting multilevel logic implementations. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Srinivas Devadas, Hi-Keung Tony Ma, A. Richard Newton, Alberto L. Sangiovanni-Vincentelli
1988	J	`jnl`	On the verification of sequential machines at differing levels of abstraction. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Srinivas Devadas, Hi-Keung Tony Ma, A. Richard Newton
1988	A	`conf`	Synthesis and Optimization Procedures for Fully and Easily Testable Sequential Machines. ITC Srinivas Devadas, Hi-Keung Tony Ma, A. Richard Newton, Alberto L. Sangiovanni-Vincentelli
1988	J	`jnl`	Techniques for multilayer channel routing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Douglas Braun, Jeffrey L. Burns, Fabio Romeo, Alberto L. Sangiovanni-Vincentelli, Kartikeya Mayaram, Srinivas Devadas, Hi-Keung Tony Ma
1988	J	`jnl`	Test generation for sequential circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Hi-Keung Tony Ma, Srinivas Devadas, A. Richard Newton, Alberto L. Sangiovanni-Vincentelli
1987	A*	`conf`	Logic Verification Algorithms and Their Parallel Implementation. DAC Hi-Keung Tony Ma, Srinivas Devadas, Alberto L. Sangiovanni-Vincentelli, Ruey-Sing Wei
1987	A*	`conf`	On the Verification of Sequential Machines at Differing Levels of Abstraction. DAC Srinivas Devadas, Hi-Keung Tony Ma, A. Richard Newton
1987	J	`jnl`	Topological Optimization of Multiple-Level Array Logic. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Srinivas Devadas, A. Richard Newton
1986	A*	`conf`	Chameleon: a new multi-layer channel router. DAC Douglas Braun, Jeffrey L. Burns, Srinivas Devadas, Hi-Keung Tony Ma, Kartikeya Mayaram, Fabio Romeo, Alberto L. Sangiovanni-Vincentelli
1986	A*	`conf`	GENIE: a generalized array optimizer for VLSI synthesis. DAC Srinivas Devadas, A. Richard Newton