Srikanth Venkataraman

70 papers A* 3A 20B 2Misc 22Journal 13Unranked 9

Year	Rank	Type	Title / Venue / Authors
2024	—	`conf`	Generating Storage-Aware Test Sets Targeting Several Fault Models. ISVLSI Hari Addepalli, Irith Pomeranz, M. Enamul Amyeen, Suriyaprakash Natarajan, Arani Sinha, Srikanth Venkataraman
2022	—	`conf`	Using Fault Detection Tests to Produce Diagnostic Tests Targeting Large Sets of Candidate Faults. ATS Hari Addepalli, Irith Pomeranz, M. Enamul Amyeen, Suriyaprakash Natarajan, Arani Sinha, Srikanth Venkataraman
2021	J	`jnl`	Defect-Oriented Test: Effectiveness in High Volume Manufacturing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Friedrich Hapke, Will Howell, Peter C. Maxwell, Edward Brazil, Srikanth Venkataraman, Rudrajit Dutta, Andreas Glowatz, Anja Fast, Janusz Rajski
2020	A	`conf`	Automating Design For Yield: Silicon Learning to Predictive Models and Design Optimization. ITC Srikanth Venkataraman, Pongpachara Limpisathian, Pascal Meinerzhagen, Suriyaprakash Natarajan, Eric Yang
2020	J	`jnl`	LFSR-Based Test Generation for Reduced Fail Data Volume. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Irith Pomeranz, Srikanth Venkataraman
2019	J	`jnl`	Layout Resynthesis by Applying Design-for-manufacturability Guidelines to Avoid Low-coverage Areas of a Cell-based Design. ACM Trans. Design Autom. Electr. Syst. Naixing Wang, Irith Pomeranz, Sudhakar M. Reddy, Arani Sinha, Srikanth Venkataraman
2019	Misc	`conf`	Observation Point Placement for Improved Logic Diagnosis based on Large Sets of Candidate Faults. VTS Irith Pomeranz, Vivek Chickermane, Srikanth Venkataraman
2019	A	`conf`	Resynthesis for Avoiding Undetectable Faults Based on Design-for-Manufacturability Guidelines. DATE Naixing Wang, Irith Pomeranz, Sudhakar M. Reddy, Arani Sinha, Srikanth Venkataraman
2018	A	`conf`	DPPM Reduction Methods and New Defect Oriented Test Methods Applied to Advanced FinFET Technologies. ITC Will Howell, Friedrich Hapke, Edward Brazil, Srikanth Venkataraman, R. Datta, Andreas Glowatz, Wilfried Redemund, J. Schmerberg, Anja Fast, Janusz Rajski
2018	—	`conf`	Improving the Resolution of Multiple Defect Diagnosis by Removing and Selecting Tests. DFT Naixing Wang, Irith Pomeranz, Brady Benware, M. Enamul Amyeen, Srikanth Venkataraman
2018	B	`conf`	Interconnect-aware tests to complement gate-exhaustive tests. ETS Irith Pomeranz, Srikanth Venkataraman
2017	J	`jnl`	Reordering Tests for Efficient Fail Data Collection and Tester Time Reduction. IEEE Trans. Very Large Scale Integr. Syst. Shraddha Bodhe, Irith Pomeranz, M. Enamul Amyeen, Srikanth Venkataraman
2017	J	`jnl`	Test Modification for Reduced Volumes of Fail Data. ACM Trans. Design Autom. Electr. Syst. Irith Pomeranz, M. Enamul Amyeen, Srikanth Venkataraman
2017	A	`conf`	Test reordering for improved scan chain diagnosis using an enhanced defect diagnosis procedure. ITC Srikanth Venkataraman, Irith Pomeranz, Shraddha Bodhe, M. Enamul Amyeen
2016	—	`conf`	A Joint Diagnostic Test Generation Procedure with Dynamic Test Compaction. ATS M. Enamul Amyeen, Irith Pomeranz, Srikanth Venkataraman
2016	A	`conf`	A novel diagnostic test generation methodology and its application in production failure isolation. ITC M. Enamul Amyeen, Dongok Kim, Maheshwar Chandrasekar, Mohammad Noman, Srikanth Venkataraman, Anurag Jain, Neha Goel, Ramesh Sharma
2016	J	`jnl`	Diagnostic Fail Data Minimization Using an N-Cover Algorithm. IEEE Trans. Very Large Scale Integr. Syst. Shraddha Bodhe, M. Enamul Amyeen, Irith Pomeranz, Srikanth Venkataraman
2016	Misc	`conf`	Reduction of diagnostic fail data volume and tester time using a dynamic N-cover algorithm. VTS Shraddha Bodhe, M. Enamul Amyeen, Clariza Galendez, Houston Mooers, Irith Pomeranz, Srikanth Venkataraman
2014	—	`conf`	Built-in generation of functional broadside tests considering primary input constraints. ACM Great Lakes Symposium on VLSI Bo Yao, Irith Pomeranz, Srikanth Venkataraman, M. Enamul Amyeen
2013	B	`conf`	Panel session what is the electronics industry doing to win the battle against the expected scary failure rates in future technology nodes? ETS Said Hamdioui, Davide Appello, Arnaud Grasset, Xinli Gu, Bram Kruseman, Riccardo Mariani, Hermann Obermeir, Srikanth Venkataraman
2012	Misc	`conf`	Tutorial T3: DFM, DFT, Silicon Debug and Diagnosis - The Loop to Ensure Product Yield. VLSI Design Srikanth Venkataraman, Nagesh Tamarapalli
2011	A	`conf`	Logic BIST silicon debug and volume diagnosis methodology. ITC M. Enamul Amyeen, Andal Jayalakshmi, Srikanth Venkataraman, Sundar V. Pathy, Ewe C. Tan
2010	Misc	`conf`	Defect diagnosis based on DFM guidelines. VTS Dongok Kim, Irith Pomeranz, M. Enamul Amyeen, Srikanth Venkataraman
2009	Misc	`conf`	Automated Debug of Speed Path Failures Using Functional Tests. VTS Richard McLaughlin, Srikanth Venkataraman, Carlston Lim
2009	A	`conf`	Microprocessor system failures debug and fault isolation methodology. ITC M. Enamul Amyeen, Srikanth Venkataraman, Mun Wai Mak
2008	Misc	`conf`	DFM / DFT / SiliconDebug / Diagnosis. VLSI Design Srikanth Venkataraman, Nagesh Tamarapalli
2008	Misc	`conf`	Diagnosis of Scan Clock Failures. VTS King Leong Lee, Nadir Z. Basturkmen, Srikanth Venkataraman
2008	—	`conf`	Prioritizing the Application of DFM Guidelines Based on the Detectability of Systematic Defects. ATS Dongok Kim, Irith Pomeranz, M. Enamul Amyeen, Srikanth Venkataraman
2007	—	`conf`	DFM, DFY, Debug and Diagnosis: The Loop to Ensure Yield. ISQED Srikanth Venkataraman
2007	A*	`conf`	Making Manufacturing Work For You. DAC Srikanth Venkataraman, Ruchir Puri, Steve Griffith, Ankush Oberai, Robert Madge, Greg Yeric, Walter Ng, Yervant Zorian
2007	—	`conf`	Quality Driven Manufacturing and SOC Designs. ISQED Srikanth Venkataraman, Nagesh Nagapalli, Lech Józwiak
2007	A	`conf`	Testing for systematic defects based on DFM guidelines. ITC Dongok Kim, M. Enamul Amyeen, Srikanth Venkataraman, Irith Pomeranz, Swagato Basumallick, Berni Landau
2007	Misc	`conf`	Using Scan-Dump Values to Improve Functional-Diagnosis Methodology. VTS Vishnu C. Vimjam, M. Enamul Amyeen, Ruifeng Guo, Srikanth Venkataraman, Michael S. Hsiao, Kai Yang
2007	J	`jnl`	z-Diagnosis: A Framework for Diagnostic Fault Simulation and Test Generation Utilizing Subsets of Outputs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Irith Pomeranz, Sudhakar M. Reddy, Srikanth Venkataraman
2006	Misc	`conf`	Accelerating Diagnostic Fault Simulation Using Z-diagnosis and Concurrent Equivalence Identification. VTS Bharath Seshadri, Xiaoming Yu, Srikanth Venkataraman
2006	J	`jnl`	An algorithmic technique for diagnosis of faulty scan chains. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Ruifeng Guo, Srikanth Venkataraman
2006	Misc	`conf`	DFM, DFT, Silicon Debug and Diagnosis - The Loop to Ensure Product Yield. VLSI Design David Abercrombie, Bernd Koenemann, Nagesh Tamarapalli, Srikanth Venkataraman
2006	Misc	`conf`	Dominance Based Analysis for Large Volume Production Fail Diagnosis. VTS Bharath Seshadri, Irith Pomeranz, Srikanth Venkataraman, M. Enamul Amyeen, Sudhakar M. Reddy
2006	Misc	`conf`	Evaluation of Test Metrics: Stuck-at, Bridge Coverage Estimate and Gate Exhaustive. VTS Ruifeng Guo, Subhasish Mitra, M. Enamul Amyeen, Jinkyu Lee, Srihari Sivaraj, Srikanth Venkataraman
2006	J	`jnl`	Extraction error modeling and automated model debugging in high-performance custom designs. IEEE Trans. Very Large Scale Integr. Syst. Yu-Shen Yang, Andreas G. Veneris, Paul J. Thadikaran, Srikanth Venkataraman
2006	A	`conf`	Improving Precision Using Mixed-level Fault Diagnosis. ITC M. Enamul Amyeen, Debashis Nayak, Srikanth Venkataraman
2005	A	`conf`	Achieving higher yield through diagnosis? ITC Srikanth Venkataraman
2005	A	`conf`	Enabling yield analysis with X-compact. ITC Zoran Stanojevic, Ruifeng Guo, Subhasish Mitra, Srikanth Venkataraman
2005	A	`conf`	Extraction Error Modeling and Automated Model Debugging in High-Performance Low Power Custom Designs. DATE Yu-Shen Yang, Andreas G. Veneris, Paul J. Thadikaran, Srikanth Venkataraman
2005	—	`conf`	Fault Diagnosis and Fault Model Aliasing. ISVLSI Irith Pomeranz, Srikanth Venkataraman, Sudhakar M. Reddy
2004	Misc	`conf`	An Experimental Study of N-Detect Scan ATPG Patterns on a Processor. VTS Srikanth Venkataraman, Srihari Sivaraj, M. Enamul Amyeen, Sangbong Lee, Ajay Ojha, Ruifeng Guo
2004	Misc	`conf`	Defect Diagnosis Based on Pattern-Dependent Stuck-At Faults. VLSI Design Irith Pomeranz, Srikanth Venkataraman, Sudhakar M. Reddy, M. Enamul Amyeen
2004	A	`conf`	Diagnosis meets Physical Failure Analysis: What is needed to succeed? ITC Srikanth Venkataraman
2004	A	`conf`	Evaluation of the Quality of N-Detect Scan ATPG Patterns on a Processor. ITC M. Enamul Amyeen, Srikanth Venkataraman, Ajay Ojha, Sangbong Lee
2004	Misc	`conf`	Razor: A Tool for Post-Silicon Scan ATPG Pattern Debug and Its Application. VTS Debashis Nayak, Srikanth Venkataraman, Paul J. Thadikaran
2004	A	`conf`	Z-DFD: Design-for-Diagnosability Based on the Concept of Z-Detection. ITC Irith Pomeranz, Srikanth Venkataraman, Sudhakar M. Reddy
2004	A	`conf`	Z-Sets and Z-Detections: Circuit Characteristics that Simplify Fault Diagnosis. DATE Irith Pomeranz, Srikanth Venkataraman, Sudhakar M. Reddy, Bharath Seshadri
2003	Misc	`conf`	Concurrent Execution of Diagnostic Fault Simulation and Equivalence Identification During Diagnostic Test Generation. VTS Xiaoming Yu, M. Enamul Amyeen, Srikanth Venkataraman, Ruifeng Guo, Irith Pomeranz
2001	A	`conf`	A technique for fault diagnosis of defects in scan chains. ITC Ruifeng Guo, Srikanth Venkataraman
2001	J	`jnl`	Diagnostic simulation of stuck-at faults in sequential circuits using compact lists. ACM Trans. Design Autom. Electr. Syst. Ismed Hartanto, Srikanth Venkataraman, W. Kent Fuchs, Elizabeth M. Rudnick, Janak H. Patel, Sreejit Chakravarty
2001	Misc	`conf`	On Diagnosing Path Delay Faults in an At-Speed Environment. VTS Ramesh C. Tekumalla, Srikanth Venkataraman, Jayabrata Ghosh-Dastidar
2001	J	`jnl`	Poirot: Applications of a Logic Fault Diagnosis Tool. IEEE Des. Test Comput. Srikanth Venkataraman, Scott Brady Drummonds
2000	Misc	`conf`	A Technique for Logic Fault Diagnosis of Interconnect Open Defects. VTS Srikanth Venkataraman, Scott Brady Drummonds
2000	A	`conf`	POIROT: a logic fault diagnosis tool and its applications. ITC Srikanth Venkataraman, Scott Brady Drummonds
1999	Misc	`conf`	Multiple Design Error Diagnosis and Correction in Digital VLSI Circuits. VTS Andreas G. Veneris, Ibrahim N. Hajj, Srikanth Venkataraman, W. Kent Fuchs
1998	Misc	`conf`	Diagnostic Simulation of Sequential Circuits Using Fault Sampling. VLSI Design Srikanth Venkataraman, W. Kent Fuchs, Janak H. Patel
1997	A	`conf`	A deductive technique for diagnosis of bridging faults. ICCAD Srikanth Venkataraman, W. Kent Fuchs
1997	A	`conf`	Diagnosis of Bridging Faults in Sequential Circuits Using Adaptive Simulation, State Storage, and Path-Tracing. ITC Srikanth Venkataraman, W. Kent Fuchs
1997	Misc	`conf`	Distributed Diagnostic Simulation of Stuck-At Faults in Sequential Circuits. VLSI Design Srikanth Venkataraman, W. Kent Fuchs
1997	—	`—`	Simulation- and Deduction-Based Techniques for Fault Diagnosis Srikanth Venkataraman
1996	J	`jnl`	Diagnostic simulation of stuck-at faults in combinational circuits. J. Electron. Test. Sreejit Chakravarty, Yiming Gong, Srikanth Venkataraman
1996	Misc	`conf`	Dynamic diagnosis of sequential circuits based on stuck-at faults. VTS Srikanth Venkataraman, Ismed Hartanto, W. Kent Fuchs
1996	A*	`conf`	Partial Scan Design Based on Circuit State Information. DAC Dong Xiang, Srikanth Venkataraman, W. Kent Fuchs, Janak H. Patel
1995	J	`jnl`	Built-In Test for Circuits with Scan Based on Reseeding of Multiple-Polynomial Linear Feedback Shift Registers. IEEE Trans. Computers Sybille Hellebrand, Janusz Rajski, Steffen Tarnick, Srikanth Venkataraman, Bernard Courtois
1995	A*	`conf`	Rapid Diagnostic Fault Simulation of Stuck-at Faults in Sequential Circuits Using Compact Lists. DAC Srikanth Venkataraman, Ismed Hartanto, W. Kent Fuchs, Elizabeth M. Rudnick, Sreejit Chakravarty, Janak H. Patel