Sreeranga P. Rajan

35 papers A* 4A 1B 3Misc 2Journal 10Unranked 15
YearRankTypeTitle / Venue / Authors
2022 J jnl
A contextual multi-task neural approach to medication and adverse events identification from clinical text.
J. Biomed. Informatics
Sankaran Narayanan, Kaivalya Mannam, Pradeep Achan, Maneesha V. Ramesh, P. Venkat Rangan, Sreeranga P. Rajan
2021 J jnl
Unified concept and assertion detection using contextual multi-task learning in a clinical decision support system.
J. Biomed. Informatics
Sankaran Narayanan, Pradeep Achan, P. Venkat Rangan, Sreeranga P. Rajan
2020 — conf
Evaluation of Transfer Learning for Adverse Drug Event (ADE) and Medication Entity Extraction.
ClinicalNLP@EMNLP
Sankaran Narayanan, Kaivalya Mannam, Sreeranga P. Rajan, P. Venkat Rangan
2018 — conf
Automatic Assessment Item Bank Calibration for Learning Gap Identification.
ICACCI
Sankaran Narayanan, Fensa Merry Saj, Kamal Bijlani, Sreeranga P. Rajan
2017 J jnl
KLOVER: Automatic Test Generation for C and C Programs, Using Symbolic Execution.
IEEE Softw.
Hiroaki Yoshida, Guodong Li, Takuki Kamiya, Indradeep Ghosh, Sreeranga P. Rajan, Susumu Tokumoto, Kazuki Munakata, Tadahiro Uehara
2014 — conf
Enhancement of Data Level Security in MongoDB.
ISI (2)
Shiju Sathyadevan, Nandini Muraleedharan, Sreeranga P. Rajan
2013 J jnl
Big Data Analytics for Security.
IEEE Secur. Priv.
Alvaro A. Cárdenas, Pratyusa K. Manadhata, Sreeranga P. Rajan
2012 B conf
GKLEE: concolic verification and test generation for GPUs.
PPoPP
Guodong Li, Peng Li, Geoffrey Sawaya, Ganesh Gopalakrishnan, Indradeep Ghosh, Sreeranga P. Rajan
2011 B conf
Automated Driver Generation for Analysis of Web Applications.
FASE
Oksana Tkachuk, Sreeranga P. Rajan
2011 — conf
Automated System Testing of Dynamic Web Applications.
ICSOFT (Selected Papers)
Hideo Tanida, Mukul R. Prasad, Sreeranga P. Rajan, Masahiro Fujita
2011 — conf
Client-tier Validation of Dynamic Web Applications.
ICSOFT (2)
Hideo Tanida, Masahiro Fujita, Mukul R. Prasad, Sreeranga P. Rajan
2011 A* conf
KLOVER: A Symbolic Execution and Automatic Test Generation Tool for C++ Programs.
CAV
Guodong Li, Indradeep Ghosh, Sreeranga P. Rajan
2009 — conf
WEAVE: WEb Applications Validation Environment.
ICSE Companion
Sreeranga P. Rajan, Oksana Tkachuk, Mukul R. Prasad, Indradeep Ghosh, Nitin Goel, Tadahiro Uehara
2008 B conf
Context-Sensitive Relevancy Analysis for Efficient Symbolic Execution.
APLAS
Xin Li, Daryl Shannon, Indradeep Ghosh, Mizuhito Ogawa, Sreeranga P. Rajan, Sarfraz Khurshid
2007 A* conf
Combining environment generation and slicing for modular software model checking.
ASE
Oksana Tkachuk, Sreeranga P. Rajan
2006 A conf
Application of automated environment generation to commercial software.
ISSTA
Oksana Tkachuk, Sreeranga P. Rajan
2006 J jnl
Embedded Software Verification Using Symbolic Execution and Uninterpreted Functions.
Int. J. Parallel Program.
David W. Currie, Xiushan Feng, Masahiro Fujita, Alan J. Hu, Mark Kwan, Sreeranga P. Rajan
2005 J jnl
Editorial.
ACM Trans. Storage
Sreeranga P. Rajan
2005 — conf
Error Detection in Concurrent Java Programs.
SoftMC@CAV
Graham Hughes, Sreeranga P. Rajan, Tom Sidle, Keith D. Swenson
2004 — conf
High level hardware validation using hierarchical message sequence charts.
HLDVT
Praveen K. Murthy, Sreeranga P. Rajan, Koichiro Takayama
2002 — conf
Functional Verification of System on Chips-Practices, Issues and Challenges (Tutorial Abstract).
ASP-DAC/VLSI Design
Subir K. Roy, S. Ramesh, Supratik Chakraborty, Tsuneo Nakata, Sreeranga P. Rajan
2002 J jnl
Program slicing for VHDL.
Int. J. Softw. Tools Technol. Transf.
Edmund M. Clarke, Masahiro Fujita, Sreeranga P. Rajan, Thomas W. Reps, Subash Shankar, Tim Teitelbaum
2001 J jnl
A retargetable VLIW compiler framework for DSPs withinstruction-level parallelism.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Subramanian Rajagopalan, Sreeranga P. Rajan, Sharad Malik, Sandro Rigo, Guido Araujo, Koichiro Takayama
2000 A* conf
Automatic formal verification of DSP software.
DAC
David W. Currie, Alan J. Hu, Sreeranga P. Rajan
1999 — conf
Development of an optimizing compiler for a Fujitsu fixed-point digital signal processor.
CODES
Sreeranga P. Rajan, Masahiro Fujita, Ashok Sudarsanam, Sharad Malik
1999 A* conf
Model Checking Based on Sequential ATPG.
CAV
Vamsi Boppana, Sreeranga P. Rajan, Koichiro Takayama, Masahiro Fujita
1999 — conf
Program Slicing of Hardware Description Languages.
CHARME
Edmund M. Clarke, Masahiro Fujita, Sreeranga P. Rajan, Thomas W. Reps, Subash Shankar, Tim Teitelbaum
1998 J jnl
ATM switch design by high-level modeling, formal verification and high-level synthesis.
ACM Trans. Design Autom. Electr. Syst.
Sreeranga P. Rajan, Masahiro Fujita, K. Yuan, Mike Tien-Chien Lee
1998 Misc conf
Integration of High-Level Modeling, Formal Verification, and High-Level Synthesis in ATM Switch Design.
VLSI Design
Sreeranga P. Rajan, Masahiro Fujita
1998 — conf
Two Real Formal Verification Experiences: ATM Switch Chip and Parallel Cache Protocol.
FM-Trends
Masahiro Fujita, Sreeranga P. Rajan, Alan J. Hu
1997 — conf
ATM Switch Design: Parametric High-Level Modeling and Formal Verification.
AMAST
Sreeranga P. Rajan, Masahiro Fujita
1997 Misc conf
Industrial Strength Formal Verification Techniques for Hardware Designs.
VLSI Design
Sreeranga P. Rajan, Natarajan Shankar, Mandayam K. Srivas
1996 J jnl
From VHDL to efficient and first-time-right designs: a formal approach.
ACM Trans. Design Autom. Electr. Syst.
Peter F. A. Middelhoek, Sreeranga P. Rajan
1993 — conf
From Abstract Data Types to Shift Registers: A Case Study in Formal Specification and Verification at Differing Levels of Abstraction using Theorem Proving and Symbolic Simulation.
HUG
Sreeranga P. Rajan, Jeffrey J. Joyce, Carl-Johan H. Seger
1992 — conf
Executing HOL Specifications: Towards an Evaluation Semantics for Classical Higher Order Logic.
TPHOLs
Sreeranga P. Rajan