Sreejit Chakravarty

125 papers A* 5A 19C 2Misc 36Journal 41Unranked 21

Year	Rank	Type	Title / Venue / Authors
2023	—	`conf`	Effective and Efficient Test and Diagnosis Pattern Generation for Many Inter-Die Interconnects in Chiplet-Based Packages. 3DIC Po-Yao Chuang, Francesco Lorenzelli, Sreejit Chakravarty, Slimane Boutobza, Cheng-Wen Wu, Georges G. E. Gielen, Erik Jan Marinissen
2023	Misc	`conf`	Effective and Efficient Testing of Large Numbers of Inter-Die Interconnects in Chiplet-Based Multi-Die Packages. VTS Po-Yao Chuang, Francesco Lorenzelli, Sreejit Chakravarty, Cheng-Wen Wu, Georges G. E. Gielen, Erik Jan Marinissen
2023	Misc	`conf`	IP Session on Chiplet: Design, Assembly, and Test. VTS Bapi Vinnakota, Jaber Derakhshandeh, Eric Beyne, Erik Jan Marinissen, Sreejit Chakravarty
2023	Misc	`conf`	Silent Data Errors: Sources, Detection, and Modeling. VTS Adit D. Singh, Sreejit Chakravarty, George Papadimitriou, Dimitris Gizopoulos
2022	—	`ed.`	IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2022, Austin, TX, USA, October 19-21, 2022 DFT Luca Cassano, Sreejit Chakravarty, Alberto Bosio
2022	Misc	`conf`	Special Session: A Call to Standardize Chip-let Interconnect Testing. VTS Sreejit Chakravarty
2020	Misc	`conf`	Internal I/O Testing: Definition and a Solution. VTS Sreejit Chakravarty, Fei Su, Indira A. Gohad, Sudheer V. Bandana, B. S. Adithya, Wei Ming Lim
2020	J	`jnl`	Testing of Prebond Through Silicon Vias. IEEE Des. Test Sourav Das, Fei Su, Sreejit Chakravarty
2019	Misc	`conf`	A Comparative Study of Pre-bond TSV Test Methodologies. VTS Sourav Das, Fei Su, Sreejit Chakravarty
2018	A	`conf`	A PVT-Resilient No-Touch DFT Methodology for Prebond TSV Testing. ITC Sourav Das, Fei Su, Sreejit Chakravarty
2018	Misc	`conf`	Innovative practices on functional testing and fault simulation for FuSa. VTS Anandh Krishnan, John van Gelder, Mayukh Bhattacharya, Sreejit Chakravarty, Prashant Goteti
2018	Misc	`conf`	Innovative practices on memory test practice. VTS M. Casarsa, Gurgen Harutyunyan, Kaitlyn Chen, Ramesh Sharma, Giri Podichetty, Martin Keim, Sreejit Chakravarty, Ramesh C. Tekumalla
2017	Misc	`conf`	Innovative practices session 6C DFT for functional safety. VTS Prashant Goteti, Sreejit Chakravarty
2016	J	`jnl`	A Hybrid Kernel Extreme Learning Machine and Improved Cat Swarm Optimization for Microarray Medical Data Classification. Int. J. Appl. Evol. Comput. Sreejit Chakravarty, Ranjeeta Bisoi, P. K. Dash
2016	J	`jnl`	Evolutionary extreme learning machine for energy price forecasting. Int. J. Knowl. Based Intell. Eng. Syst. Sreejit Chakravarty, P. Mohapatra, Pradipta Kishore Dash
2016	J	`jnl`	Microarray medical data classification using kernel ridge regression and modified cat swarm optimization based gene selection system. Swarm Evol. Comput. P. Mohapatra, Sreejit Chakravarty, P. K. Dash
2015	J	`jnl`	An improved cuckoo search based extreme learning machine for medical data classification. Swarm Evol. Comput. P. Mohapatra, Sreejit Chakravarty, Pradipta K. Dash
2014	—	`conf`	Silicon Evaluation of Cell-Aware ATPG Tests and Small Delay Tests. ATS Fan Yang, Sreejit Chakravarty, Arun Gunda, Nicole Wu, Jianyu Ning
2013	Misc	`conf`	Innovative practices session 2C: Memory test. VTS Charutosh Dixit, Ramesh C. Tekumalla, Sreejit Chakravarty, Manuel d'Abreu, Zhuoyu Bao, Concetta Riccobene
2013	J	`jnl`	Power-safe application of tdf patterns to flip-chip designs during wafer test. ACM Trans. Design Autom. Electr. Syst. Wei Zhao, Junxia Ma, Mohammad Tehranipoor, Sreejit Chakravarty
2012	J	`jnl`	A PSO based integrated functional link net and interval type-2 fuzzy logic system for predicting stock market indices. Appl. Soft Comput. Sreejit Chakravarty, Pradipta K. Dash
2012	Misc	`conf`	A novel method for fast identification of peak current during test. VTS Wei Zhao, Sreejit Chakravarty, Junxia Ma, Narendra Devta-Prasanna, Fan Yang, Mohammad Tehranipoor
2012	J	`jnl`	Ensuring Power-Safe Application of Test Patterns Using an Effective Gating Approach Considering Current Limits. J. Low Power Electron. Wei Zhao, Mohammad Tehranipoor, Sreejit Chakravarty
2012	J	`jnl`	Evolutionary functional link interval type-2 fuzzy neural system for exchange rate prediction. Int. J. Data Min. Model. Manag. Sreejit Chakravarty, Pradipta K. Dash
2012	J	`jnl`	Layout-Aware Pattern Evaluation and Analysis for Power-Safe Application of Transition Delay Fault Patterns. J. Low Power Electron. Hassan Salmani, Wei Zhao, Mohammad Tehranipoor, Sreejit Chakravarty, Patrick Girard, Xiaoqing Wen
2012	Misc	`conf`	Silicon evaluation of faster than at-speed transition delay tests. VTS Sreejit Chakravarty, Narendra Devta-Prasanna, Arun Gunda, Junxia Ma, Fan Yang, H. Guo, R. Lai, D. Li
2011	—	`conf`	A Process Monitor Based Speed Binning and Die Matching Algorithm. Asian Test Symposium Sreejit Chakravarty
2011	J	`jnl`	An Evolutionary Functional Link Neural Fuzzy Model for Financial Time Series Forecasting. Int. J. Appl. Evol. Comput. Sreejit Chakravarty, Pradipta K. Dash, V. Ravikumar Pandi, Bijaya K. Panigrahi
2011	J	`jnl`	Dynamic filter weights neural network model integrated with differential evolution for day-ahead price forecasting in energy market. Expert Syst. Appl. Sreejit Chakravarty, Pradipta K. Dash
2011	A	`conf`	Optimal manufacturing flow to determine minumum operating voltage. ITC Sreejit Chakravarty, Binh Dang, Darcy Escovedo, A. J. Haas
2011	Misc	`conf`	Power-safe test application using an effective gating approach considering current limits. VTS Wei Zhao, Mohammad Tehranipoor, Sreejit Chakravarty
2010	Misc	`conf`	Impact of multiple input switching on delay test under process variation. VTS Sean H. Wu, Sreejit Chakravarty, Li-C. Wang
2010	—	`conf`	Modified Scan Flip-Flop for Low Power Testing. Asian Test Symposium Amit Mishra, Nidhi Sinha, Satdev, Virendra Singh, Sreejit Chakravarty, Adit D. Singh
2010	—	`conf`	Power-Safe Application of Transition Delay Fault Patterns Considering Current Limit during Wafer Test. Asian Test Symposium Wei Zhao, Junxia Ma, Mohammad Tehranipoor, Sreejit Chakravarty
2010	Misc	`conf`	Special session 11C: Hot topic design consideration and silicon evaluation of on-chip monitors. VTS Sreejit Chakravarty
2010	A	`conf`	Testing of latch based embedded arrays using scan tests. ITC Fan Yang, Sreejit Chakravarty
2009	—	`conf`	Detectability of internal bridging faults in scan chains. ASP-DAC Fan Yang, Sreejit Chakravarty, Narendra Devta-Prasanna, Sudhakar M. Reddy, Irith Pomeranz
2009	J	`jnl`	Fast Enhancement of Validation Test Sets for Improving the Stuck-at Fault Coverage of RTL Circuits. IEEE Trans. Very Large Scale Integr. Syst. Loganathan Lingappan, Vijay Gangaram, Niraj K. Jha, Sreejit Chakravarty
2009	—	`conf`	Forecasting Stock Market Indices using Hybrid Network. NaBIC Sreejit Chakravarty, Pradipta K. Dash
2009	—	`conf`	Improving the Detectability of Resistive Open Faults in Scan Cells. DFT Fan Yang, Sreejit Chakravarty, Narendra Devta-Prasanna, Sudhakar M. Reddy, Irith Pomeranz
2009	—	`conf`	Path selection for monitoring unexpected systematic timing effects. ASP-DAC Nicholas Callegari, Pouria Bastani, Li-C. Wang, Sreejit Chakravarty, Alexander Tetelbaum
2008	J	`jnl`	A Methodology for Handling Complex Functional Constraints for Large Industrial Designs. J. Electron. Test. Abhijit Jas, Yi-Shing Chang, Sreejit Chakravarty
2008	C	`conf`	An Enhanced Logic BIST Architecture for Online Testing. IOLTS Fan Yang, Sreejit Chakravarty, Narendra Devta-Prasanna, Sudhakar M. Reddy, Irith Pomeranz
2008	Misc	`conf`	An Industrial Case Study of Sticky Path-Delay Faults. VTS I-De Huang, Yi-Shing Chang, Sandeep K. Gupta, Sreejit Chakravarty
2008	A	`conf`	Detection of Internal Stuck-open Faults in Scan Chains. ITC Fan Yang, Sreejit Chakravarty, Narendra Devta-Prasanna, Sudhakar M. Reddy, Irith Pomeranz
2008	—	`conf`	Detection of Transistor Stuck-Open Faults in Asynchronous Inputs of Scan Cells. DFT Fan Yang, Sreejit Chakravarty, Narendra Devta-Prasanna, Sudhakar M. Reddy, Irith Pomeranz
2008	Misc	`conf`	On the Detectability of Scan Chain Internal Faults - An Industrial Case Study. VTS Fan Yang, Sreejit Chakravarty, Narendra Devta-Prasanna, Sudhakar M. Reddy, Irith Pomeranz
2008	—	`conf`	Refining Delay Test Methodology Using Knowledge of Asymmetric Transition Delay. ATS Sean H. Wu, Sreejit Chakravarty, Alexander Tetelbaum, Li-C. Wang
2006	A	`conf`	A Study of Implication Based Pseudo Functional Testing. ITC Manan Syal, Kameshwar Chandrasekar, Vishnu C. Vimjam, Michael S. Hsiao, Yi-Shing Chang, Sreejit Chakravarty
2006	—	`conf`	An Approach to Minimizing Functional Constraints. DFT Abhijit Jas, Yi-Shing Chang, Sreejit Chakravarty
2006	A	`conf`	Exact At-speed Delay Fault Grading in Sequential Circuits. ITC Mahilchi Milir Vaseekar Kumar, Spyros Tragoudas, Sreejit Chakravarty, Rathish Jayabharathi
2006	J	`jnl`	Exact Delay Fault Coverage in Sequential Logic Under Any Delay Fault Model. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Mahilchi Milir Vaseekar Kumar, Spyros Tragoudas, Sreejit Chakravarty, Rathish Jayabharathi
2006	Misc	`conf`	Path Delay Fault Simulation on Large Industrial Designs. VTS Suriyaprakash Natarajan, Srinivas Patil, Sreejit Chakravarty
2006	Misc	`conf`	Silicon Evaluation of Logic Proximity Bridge Patterns. VTS Eric N. Tran, Vishwashanth Kasulasrinivas, Sreejit Chakravarty
2005	J	`jnl`	Efficient techniques for transition testing. ACM Trans. Design Autom. Electr. Syst. Xiao Liu, Michael S. Hsiao, Sreejit Chakravarty, Paul J. Thadikaran
2005	Misc	`conf`	Experimental Evaluation of Bridge Patterns for a High Performance Microprocessor. VTS Sreejit Chakravarty, Yi-Shing Chang, Hiep Hoang, Sridhar Jayaraman, Silvio Picano, Cheryl Prunty, Eric W. Savage, Rehan Sheikh, Eric N. Tran, Khen Wee
2005	A	`conf`	Implicit and Exact Path Delay Fault Grading in Sequential Circuits. DATE Mahilchi Milir Vaseekar Kumar, Spyros Tragoudas, Sreejit Chakravarty, Rathish Jayabharathi
2005	—	`conf`	Improving Logic Test Quality of Microprocessors. Asian Test Symposium Sreejit Chakravarty
2005	A	`conf`	Logic proximity bridges. ITC Eric N. Tran, Vamsee Krishna, Sujit T. Zachariah, Sreejit Chakravarty
2005	Misc	`conf`	Transition Tests for High Performance Microprocessors. VTS Yi-Shing Chang, Sreejit Chakravarty, Hiep Hoang, Nick Thorpe, Khen Wee
2005	—	`conf`	Untestable Multi-Cycle Path Delay Faults in Industrial Designs. Asian Test Symposium Manan Syal, Michael S. Hsiao, Suriyaprakash Natarajan, Sreejit Chakravarty
2004	A	`conf`	Defect Coverage Analysis of Partitioned Testing. ITC Sreejit Chakravarty, Eric W. Savage, Eric N. Tran
2004	J	`jnl`	Extraction of two-node bridges from large industrial circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Sujit T. Zachariah, Sreejit Chakravarty
2004	A	`conf`	Identifying Untestable Transition Faults in Latch Based Designs with Multiple Clocks. ITC Manan Syal, Michael S. Hsiao, Sreejit Chakravarty
2003	J	`jnl`	Algorithm to extract two-node bridges. IEEE Trans. Very Large Scale Integr. Syst. Sujit T. Zachariah, Sreejit Chakravarty
2003	Misc	`conf`	Efficient Implication - Based Untestable Bridge Fault Identifier. VTS Manan Syal, Michael S. Hsiao, Kiran B. Doreswamy, Sreejit Chakravarty
2003	J	`jnl`	Efficient Transition Fault ATPG Algorithms Based on Stuck-At Test Vectors. J. Electron. Test. Xiao Liu, Michael S. Hsiao, Sreejit Chakravarty, Paul J. Thadikaran
2002	A	`conf`	Experimental Evaluation of Scan Tests for Bridges. ITC Sreejit Chakravarty, Ankur Jain, Nandakumar Radhakrishnan, Eric W. Savage, Sujit T. Zachariah
2002	Misc	`conf`	Fault Models for Speed Failures Caused by Bridges and Opens. VTS Sreejit Chakravarty, Ankur Jain
2002	Misc	`conf`	Layout Analysis to Extract Open Nets Caused by Systematic Failure Mechanisms. VTS Sreejit Chakravarty, Kambiz Komeyli, Eric W. Savage, Michael J. Carruthers, Bret T. Stastny, Sujit T. Zachariah
2002	—	`conf`	Novel ATPG algorithms for transition faults. ETW Xiao Liu, Michael S. Hsiao, Sreejit Chakravarty, Paul J. Thadikaran
2002	—	`conf`	Supplemental Test Methods (Tutorial Abstract). ISQED Sreejit Chakravarty
2002	A	`conf`	Techniques to Reduce Data Volume and Application Time for Transition Test. ITC Xiao Liu, Michael S. Hsiao, Sreejit Chakravarty, Paul J. Thadikaran
2001	Misc	`conf`	A Novel Algorithm for Multi-Node Bridge Analysis of Large VLSI Circuits. VLSI Design Sujit T. Zachariah, Sreejit Chakravarty
2001	J	`jnl`	Automatic generation and compaction of March tests for memory arrays. IEEE Trans. Very Large Scale Integr. Syst. Kamran Zarrineh, Shambhu J. Upadhyaya, Sreejit Chakravarty
2001	J	`jnl`	Diagnostic simulation of stuck-at faults in sequential circuits using compact lists. ACM Trans. Design Autom. Electr. Syst. Ismed Hartanto, Srikanth Venkataraman, W. Kent Fuchs, Elizabeth M. Rudnick, Janak H. Patel, Sreejit Chakravarty
2000	A*	`conf`	A novel algorithm to extract two-node bridges. DAC Sujit T. Zachariah, Sreejit Chakravarty, Carl D. Roth
2000	A	`conf`	A scalable and efficient methodology to extract two node bridges from large industrial circuits. ITC Sujit T. Zachariah, Sreejit Chakravarty
2000	A	`conf`	An analysis of the delay defect detection capability of the ECR test method. ITC Seonki Kim, Sreejit Chakravarty, Bapiraju Vinnakota
2000	J	`jnl`	STBM: a fast algorithm to simulate I IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Sreejit Chakravarty, Sujit T. Zachariah
1999	Misc	`conf`	A Comparative Study of Pseudo Stuck-At and Leakage Fault Model. VLSI Design Sujit T. Zachariah, Sreejit Chakravarty
1999	C	`conf`	On Detecting Bridges Causing Timing Failures. ICCD Sreenivas Mandava, Sreejit Chakravarty, Sandip Kundu
1999	Misc	`conf`	Techniques to Encode and Compress Fault Dictionaries. VTS Sreejit Chakravarty, Vinodh Gopal
1998	A	`conf`	A new framework for generating optimal March tests for memory arrays. ITC Kamran Zarrineh, Shambhu J. Upadhyaya, Sreejit Chakravarty
1998	Misc	`conf`	Computing Stress Tests for Gate Oxide Shorts. VLSI Design Vinay Dabholkar, Sreejit Chakravarty
1998	J	`jnl`	Locating bridging faults using dynamically computed stuck-at fault dictionaries. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Yiming Gong, Sreejit Chakravarty
1998	J	`jnl`	Techniques for minimizing power dissipation in scan and combinational circuits during test application. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Vinay Dabholkar, Sreejit Chakravarty, Irith Pomeranz, Sudhakar M. Reddy
1997	J	`jnl`	Algorithms to compute bridging fault coverage of ACM Trans. Design Autom. Electr. Syst. Paul J. Thadikaran, Sreejit Chakravarty, Janak H. Patel
1997	—	`conf`	Computing stress tests for interconnect defects. Asian Test Symposium Vinay Dabholkar, Sreejit Chakravarty
1997	—	`conf`	On the capability of delay tests to detect bridges and opens. Asian Test Symposium Sreejit Chakravarty
1997	Misc	`conf`	Using fault sampling to compute I VTS Yiming Gong, Sreejit Chakravarty
1996	J	`jnl`	A Study of Theoretical Issues in the Synthesis of Delay Fault Testability Circuits. IEEE Trans. Computers Sreejit Chakravarty
1996	Misc	`conf`	A sampling technique for diagnostic fault simulation. VTS Sreejit Chakravarty
1996	J	`jnl`	Algorithms to select J. Electron. Test. Sreejit Chakravarty, Paul J. Thadikaran
1996	J	`jnl`	Diagnostic simulation of stuck-at faults in combinational circuits. J. Electron. Test. Sreejit Chakravarty, Yiming Gong, Srikanth Venkataraman
1996	Misc	`conf`	Fast Algorithms for Computer IDDQ Tests for Combination Circuits. VLSI Design Paul J. Thadikaran, Sreejit Chakravarty
1996	J	`jnl`	Simulation and Generation of IDDQ Tests for Bridging Faults in Combinational Circuits. IEEE Trans. Computers Sreejit Chakravarty, Paul J. Thadikaran
1995	J	`jnl`	Conference Reports. IEEE Des. Test Comput. Sreejit Chakravarty, Ramalingam Sridhar, Shambhu J. Upadhyaya, Yervant Zorian, Gil Philips, Bozena Kaminska, Bernard Courtois
1995	Misc	`conf`	Cyclic stress tests for full scan circuits. VTS Vinay Dabholkar, Sreejit Chakravarty, J. Najm, Janak H. Patel
1995	—	`conf`	Fault Simulation of FTCS Paul J. Thadikaran, Sreejit Chakravarty, Janak H. Patel
1995	A	`conf`	On adaptive diagnostic test generation. ICCAD Yiming Gong, Sreejit Chakravarty
1995	A*	`conf`	Rapid Diagnostic Fault Simulation of Stuck-at Faults in Sequential Circuits Using Compact Lists. DAC Srikanth Venkataraman, Ismed Hartanto, W. Kent Fuchs, Elizabeth M. Rudnick, Sreejit Chakravarty, Janak H. Patel
1995	Misc	`conf`	Voting model based diagnosis of bridging faults in combinational circuits. VLSI Design Sreejit Chakravarty, Yiming Gong
1994	A	`conf`	A Study of I ITC Sreejit Chakravarty, Paul J. Thadikaran
1994	Misc	`conf`	Diagnostic simulation of stuck-at faults in combinational circuits. VTS Sreejit Chakravarty, Yiming Gong
1993	J	`jnl`	A Characterization of Binary Decision Diagrams. IEEE Trans. Computers Sreejit Chakravarty
1993	A*	`conf`	An Algorithm for Diagnosing Two-Line Bridging Faults in Combinational Circuits. DAC Sreejit Chakravarty, Yiming Gong
1993	Misc	`conf`	Simulation and generation of I VTS Sreejit Chakravarty, Paul J. Thadikaran
1992	A*	`conf`	Algorithms for Current Monitor Based Diagnosis of Bridging and Leakage Faults. DAC Sreejit Chakravarty, Minsheng Liu
1992	J	`jnl`	Algorithms for IDDQ measurement based diagnosis of bridging faults. J. Electron. Test. Sreejit Chakravarty, Minsheng Liu
1992	Misc	`conf`	On Computing Tests for Bridging and Leakage Faults: Complexity Results and Universal Test Sets. VLSI Design Sreejit Chakravarty
1992	J	`jnl`	Parallel and serial heuristics for the minimum set cover problem. J. Supercomput. Sreejit Chakravarty, Ajay Shekhawat
1991	J	`jnl`	A characterization of robust test-pairs for stuck-open faults. J. Electron. Test. Sreejit Chakravarty
1991	J	`jnl`	Minimum area layout of series-parallel transistor networks is NP-hard. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Sreejit Chakravarty, Xin He, S. S. Ravi
1990	J	`jnl`	Computing optimal test sequences from complete test sets for stuck-open faults in CMOS circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Sreejit Chakravarty, S. S. Ravi
1990	—	`conf`	Heuristics for the MSC Problem for Serial and Shared-Memory Computers. ICPP (3) Ajay Shekhawat, Sreejit Chakravarty
1990	J	`jnl`	On Computing Signal Probability and Detection Probability of Stuck-at Faults. IEEE Trans. Computers Sreejit Chakravarty, Harry B. Hunt III
1990	A*	`conf`	On Synthesizing and Identifying Stuck-Open Testable CMOS Combinational Circuits (extended abstract). DAC Sreejit Chakravarty
1990	J	`jnl`	Testing of non-feedback bridging faults. Integr. Sreejit Chakravarty
1989	J	`jnl`	A Note on Detecting Sneak Paths in Transistor Networks. IEEE Trans. Computers Sreejit Chakravarty, Harry B. Hunt III
1989	A	`conf`	A Testable Realization of CMOS Combinational Circuits. ITC Sreejit Chakravarty
1989	J	`jnl`	On the complexity of computing tests for CMOS gates. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Sreejit Chakravarty
1989	J	`jnl`	The Complexity of Generating Minimum Test Sets for PLA's and Monotone Combinational Circuits. IEEE Trans. Computers Sreejit Chakravarty, Harry B. Hunt III, S. S. Ravi, Daniel J. Rosenkrantz
1988	—	`conf`	A Unified Approach to Designing Fault-Tolerant Processor Ensembles. ICPP (1) Sreejit Chakravarty, Shambhu J. Upadhyaya
1986	A	`conf`	On the Computation of Detection Probability for Multiple Faults. ITC Sreejit Chakravarty, Harry B. Hunt III