Sounak Roy

14 papers C 4Misc 1Journal 5Unranked 4
YearRankTypeTitle / Venue / Authors
2024 C conf
A Novel Offset Compensation Technique for a High Speed Flash ADC.
TENCON
Abhijit Roy, Ashutosh Yadav, Sounak Roy
2023 J jnl
A low power offset voltage calibration method for flash ADCs.
Integr.
Shatadal Chatterjee, Sounak Roy
2022 J jnl
A Self-Calibration Method of a Pipeline ADC Based on Dynamic Capacitance Allotment.
IEEE Trans. Very Large Scale Integr. Syst.
Shatadal Chatterjee, Sounak Roy
2022 J jnl
A digitally controlled adaptive LDO for power management unit in sensor node.
Integr.
Jitumani Sarma, Shatadal Chatterjee, Rakesh Biswas, Sounak Roy
2021 — conf
A Fully Digital Foreground Calibration Technique of A Flash ADC.
ISVLSI
Shatadal Chatterjee, Maryaradhiya Daimari, Sounak Roy
2021 J jnl
A Square Wave-Based Digital Foreground Calibration Algorithm of a Pipeline ADC Using Approximate Harmonic Sampling.
IEEE Trans. Circuits Syst. II Express Briefs
Shatadal Chatterjee, Sounak Roy
2020 — conf
A Fast Transient Digitally Assisted Flash-Based Modular LDO for Sensor Nodes in WBAN.
ISVLSI
Jitumani Sarma, Shatadal Chatterjee, Rakesh Biswas, Sounak Roy
2020 — conf
An Adaptive Digitally Tuned Flash-based LDO with Reduced Hardware for Sensor Nodes in WBAN.
VDAT
Jitumani Sarma, Shatadal Chatterjee, Rakesh Biswas, Sounak Roy
2019 C conf
A Low Power mixed Signal Foreground Calibration Technique of a Pipeline ADC using a Variable Gain Amplifier.
TENCON
Sounak Roy, Shatadal Chatterjee
2019 — conf
Clock Pulse Based Foreground Calibration of a Sub-Radix-2 Successive Approximation Register ADC.
VDAT
M. Mahendra Reddy, Sounak Roy
2018 C conf
Sinusoid Based Foreground Calibration Algorithm of a Pipeline ADC Using Time Averaged Radix Extraction.
TENCON
Sounak Roy, Shatadal Chatterjee
2013 J jnl
Foreground calibration technique of a pipeline ADC using capacitor ratio of Multiplying Digital-to-Analog Converter (MDAC).
Microelectron. J.
Sounak Roy, Hiranmoy Basak, Swapna Banerjee
2012 C conf
Radix based digital calibration technique for pipelined ADC using Nyquist sampling of sinusoid.
ISCAS
Sounak Roy, Bibhudatta Sahoo, Swapna Banerjee
2008 Misc conf
A 9 bit 400 MHz CMOS Double-Sampled Sample-and-Hold Amplifier.
VLSI Design
Sounak Roy, Swapna Banerjee