Sophie Dupuis

32 papers A 1B 1C 6Journal 11Unranked 13
YearRankTypeTitle / Venue / Authors
2024 — conf
Logic Locking: Exploration of a new key-gate based on tristate logic.
LATS
Sophie Dupuis, Nassim Riadi, Clémy Moroukian, Florence Azaïs, Marie-Lise Flottes
2024 B conf
Power Analysis Attack Against post-SAT Logic Locking schemes.
ETS
Nassim Riadi, Florent Bruguier, Pascal Benoit, Sophie Dupuis, Marie-Lise Flottes
2023 J jnl
Hybrid Protection of Digital FIR Filters.
CoRR
Levent Aksoy, Quang-Linh Nguyen, Felipe Almeida, Jaan Raik, Marie-Lise Flottes, Sophie Dupuis, Samuel Pagliarini
2023 J jnl
Hybrid Protection of Digital FIR Filters.
IEEE Trans. Very Large Scale Integr. Syst.
Levent Aksoy, Quang-Linh Nguyen, Felipe Almeida, Jaan Raik, Marie-Lise Flottes, Sophie Dupuis, Samuel Pagliarini
2023 — conf
Resynthesis-based Attacks Against Logic Locking.
ISQED
Felipe Almeida, Levent Aksoy, Quang-Linh Nguyen, Sophie Dupuis, Marie-Lise Flottes, Samuel Pagliarini
2023 J jnl
Resynthesis-based Attacks Against Logic Locking.
CoRR
Felipe Almeida, Levent Aksoy, Quang-Linh Nguyen, Sophie Dupuis, Marie-Lise Flottes, Samuel Pagliarini
2023 J jnl
Using Approximate Circuits Against Hardware Trojans.
IEEE Des. Test
Honorio Martín, Sophie Dupuis, Giorgio Di Natale, Luis Entrena
2021 C conf
High-level Intellectual Property Obfuscation via Decoy Constants.
IOLTS
Levent Aksoy, Quang-Linh Nguyen, Felipe Almeida, Jaan Raik, Marie-Lise Flottes, Sophie Dupuis, Samuel Pagliarini
2021 J jnl
High-level Intellectual Property Obfuscation via Decoy Constants.
CoRR
Levent Aksoy, Quang-Linh Nguyen, Felipe Almeida, Jaan Raik, Marie-Lise Flottes, Sophie Dupuis, Samuel Pagliarini
2021 — conf
On Preventing SAT Attack with Decoy Key-Inputs.
ISVLSI
Quang-Linh Nguyen, Marie-Lise Flottes, Sophie Dupuis, Bruno Rouzeyre
2020 C conf
A Secure Scan Controller for Protecting Logic Locking.
IOLTS
Quang-Linh Nguyen, Emanuele Valea, Marie-Lise Flottes, Sophie Dupuis, Bruno Rouzeyre
2020 C conf
Development and Application of Embedded Test Instruments to Digital, Analog/RFs and Secure ICs.
IOLTS
Florence Azaïs, Serge Bernard, Mariane Comte, Bastien Deveautour, Sophie Dupuis, Hassan El Badawi, Marie-Lise Flottes, Patrick Girard, Vincent Kerzèrho, Laurent Latorre, François Lefèvre, Bruno Rouzeyre, Emanuele Valea, T. Vayssade, Arnaud Virazel
2019 — conf
A Comprehensive Approach to a Trusted Test Infrastructure.
IVSW
Marc Merandat, Vincent Reynaud, Emanuele Valea, Jérôme Quévremont, Nicolas Valette, Paolo Maistri, Régis Leveugle, Marie-Lise Flottes, Sophie Dupuis, Bruno Rouzeyre, Giorgio Di Natale
2019 J jnl
Logic Locking: A Survey of Proposed Methods and Evaluation Metrics.
J. Electron. Test.
Sophie Dupuis, Marie-Lise Flottes
2019 — conf
Providing Confidentiality and Integrity in Ultra Low Power IoT Devices.
DTIS
Emanuele Valea, Mathieu Da Silva, Marie-Lise Flottes, Giorgio Di Natale, Sophie Dupuis, Bruno Rouzeyre
2019 J jnl
SECCS: SECure Context Saving for IoT Devices.
CoRR
Emanuele Valea, Mathieu Da Silva, Giorgio Di Natale, Marie-Lise Flottes, Sophie Dupuis, Bruno Rouzeyre
2018 — conf
A New Secure Stream Cipher for Scan Chain Encryption.
IVSW
Mathieu Da Silva, Emanuele Valea, Marie-Lise Flottes, Sophie Dupuis, Giorgio Di Natale, Bruno Rouzeyre
2018 C conf
A Novel Use of Approximate Circuits to Thwart Hardware Trojan Insertion and Provide Obfuscation.
IOLTS
Honorio Martín, Luis Entrena, Sophie Dupuis, Giorgio Di Natale
2018 — conf
Encryption of test data: which cipher is better?
PRIME
Mathieu Da Silva, Emanuele Valea, Marie-Lise Flottes, Sophie Dupuis, Giorgio Di Natale, Bruno Rouzeyre
2018 J jnl
Protection Against Hardware Trojans With Logic Testing: Proposed Solutions and Challenges Ahead.
IEEE Des. Test
Sophie Dupuis, Marie-Lise Flottes, Giorgio Di Natale, Bruno Rouzeyre
2018 — conf
SI ECCS: SECure context saving for IoT devices.
DTIS
Emanuele Valea, Mathieu Da Silva, Giorgio Di Natale, Marie-Lise Flottes, Sophie Dupuis, Bruno Rouzeyre
2017 — conf
Hacking the Control Flow error detection mechanism.
IVSW
Giorgio Di Natale, Marie-Lise Flottes, Sophie Dupuis, Bruno Rouzeyre
2016 — conf
Hardware Trust through Layout Filling: A Hardware Trojan Prevention Technique.
ISVLSI
Papa-Sidi Ba, Sophie Dupuis, Palanichamy Manikandan, Marie-Lise Flottes, Giorgio Di Natale, Bruno Rouzeyre
2016 — conf
Using outliers to detect stealthy hardware trojan triggering?
IVSW
Papa-Sidy Ba, Sophie Dupuis, Marie-Lise Flottes, Giorgio Di Natale, Bruno Rouzeyre
2015 — conf
Hardware Trojan prevention using layout-level design approach.
ECCTD
Papa-Sidi Ba, Palanichamy Manikandan, Sophie Dupuis, Marie-Lise Flottes, Giorgio Di Natale, Bruno Rouzeyre
2015 A conf
New testing procedure for finding insertion sites of stealthy hardware trojans.
DATE
Sophie Dupuis, Papa-Sidi Ba, Marie-Lise Flottes, Giorgio Di Natale, Bruno Rouzeyre
2015 — conf
On the limitations of logic testing for detecting Hardware Trojans Horses.
DTIS
Marie-Lise Flottes, Sophie Dupuis, Papa-Sidi Ba, Bruno Rouzeyre
2014 C conf
A novel hardware logic encryption technique for thwarting illegal overproduction and Hardware Trojans.
IOLTS
Sophie Dupuis, Papa-Sidi Ba, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre
2014 J jnl
A regular fabric design methodology for applications requiring specific layout-level design rules.
Microelectron. J.
Sophie Dupuis, Ludovic Noury, Nicolas Fel
2013 J jnl
On the Effectiveness of Hardware Trojan Horse Detection via Side-Channel Analysis.
Inf. Secur. J. A Glob. Perspect.
Sophie Dupuis, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre
2013 J jnl
Secure JTAG Implementation Using Schnorr Protocol.
J. Electron. Test.
Amitabh Das, Jean DaRolt, Santosh Ghosh, Stefaan Seys, Sophie Dupuis, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre, Ingrid Verbauwhede
2012 C conf
A reference low-complexity structured ASIC.
ISCAS
Ludovic Noury, Sophie Dupuis, Nicolas Fel