Sophiane Senni

15 papers A 5C 1Journal 3Unranked 6
YearRankTypeTitle / Venue / Authors
2020 A conf
A Universal Spintronic Technology based on Multifunctional Standardized Stack.
DATE
Mehdi Baradaran Tahoori, Sarath Mohanachandran Nair, Rajendra Bishnoi, Lionel Torres, Sophiane Senni, Guillaume Patrigeon, Pascal Benoit, Gregory di Pendina, Guillaume Prenat
2019 J jnl
Design and Evaluation of a 28-nm FD-SOI STT-MRAM for Ultra-Low Power Microcontrollers.
IEEE Access
Guillaume Patrigeon, Pascal Benoit, Lionel Torres, Sophiane Senni, Guillaume Prenat, Gregory di Pendina
2018 C conf
From Spintronic Devices to Hybrid CMOS/Magnetic System On Chip.
VLSI-SoC
Sophiane Senni, Frederic Ouattara, Jad Mohdad, Kaan Sevin, Guillaume Patrigeon, Pascal Benoit, Pascal Nouet, Lionel Torres, François Duhem, Gregory di Pendina, Guillaume Prenat
2018 A conf
Main memory organization trade-offs with DRAM and STT-MRAM options based on gem5-NVMain simulation frameworks.
DATE
Manu Komalan, Oh Hyung Rock, Matthias Hartmann, Sushil Sakhare, Christian Tenllado, José Ignacio Gómez, Gouri Sankar Kar, Arnaud Furnémont, Francky Catthoor, Sophiane Senni, David Novo, Abdoulaye Gamatié, Lionel Torres
2018 A conf
Using multifunctional standardized stack as universal spintronic technology for IoT.
DATE
Mehdi Baradaran Tahoori, Sarath Mohanachandran Nair, Rajendra Bishnoi, Sophiane Senni, Jad Mohdad, Frédérick Mailly, Lionel Torres, Pascal Benoit, Abdoulaye Gamatié, Pascal Nouet, Frederic Ouattara, Gilles Sassatelli, Kotb Jabeur, Pierre Vanhauwaert, A. Atitoaie, I. Firastrau, Gregory di Pendina, Guillaume Prenat
2017 — conf
A novel SRAM - STT-MRAM hybrid cache implementation improving cache performance.
NANOARCH
Odilia Coi, Guillaume Patrigeon, Sophiane Senni, Lionel Torres, Pascal Benoit
2017 A conf
Embedded systems to high performance computing using STT-MRAM.
DATE
Sophiane Senni, Thibaud Delobelle, Odilia Coi, Pierre-Yves Peneau, Lionel Torres, Abdoulaye Gamatié, Pascal Benoit, Gilles Sassatelli
2017 — conf
GREAT: HeteroGeneous IntegRated Magnetic tEchnology Using Multifunctional Standardized sTack.
ISVLSI
Mehdi Baradaran Tahoori, Sarath Mohanachandran Nair, Rajendra Bishnoi, Sophiane Senni, Jad Mohdad, Frédérick Mailly, Lionel Torres, Pascal Benoit, Pascal Nouet, Rui Ma, Martin Kreißig, Frank Ellinger, Kotb Jabeur, Pierre Vanhauwaert, Gregory di Pendina, Guillaume Prenat
2016 J jnl
Exploring MRAM Technologies for Energy Efficient Systems-On-Chip.
IEEE J. Emerg. Sel. Topics Circuits Syst.
Sophiane Senni, Lionel Torres, Gilles Sassatelli, Abdoulaye Gamatié, Bruno Mussard
2016 — conf
Loop optimization in presence of STT-MRAM caches: A study of performance-energy tradeoffs.
PATMOS
Pierre-Yves Peneau, Rabab Bouziane, Abdoulaye Gamatié, Erven Rohou, Florent Bruguier, Gilles Sassatelli, Lionel Torres, Sophiane Senni
2016 J jnl
Non-Volatile Processor Based on MRAM for Ultra-Low-Power IoT Devices.
ACM J. Emerg. Technol. Comput. Syst.
Sophiane Senni, Lionel Torres, Gilles Sassatelli, Abdoulaye Gamatié
2015 — conf
Emerging Non-volatile Memory Technologies Exploration Flow for Processor Architecture.
ISVLSI
Sophiane Senni, Lionel Torres, Gilles Sassatelli, Abdoulaye Gamatié, Bruno Mussard
2015 A conf
Potential applications based on NVM emerging technologies.
DATE
Sophiane Senni, Raphael Martins Brum, Lionel Torres, Gilles Sassatelli, Abdoulaye Gamatié, Bruno Mussard
2014 — conf
Exploration of Magnetic RAM Based Memory Hierarchy for Multicore Architecture.
ISVLSI
Sophiane Senni, Lionel Torres, Gilles Sassatelli, Anastasiia Butko, Bruno Mussard
2014 — conf
Power efficient Thermally Assisted Switching Magnetic memory based memory systems.
ReCoSoC
Sophiane Senni, Lionel Torres, Gilles Sassatelli, Anastasiia Butko, Bruno Mussard