Snorre Aunet - RankMe

99 papers B 3C 13Misc 4Journal 21Unranked 53

Year	Rank	Type	Title / Venue / Authors
2026	J	`jnl`	Efficient Asynchronous Sampling of Ripple Counter in VCO-ADC Using Ripple Register and Event Arbitration. IEEE Trans. Circuits Syst. II Express Briefs Kaspar Moulin, Tor Sverre Lande, Snorre Aunet, Dag T. Wisland
2025	—	`conf`	Comparative Analysis of Full Adders Based on DTMOS Schmitt-Trigger Standard Cells Operating at Sub-100 mV Supply Voltage. DCIS Muhammad Umer Khalid, Trond Ytterdal, Snorre Aunet
2025	—	`conf`	DTMOS Schmitt-Trigger Standard Cells based Frequency Divider Operating at 60 mV. PRIME Muhammad Umer Khalid, Trond Ytterdal, Snorre Aunet
2025	J	`jnl`	Guest Editorial: Selected Papers From IEEE Nordic Circuits and Systems Conference (NorCAS) 2024. IEEE Trans. Very Large Scale Integr. Syst. Jari Nurmi, Snorre Aunet, Alireza Saberkari
2025	J	`jnl`	Optimizing Energy Efficiency in Subthreshold RISC-V Cores. CoRR Asbjørn Djupdal, Magnus Själander, Magnus Jahre, Snorre Aunet, Trond Ytterdal
2025	—	`conf`	Robust DTMOS Schmitt-Trigger Circuits in 130 nm SOI CMOS for Sub-100mV Supply Voltage. DCIS Muhammad Umer Khalid, Trond Ytterdal, Snorre Aunet
2024	J	`jnl`	Guest Editorial Selected Papers From IEEE Nordic Circuits and Systems Conference (NorCAS) 2022. IEEE Trans. Very Large Scale Integr. Syst. Jari Nurmi, Snorre Aunet, Alireza Saberkari
2024	J	`jnl`	Guest Editorial Selected Papers From IEEE Nordic Circuits and Systems Conference (NorCAS) 2023. IEEE Trans. Very Large Scale Integr. Syst. Jari Nurmi, Snorre Aunet, Alireza Saberkari
2023	—	`conf`	Randomized Bulk-Voltages: A Countermeasure to Mask Side-Channel Leakage of CMOS Logic Gates. MWSCAS Magnus Amble, Snorre Aunet, Dag T. Wisland, Kristian Gjertsen Kjelgård
2022	—	`ed.`	IEEE Nordic Circuits and Systems Conference, NorCAS 2022, Oslo, Norway, October 25-26, 2022 NorCAS Jari Nurmi, Dag T. Wisland, Snorre Aunet, Kristian Kjelgaard
2022	J	`jnl`	Nwise and Pwise: 10T Radiation Hardened SRAM Cells for Space Applications With High Reliability Requirements. IEEE Access Azam Seyedi, Snorre Aunet, Per Gunnar Kjeldsberg
2021	J	`jnl`	Fast and Accurate Edge Computing Energy Modeling and DVFS Implementation in GEM5 Using System Call Emulation Mode. J. Signal Process. Syst. Yahya H. Yassin, Magnus Jahre, Per Gunnar Kjeldsberg, Snorre Aunet, Francky Catthoor
2021	—	`ed.`	IEEE Nordic Circuits and Systems Conference, NorCAS 2021, Oslo, Norway, October 26-27, 2021 NorCAS Jari Nurmi, Dag T. Wisland, Snorre Aunet, Kristian Kjelgaard
2021	—	`conf`	Subthreshold Power PC and Nand Race-Free Flip-Flops in Frequency Divider Applications. NorCAS Somayeh Hossein Zadeh, Trond Ytterdal, Snorre Aunet
2021	—	`conf`	Ultra Low Voltage Sub-100 mV Vdd CMOS. NEWCAS Snorre Aunet
2020	J	`jnl`	An Energy Efficient Level Shifter Capable of Logic Conversion From Sub-15 mV to 1.2 V. IEEE Trans. Circuits Syst. Even Låte, Trond Ytterdal, Snorre Aunet
2020	J	`jnl`	Benefiting From State Dependencies in Asymmetric SRAM Cells Through Conditional Word-Flipping. IEEE Trans. Very Large Scale Integr. Syst. Even Låte, Trond Ytterdal, Snorre Aunet
2020	—	`conf`	Comparative Study of Single, Regular and Flip Well Subthreshold SRAMs in 22 nm FDSOI Technology. NorCAS Somayeh Hossein Zadeh, Trond Ytterdal, Snorre Aunet
2020	—	`ed.`	IEEE Nordic Circuits and Systems Conference, NorCAS 2020, Oslo, Norway, October 27-28, 2020 NorCAS Jari Nurmi, Dag T. Wisland, Snorre Aunet, Kristian Kjelgaard
2020	—	`conf`	Multi-threshold Voltage and Dynamic Body Biasing Techniques for Energy Efficient Ultra Low Voltage Subthreshold Adders. NorCAS Somayeh Hossein Zadeh, Trond Ytterdal, Snorre Aunet
2019	—	`conf`	A Configurable and Versatile Architecture for Low Power, Energy Efficient Hardware Acceleration of Convolutional Neural Networks. NORCAS Steinar Thune Christensen, Snorre Aunet, Omer Qadir
2019	J	`jnl`	An Ultra-Low Voltage and Low-Energy Level Shifter in 28-nm UTBB-FDSOI. IEEE Trans. Circuits Syst. II Express Briefs Ali Asghar Vatanjou, Trond Ytterdal, Snorre Aunet
2019	—	`conf`	Exploring optimal back bias voltages for ultra low voltage CMOS digital Circuits in 22 nm FDSOI Technology. NORCAS Somayeh Hossein Zadeh, Trond Ytterdal, Snorre Aunet
2019	—	`conf`	Nwise: an Area Efficient and Highly Reliable Radiation Hardened Memory Cell Designed for Space Applications. NORCAS Azam Seyedi, Snorre Aunet, Per Gunnar Kjeldsberg
2019	—	`conf`	Ultra-Low Voltage Subthreshold Binary Adder Architectures for IoT Applications: Ripple Carry Adder or Kogge Stone Adder. NORCAS Somayeh Hossein Zadeh, Trond Ytterdal, Snorre Aunet
2018	J	`jnl`	A loadless 6T SRAM cell for sub- & near- threshold operation implemented in 28 nm FD-SOI CMOS technology. Integr. Even Låte, Trond Ytterdal, Snorre Aunet
2018	—	`conf`	Comparison of Ultra Low Power Full Adder Cells in 22 nm FDSOI Technology. NORCAS Somayeh Hossein Zadeh, Trond Ytterdal, Snorre Aunet
2018	J	`jnl`	Ultra-low voltage and energy efficient adders in 28 nm FDSOI exploring poly-biasing for device sizing. Microprocess. Microsystems Ali Asghar Vatanjou, Even Låte, Trond Ytterdal, Snorre Aunet
2017	J	`jnl`	Extended Comparative Analysis of Flip-Flop Architectures for Subthreshold Applications in 28 nm FD-SOI. Microprocess. Microsystems Even Låte, Ali Asghar Vatanjou, Trond Ytterdal, Snorre Aunet
2017	J	`jnl`	Special issue: Selected papers from the 1st NORCAS conference (2015 Nordic Circuits and Systems Conference (NORCAS): Norchip & International Symposium on System-on-Chip (SoC)). Microprocess. Microsystems Jim Tørresen, Snorre Aunet
2016	—	`conf`	28 nm UTBB-FDSOI energy efficient and variation tolerant custom digital-cell library with application to a subthreshold MAC block. MIXDES Ali Asghar Vatanjou, Trond Ytterdal, Snorre Aunet
2016	—	`conf`	Ultra-low voltage adders in 28 nm FDSOI exploring poly-biasing for device sizing. NORCAS Ali Asghar Vatanjou, Even Låte, Trond Ytterdal, Snorre Aunet
2015	—	`conf`	4 Sub-/near-threshold flip-flops with application to frequency dividers. ECCTD Ali Asghar Vatanjou, Trond Ytterdal, Snorre Aunet
2015	—	`conf`	An ultra-low-power/high-speed 9-bit adder design: Analysis and comparison Vs. technology from 130nm-LP to UTBB FD-SOI-28nm. NORCAS Hourieh Attarzadeh, Snorre Aunet, Trond Ytterdal
2015	—	`conf`	Comparative analysis of flip-flop architectures for subthreshold applications in 28nm FDSOI. NORCAS Even Låte, Ali Asghar Vatanjou, Trond Ytterdal, Snorre Aunet
2015	—	`conf`	Exploiting short channel effects and multi-Vt technology for increased robustness and reduced energy consumption, with application to a 16-bit subthreshold adder implemented in 65 nm CMOS. ECCTD Ali Asghar Vatanjou, Trond Ytterdal, Snorre Aunet
2014	—	`conf`	Modular layout-friendly cell library design applied for subthreshold CMOS. NORCHIP Jonathan Edvard Bjerkedok, Ali Asghar Vatanjou, Trond Ytterdal, Snorre Aunet
2014	—	`conf`	Performance comparison of 5 subthreshold CMOS flip-flops under process-, voltage-, and temperature variations, based on netlists from layout. NORCHIP Magne Voernes, Trond Ytterdal, Snorre Aunet
2013	C	`ed.`	16th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2013, Karlovy Vary, Czech Republic, April 8-10, 2013 DDECS Lukás Sekanina, Görschwin Fey, Jaan Raik, Snorre Aunet, Richard Ruzicka
2013	J	`jnl`	A 65 nm 32 b Subthreshold Processor With 9T Multi-Vt SRAM and Adaptive Supply Voltage Control. IEEE J. Solid State Circuits Sven Lütkemeier, Thorsten Jungeblut, Hans Kristian Otnes Berge, Snorre Aunet, Mario Porrmann, Ulrich Rückert
2013	C	`conf`	Proton beam characterization at Oslo Cyclotron Laboratory for radiation testing of electronic devices. DDECS Amir Hasanbegovic, Snorre Aunet
2013	C	`conf`	Yield-oriented energy and performance model for subthreshold circuits with Vth variations. DDECS Hans Kristian Otnes Berge, Snorre Aunet
2012	—	`conf`	A 9-bit 50MS/s asynchronous SAR ADC in 28nm CMOS. NORCHIP Tuan Vu Cao, Snorre Aunet, Trond Ytterdal
2011	J	`jnl`	Low-power subthreshold to above threshold level shifters in 90 nm and 65 nm process. Microprocess. Microsystems Amir Hasanbegovic, Snorre Aunet
2011	C	`conf`	Muller C-elements based on minority-3 functions for ultra low voltage supplies. DDECS Hans Kristian Otnes Berge, Amir Hasanbegovic, Snorre Aunet
2011	C	`conf`	Multi-objective optimization of minority-3 functions for ultra-low voltage supplies. ISCAS Hans Kristian Otnes Berge, Snorre Aunet
2011	—	`conf`	On the reliability of ultra low voltage circuits built from minority-3 gates. ECCTD Snorre Aunet
2010	—	`conf`	Design of 9T SRAM for dynamic voltage supplies by a multiobjective optimization approach. ICECS Hans Kristian Otnes Berge, Matthias W. Blesken, Snorre Aunet, Ulrich Rückert
2010	C	`conf`	Memory elements based on minority-3 gates and inverters implemented in 90 nm CMOS. DDECS Snorre Aunet, Amir Hasanbegovic
2009	—	`conf`	New subthreshold concepts in 65nm CMOS technology. ISQED Farshad Moradi, Dag T. Wisland, Hamid Mahmoodi, Ali Peiravi, Snorre Aunet, Tuan Vu Cao
2009	—	`ch.`	Statistical Simulations on Perceptron-Based Adders. Encyclopedia of Artificial Intelligence Snorre Aunet, Hans Kristian Otnes Berge
2009	—	`ch.`	Synthetic Neuron Implementations. Encyclopedia of Artificial Intelligence Snorre Aunet
2009	C	`conf`	Ultra Low Power Full Adder Topologies. ISCAS Farshad Moradi, Dag T. Wisland, Hamid Mahmoodi, Snorre Aunet, Tuan Vu Cao, Ali Peiravi
2008	—	`conf`	65NM sub-threshold 11T-SRAM for ultra low voltage applications. SoCC Farshad Moradi, Dag T. Wisland, Snorre Aunet, Hamid Mahmoodi, Tuan Vu Cao
2008	—	`conf`	Clocked semi-floating-gate ultra low-voltage current mirror. ICECS Yngvar Berg, Omid Mirmotahari, Snorre Aunet
2008	—	`conf`	High Speed Ultra Low Voltage CMOS inverter. ISVLSI Yngvar Berg, Omid Mirmotahari, Johannes Goplen Lomsdalen, Snorre Aunet
2008	—	`conf`	High speed and ultra low voltage CMOS latch. ICECS Yngvar Berg, Omid Mirmotahari, Snorre Aunet
2008	C	`conf`	Improving Circuit Security against Power Analysis Attacks with Subthreshold Operation. DDECS Håvard Pedersen Alstad, Snorre Aunet
2008	J	`jnl`	Improving Yield and Defect Tolerance in Subthreshold CMOS Through Output-Wired Redundancy. J. Electron. Test. Kristian Granhaug, Snorre Aunet
2008	J	`jnl`	Real-Time Reconfigurable Subthreshold CMOS Perceptron. IEEE Trans. Neural Networks Snorre Aunet, Bengt Oelmann, Per Andreas Norseng, Yngvar Berg
2008	C	`conf`	Three Subthreshold Flip-Flop Cells Characterized in 90 nm and 65 nm CMOS Technology. DDECS Håvard Pedersen Alstad, Snorre Aunet
2008	—	`conf`	Ultra low voltage and, nor and XOR CMOS gates. ICECS Yngvar Berg, Omid Mirmotahari, Snorre Aunet
2007	—	`conf`	Band Pass Pseudo Floating-Gate Amplifier. ICECS Yngvar Berg, Mehdi Azadmehr, Omid Mirmotahari, Snorre Aunet
2007	—	`conf`	Fault Tolerant CMOS Logic Using Ternary Gates. ISMVL Yngvar Berg, Renè Jensen, Johannes Goplen Lomsdalen, Henning Gundersen, Snorre Aunet
2007	—	`conf`	Performance of CMOS and Floating-Gate Full-Adders Circuits at Subthreshold Power Supply. PATMOS Jon Alfredsson, Snorre Aunet
2007	J	`jnl`	Serial Addition: Locally Connected Architectures. IEEE Trans. Circuits Syst. I Regul. Pap. Valeriu Beiu, Snorre Aunet, Jabulani Nyathi, Ray Robert Rydberg III, Walid Ibrahim
2007	Misc	`conf`	Small Fan-in Floating-Gate Circuits with Application to an Improved Adder Structure. VLSI Design Jon Alfredsson, Snorre Aunet, Bengt Oelmann
2007	Misc	`conf`	Statistical Simulations for Exploring Defect Tolerance and Power Consumption for 4 Subthreshold 1-Bit Addition Circuits. IWANN Snorre Aunet, Hans Kristian Otnes Berge
2006	C	`conf`	Body-bias regulator for ultra low power multifunction CMOS gates. ISCAS Kristian Granhaug, Snorre Aunet, Tor Sverre Lande
2006	C	`conf`	Femto Joule Switching for Nano Electronics. AICCSA Valeriu Beiu, Jabulani Nyathi, Snorre Aunet, Mawahib H. Sulieman
2006	—	`conf`	Improving Yield and Defect Tolerance in Multifunction Subthreshold CMOS Gates. DFT Kristian Granhaug, Snorre Aunet
2006	C	`conf`	Pseudo Floating-Gate Inverter with Feedback Control. VLSI-SoC Yngvar Berg, Omid Mirmotahari, Snorre Aunet
2006	C	`conf`	Six Subthreshold Full Adder Cells Characterized in 90 nm CMOS Technology. DDECS Kristian Granhaug, Snorre Aunet
2006	—	`conf`	Ultra low voltage CMOS gates. ICECS Yngvar Berg, Omid Mirmotahari, Per Andreas Norseng, Snorre Aunet
2005	B	`conf`	Low-voltage pseudo floating-gate reconfigurable linear threshold elements. IJCNN Øivind Næss, Snorre Aunet, Yngvar Berg
2005	—	`conf`	On the Advantages of Serial Architectures for Low-Power Reliable Computations. ASAP Valeriu Beiu, Snorre Aunet, Jabulani Nyathi, Ray Robert Rydberg III, Asbjørn Djupdal
2005	Misc	`conf`	Ultra Low-Power Neural Inspired Addition: When Serial Might Outperform Parallel Architectures. IWANN Valeriu Beiu, Asbjørn Djupdal, Snorre Aunet
2005	B	`conf`	Ultra low power fault tolerant neural inspired CMOS logic. IJCNN Snorre Aunet, Valeriu Beiu
2005	Misc	`conf`	Using Kolmogorov Inspired Gates for Low Power Nanoelectronics. IWANN Valeriu Beiu, Artur Zawadski, Razvan Andonie, Snorre Aunet
2004	—	`conf`	Basic Multiple-Valued Functions Using Recharge CMOS Logic. ISMVL Yngvar Berg, Snorre Aunet, Øivind Næss, Omid Mirmotahari
2004	B	`conf`	Reconfigurable subthreshold CMOS perceptron. IJCNN Snorre Aunet, Bengt Oelmann, Suliman Abdalla, Yngvar Berg
2003	J	`jnl`	Erratum to "real-time reconfigurable linear threshold elements implemented in floating-gate CMOS". IEEE Trans. Neural Networks Snorre Aunet, Yngvar Berg, Trond Sæther
2003	—	`conf`	Exploiting hyperbolic functions to increase linearity in low-voltage floating-gate transconductance amplifiers. ISCAS (1) Yngvar Berg, Snorre Aunet, Øivind Næss, Johannes Goplen Lomsdalen, Mats Høvin
2003	—	`conf`	Novel recharge semi-floating-gate CMOS logic for multiple-valued systems. ISCAS (5) Yngvar Berg, Snorre Aunet, Omid Mirmotahari, Mats Høvin
2003	—	`conf`	Real-Time Reconfigurable Linear Threshold Elements and Some Applications to Neural Hardware. ICES Snorre Aunet, Morten Hartmann
2003	J	`jnl`	Real-time reconfigurable linear threshold elements implemented in floating-gate CMOS. IEEE Trans. Neural Networks Snorre Aunet, Yngvar Berg, Trond Sæther
2003	—	`conf`	UV-programmable Floating-Gate CMOS Linear Threshold Element "P1N3". IWANN (2) Snorre Aunet, Yngvar Berg
2002	—	`conf`	A novel floating-gate binary signal to multiple-valued signal converter for multiple-valued CMOS logic. ICECS Yngvar Berg, Øivind Næss, Snorre Aunet, Johannes Goplen Lomsdalen, Mats Høvin
2002	—	`conf`	A novel floating-gate multiple-valued CMOS full-adder. ISCAS (1) Yngvar Berg, Snorre Aunet, Øivind Næss, O. Hagen, Mats Høvin
2002	—	`conf`	A novel floating-gate multiple-valued signal to binary signal converter. ICECS Yngvar Berg, Øivind Næss, Snorre Aunet, Mats Høvin
2002	—	`conf`	Compact low-voltage self-calibrating digital floating-gate CMOS logic circuits. ISCAS (5) Trond Ytterdal, Snorre Aunet
2002	—	`conf`	Novel floating-gate multiple-valued signal to binary signal converters for multiple-valued CMOS logic. ISCAS (5) Yngvar Berg, Øivind Næss, Snorre Aunet, Renè Jensen, Mats Høvin
2001	—	`conf`	A 0.3 V floating-gate differential amplifier input stage with tunable gain. ICECS Yngvar Berg, Snorre Aunet, Øivind Næss, Henning Gundersen, Mats Høvin
2001	—	`conf`	A method for simulation of floating-gate UV-programmable circuits with application to three new 2-MOSFET digital circuits. ICECS Snorre Aunet, Yngvar Berg, Trond Ytterdal, Øivind Næss, Trond Sæther
2001	—	`conf`	A novel low-voltage floating-gate CMOS transconductance amplifier with sinh (tanh) shaped output current. ICECS Yngvar Berg, Snorre Aunet, Øivind Næss, Mats Høvin
2001	—	`conf`	Exploiting sinh and tanh shaped ultra low-voltage floating-gate transconductance amplifiers to reduce harmonic distortion. ISCAS (4) Yngvar Berg, Snorre Aunet, Øivind Næss, Mats Høvin
2001	—	`conf`	Extreme low-voltage floating-gate CMOS transconductance amplifier. ISCAS (1) Yngvar Berg, Snorre Aunet, Øivind Næss, Henning Gundersen, Mats Høvin
2001	—	`conf`	Floating-gate CMOS differential analog inverter for ultra low-voltage applications. ISCAS (1) Yngvar Berg, Snorre Aunet, Øivind Næss, Mats Høvin
2001	—	`conf`	Novel reconfigurable two-MOSFET UV-programmable floating-gate circuits for CARRY, NAND, NOR or INVERT functions. ICECS Snorre Aunet, Yngvar Berg, Øivind Næss, Trond Sæther