Siva Sankar Yellampalli

21 papers A 1C 1Journal 7Unranked 12
YearRankTypeTitle / Venue / Authors
2025 J jnl
RadiomixNet: Integrating Radiomics and Feature Extraction for Advanced Pneumonia Diagnosis.
IEEE Access
Rahul Gowtham Poola, Siva Sankar Yellampalli
2024 C conf
Negative Capacitance FET 8T SRAM Computing in-Memory based Logic Design for Energy Efficient AI Edge Devices.
ISCAS
Venu Birudu, Tirumalarao Kadiyam, Koteswararao Penumalli, Aditya Japa, Sushma Nirmala Sambatur, Chongyan Gu, Siva Sankar Yellampalli, Ramesh Vaddi
2024 J jnl
SyntDiaNet: Integrating feature extraction, transfer learning and classifier-embedded generative adversarial network for advanced pneumonia diagnosis.
Multim. Tools Appl.
Rahul Gowtham Poola, P. L. Lahari, Siva Sankar Yellampalli
2023 J jnl
A negative capacitance FET based energy efficient 6T SRAM computing-in-memory (CiM) cell design for deep neural networks.
Microelectron. J.
Venu Birudu, Siva Sankar Yellampalli, Ramesh Vaddi
2023 J jnl
Negative capacitance FET based energy efficient and DPA attack resilient ultra-light weight block cipher design.
Microelectron. J.
Renuka Chowdary Bheemana, Aditya Japa, Siva Sankar Yellampalli, Ramesh Vaddi
2022 — conf
Design and Exploration of Negative Capacitance FETs for Energy Efficient SRAM based In-Memory XNOR/Input and Weight Product Operation for Deep Neural Networks.
iSES
Venu Birudu, Siva Sankar Yellampalli, Ramesh Vaddi
2022 J jnl
Negative capacitance FETs for energy efficient and hardware secure logic designs.
Microelectron. J.
Renuka Chowdary Bheemana, Aditya Japa, Siva Sankar Yellampalli, Ramesh Vaddi
2021 — conf
GPS and LoRa module Based Safety Alert system.
RFID-TA
Parshal Chitrakar, Yoganand Biradavolu, Siva Sankar Yellampalli
2021 — conf
Smart Agriculture using IoT & Filtering Technology.
ICCCNT
Sameeksha Konakalla, Lakshmi Vyshnavi Kunchala, Siva Sankar Yellampalli
2021 — conf
Steep Switching NCFET based Logic for Future Energy Efficient Electronics.
iSES
Renuka Chowdary Bheemana, Aditya Japa, Siva Sankar Yellampalli, Ramesh Vaddi
2021 — conf
Systolic Array based Multiply Accumulation Unit for IoT Edge Accelerators.
iSES
P. L. Lahari, Siva Sankar Yellampalli, Ramesh Vaddi
2019 J jnl
Smart Receivers with Modular and Multifunctional Front-End Blocks: The Benefits of Using Programmable Modulators and Demodulators.
IEEE Consumer Electron. Mag.
Nanda Kishora Holla, Siva Sankar Yellampalli
2015 — conf
Analog BIST for Capacitive MEMS Sensor using PLL.
WCI
Favoureen Swer, V. Pradeep, Siva Sankar Yellampalli
2015 — conf
Design and implementation of sample and hold circuit in 180nm CMOS technology.
ICACCI
Prakruthi T. G., Siva Sankar Yellampalli
2015 — conf
Detection and analysis of hardware trojan using scan chain method.
VDAT
Munishamanna Rithesh, G. Harish, B. V. Bhargav Ram, Siva Sankar Yellampalli
2015 — conf
Low power and hardware cost STUMPS BIST.
VDAT
N. Ravi Kiran, G. Harish, A. Karthik, Siva Sankar Yellampalli
2015 — conf
Modified low power scan based technique.
VDAT
M. R. Gowthami, G. Harish, B. V. Bhargav Ram, Siva Sankar Yellampalli
2014 — conf
Design of power efficient SPI interface.
ICACCI
Dwaraka N. Oruganti, Siva Sankar Yellampalli
2014 — conf
The Design of Ultra Low Power CMOS CGLNA in Nanometer Technology.
ISED
P. Kavyashree, Siva Sankar Yellampalli
2011 J jnl
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Circuits Syst.
Rajiv Soundararajan, Ashok Srivastava, Siva Sankar Yellampalli
2003 A conf
Dynamic Mapping in a Heterogeneous Environment with Tasks Having Priorities and Multiple Deadlines.
IPDPS
Jong-Kook Kim, Sameer Shivle, Howard Jay Siegel, Anthony A. Maciejewski, Tracy D. Braun, Myron Schneider, Sonja Tideman, Ramakrishna Chitta, Raheleh B. Dilmaghani, Rohit Joshi, Aditya Kaul, Ashish Sharma, Siddhartha Sripada, Praveen Vangari, Siva Sankar Yellampalli